| Message ID | 522F52E0.8040007@arm.com |
|---|---|
| State | New |
| Headers | show |
Ping~ Thanks, Yufeng http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00774.html On 09/10/13 18:12, Yufeng Zhang wrote: > Oops, now attach the correct patch and change log. > > Thanks, > Yufeng > > gcc/ > > * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): > Call aarch64_simd_expand_args to update op[argc]. > > > On 09/10/13 18:08, Yufeng Zhang wrote: >> This patch fixes a number of test failures in gcc.target/aarch64/v*.c in >> ILP32. >> >> The corresponding RTL patterns for some load/store builtins have Pmode >> (i.e. DImode) specified for their address operands. However, coming >> from a pointer-typed function argument, op[argc] will have SImode in >> ILP32. Instead of duplicating these RTL patterns to cope with SImode >> operand (which e.g. would complicate arm_neon.h), we explicitly convert >> the operand to Pmode here; an address operand in a RTL shall have Pmode >> anyway. Note that if op[argc] already has DImode, >> convert_memory_address will simply return it
On 10 September 2013 18:12, Yufeng Zhang <Yufeng.Zhang@arm.com> wrote: > gcc/ > > * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): > Call aarch64_simd_expand_args to update op[argc]. OK /Marcus
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 6816b9c..0df5b3b 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -989,6 +989,8 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval, switch (thisarg) { case SIMD_ARG_COPY_TO_REG: + if (POINTER_TYPE_P (TREE_TYPE (arg[argc]))) + op[argc] = convert_memory_address (Pmode, op[argc]); /*gcc_assert (GET_MODE (op[argc]) == mode[argc]); */ if (!(*insn_data[icode].operand[argc + have_retval].predicate) (op[argc], mode[argc]))