| Message ID | 1375598683-3174-5-git-send-email-krishna.md@samsung.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Minkyu Kang |
| Headers | show |
On 04/08/13 15:44, Dani Krishna Mohan wrote: > This patch makes required changes to make use > of I2S0 channel instead of I2S1 channel on exynos5250. > > Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com> > --- > changes in V2: > - None > arch/arm/include/asm/arch-exynos/i2s-regs.h | 6 ++++++ > drivers/sound/samsung-i2s.c | 16 ++++++++++------ > 2 files changed, 16 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/include/asm/arch-exynos/i2s-regs.h b/arch/arm/include/asm/arch-exynos/i2s-regs.h > index 613b9b7..4a4a7a0 100644 > --- a/arch/arm/include/asm/arch-exynos/i2s-regs.h > +++ b/arch/arm/include/asm/arch-exynos/i2s-regs.h > @@ -8,10 +8,12 @@ > #ifndef __I2S_REGS_H__ > #define __I2S_REGS_H__ > > +#define CON_RESET (1 << 31) > #define CON_TXFIFO_FULL (1 << 8) > #define CON_TXCH_PAUSE (1 << 4) > #define CON_ACTIVE (1 << 0) > > +#define MOD_OP_CLK (3 << 30) > #define MOD_BLCP_SHIFT 24 > #define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT) > #define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT) > @@ -24,6 +26,7 @@ > #define MOD_BLC_MASK (3 << 13) > > #define MOD_SLAVE (1 << 11) > +#define MOD_RCLKSRC (0 << 10) > #define MOD_MASK (3 << 8) > #define MOD_LR_LLOW (0 << 7) > #define MOD_LR_RLOW (1 << 7) > @@ -47,4 +50,7 @@ > #define FIC_TXFLUSH (1 << 15) > #define FIC_RXFLUSH (1 << 7) > > +#define PSREN (1 << 15) > +#define PSVAL (3 << 8) > + > #endif /* __I2S_REGS_H__ */ > diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c > index 49921e5..8e8a2bc 100644 > --- a/drivers/sound/samsung-i2s.c > +++ b/drivers/sound/samsung-i2s.c > @@ -303,21 +303,25 @@ int i2s_tx_init(struct i2stx_info *pi2s_tx) > (struct i2s_reg *)pi2s_tx->base_address; > > /* Initialize GPIO for I2s */ > - exynos_pinmux_config(PERIPH_ID_I2S1, 0); > + exynos_pinmux_config(PERIPH_ID_I2S0, 0); please don't replacing. please adds support i2c0. > > /* Set EPLL Clock */ > - ret = set_epll_clk(pi2s_tx->audio_pll_clk); > + ret = set_epll_clk(pi2s_tx->samplingrate * pi2s_tx->rfs * 4); > if (ret != 0) { > debug("%s: epll clock set rate falied\n", __func__); > return -1; > } > > - /* Select Clk Source for Audio1 */ > + /* Select Clk Source for Audio0 */ > set_i2s_clk_source(); > > - /* Set Prescaler to get MCLK */ > - set_i2s_clk_prescaler(pi2s_tx->audio_pll_clk, > - (pi2s_tx->samplingrate * (pi2s_tx->rfs))); > + /*Reset the i2s module */ > + writel(CON_RESET, &i2s_reg->con); > + > + writel(MOD_OP_CLK | MOD_RCLKSRC, &i2s_reg->mod); > + > + /* set i2s prescaler */ > + writel(PSREN | PSVAL, &i2s_reg->psr); > > /* Configure I2s format */ > ret = i2s_set_fmt(i2s_reg, (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | > Thanks, Minkyu Kang.
diff --git a/arch/arm/include/asm/arch-exynos/i2s-regs.h b/arch/arm/include/asm/arch-exynos/i2s-regs.h index 613b9b7..4a4a7a0 100644 --- a/arch/arm/include/asm/arch-exynos/i2s-regs.h +++ b/arch/arm/include/asm/arch-exynos/i2s-regs.h @@ -8,10 +8,12 @@ #ifndef __I2S_REGS_H__ #define __I2S_REGS_H__ +#define CON_RESET (1 << 31) #define CON_TXFIFO_FULL (1 << 8) #define CON_TXCH_PAUSE (1 << 4) #define CON_ACTIVE (1 << 0) +#define MOD_OP_CLK (3 << 30) #define MOD_BLCP_SHIFT 24 #define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT) #define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT) @@ -24,6 +26,7 @@ #define MOD_BLC_MASK (3 << 13) #define MOD_SLAVE (1 << 11) +#define MOD_RCLKSRC (0 << 10) #define MOD_MASK (3 << 8) #define MOD_LR_LLOW (0 << 7) #define MOD_LR_RLOW (1 << 7) @@ -47,4 +50,7 @@ #define FIC_TXFLUSH (1 << 15) #define FIC_RXFLUSH (1 << 7) +#define PSREN (1 << 15) +#define PSVAL (3 << 8) + #endif /* __I2S_REGS_H__ */ diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c index 49921e5..8e8a2bc 100644 --- a/drivers/sound/samsung-i2s.c +++ b/drivers/sound/samsung-i2s.c @@ -303,21 +303,25 @@ int i2s_tx_init(struct i2stx_info *pi2s_tx) (struct i2s_reg *)pi2s_tx->base_address; /* Initialize GPIO for I2s */ - exynos_pinmux_config(PERIPH_ID_I2S1, 0); + exynos_pinmux_config(PERIPH_ID_I2S0, 0); /* Set EPLL Clock */ - ret = set_epll_clk(pi2s_tx->audio_pll_clk); + ret = set_epll_clk(pi2s_tx->samplingrate * pi2s_tx->rfs * 4); if (ret != 0) { debug("%s: epll clock set rate falied\n", __func__); return -1; } - /* Select Clk Source for Audio1 */ + /* Select Clk Source for Audio0 */ set_i2s_clk_source(); - /* Set Prescaler to get MCLK */ - set_i2s_clk_prescaler(pi2s_tx->audio_pll_clk, - (pi2s_tx->samplingrate * (pi2s_tx->rfs))); + /*Reset the i2s module */ + writel(CON_RESET, &i2s_reg->con); + + writel(MOD_OP_CLK | MOD_RCLKSRC, &i2s_reg->mod); + + /* set i2s prescaler */ + writel(PSREN | PSVAL, &i2s_reg->psr); /* Configure I2s format */ ret = i2s_set_fmt(i2s_reg, (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
This patch makes required changes to make use of I2S0 channel instead of I2S1 channel on exynos5250. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com> --- changes in V2: - None arch/arm/include/asm/arch-exynos/i2s-regs.h | 6 ++++++ drivers/sound/samsung-i2s.c | 16 ++++++++++------ 2 files changed, 16 insertions(+), 6 deletions(-)