| Message ID | 51191C4F.9090705@mimc.co.uk |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
On Mon, Feb 11, 2013 at 04:29:03PM +0000, Mark Jackson wrote: > Expose the enable_gpmc_cs_config() function so OMAP2 boards can register > GPMC chipselects. > > Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> > --- > arch/arm/include/asm/arch-am33xx/sys_proto.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h > index 588d8de..97ab60d 100644 > --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h > +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h > @@ -35,5 +35,7 @@ void ddr_pll_config(unsigned int ddrpll_M); > void sdelay(unsigned long); > void gpmc_init(void); > +void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, > + u32 size); > void omap_nand_switch_ecc(int); > #endif Can you please correct the description? You're exposing the function for am33xx not omap2. Otherwise fine with me, and I assume you need this on a custom board (aside: the function already exists/is used in arch/arm/cpu/armv7/am33xx/mem.c). Are you planning to submit that support as well? Thanks!
On 12/02/13 17:01, Tom Rini wrote: > On Mon, Feb 11, 2013 at 04:29:03PM +0000, Mark Jackson wrote: > >> Expose the enable_gpmc_cs_config() function so OMAP2 boards can register >> GPMC chipselects. >> >> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> >> --- >> arch/arm/include/asm/arch-am33xx/sys_proto.h | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h >> index 588d8de..97ab60d 100644 >> --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h >> +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h >> @@ -35,5 +35,7 @@ void ddr_pll_config(unsigned int ddrpll_M); >> void sdelay(unsigned long); >> void gpmc_init(void); >> +void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, >> + u32 size); >> void omap_nand_switch_ecc(int); >> #endif > > Can you please correct the description? You're exposing the function > for am33xx not omap2. Otherwise fine with me, and I assume you need > this on a custom board (aside: the function already exists/is used in > arch/arm/cpu/armv7/am33xx/mem.c). Are you planning to submit that > support as well? Thanks! Sure ... I'll repost with the comment changed. Yes ... I've not written my own version, I'm using the existing code. And, yes, I've a new CPU board I'm working on, which I'll submit later (once we've done a hardware re-spin). Cheers Mark J.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 02/12/2013 02:20 PM, Mark Jackson wrote: > On 12/02/13 17:01, Tom Rini wrote: >> On Mon, Feb 11, 2013 at 04:29:03PM +0000, Mark Jackson wrote: >> >>> Expose the enable_gpmc_cs_config() function so OMAP2 boards can >>> register GPMC chipselects. >>> >>> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> --- >>> arch/arm/include/asm/arch-am33xx/sys_proto.h | 2 ++ 1 file >>> changed, 2 insertions(+) >>> >>> diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h >>> b/arch/arm/include/asm/arch-am33xx/sys_proto.h index >>> 588d8de..97ab60d 100644 --- >>> a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ >>> b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -35,5 +35,7 >>> @@ void ddr_pll_config(unsigned int ddrpll_M); void >>> sdelay(unsigned long); void gpmc_init(void); +void >>> enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs >>> *cs, u32 base, + u32 size); void >>> omap_nand_switch_ecc(int); #endif >> >> Can you please correct the description? You're exposing the >> function for am33xx not omap2. Otherwise fine with me, and I >> assume you need this on a custom board (aside: the function >> already exists/is used in arch/arm/cpu/armv7/am33xx/mem.c). Are >> you planning to submit that support as well? Thanks! > > Sure ... I'll repost with the comment changed. Thanks. > Yes ... I've not written my own version, I'm using the existing > code. > > And, yes, I've a new CPU board I'm working on, which I'll submit > later (once we've done a hardware re-spin). Looking forward to it! - -- Tom -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRGpzgAAoJENk4IS6UOR1WZh8P+gOPjlJmQi5ZRJSR3fE8gIUu it1T5VDXWiWLLHRDkCsdK5DkamrLwQwYdOpSqVWqN48gqPJJasgSIf36+H5kXArR lkyE1HzmGsP8v31deY/6wIAPy0g3JTCac9IhCmvLkkNwGJzlfdTtoCHyd20oxDmh gzCo9y7PuDfdVnONlyGwuKdefqH/u9gq5nbKdw15DpTgGITUaXfOpRj/4wKOMx0t KzaGXNcKrs30gKJoTEO0R8voRi6s0sEn9uSFBxBp3EXrrQNC8Ee1AKL+RCXfH28Y L3PB1T1eRAAnG5erZOh4EoYzpSwzARJ9vEUOu96m4dLUihDH6ShD+0LSYfTLr0cm wpt2ivzN7Ede9kGg2bZ9l+eL0c5/+V+ZkBqv1m4nT//qxKj/AweuUxexXWnxmVsF XotwUVNPpb2AhDnqRShC56zEM+0CFyNPlSSvp93CO6V/jB4W+RRd9IoKw7AHWmvS KldbC75kDwxncxlCelc3BqDrlh7NZ6yJGVeHfNHm1BNWlg7CCn36IDXUNQ7UAOKE BQ+8u4liYkhGw+EJS0f7o7TD0d1o4qOj/IB5e7sAhhgTeOw/A2jP78HzAvKhGamQ ETJSAzr0M8a1B2Y7YjRM8HG9f0drGWXuektF9y9/vmGaGSOxfYMjLq/Jbe6Pifnv Mi6lmINkleLKmto50Ppf =KvZG -----END PGP SIGNATURE-----
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 588d8de..97ab60d 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -35,5 +35,7 @@ void ddr_pll_config(unsigned int ddrpll_M); void sdelay(unsigned long); void gpmc_init(void); +void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, + u32 size); void omap_nand_switch_ecc(int); #endif -- 1.7.9.5
Expose the enable_gpmc_cs_config() function so OMAP2 boards can register GPMC chipselects. Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> --- arch/arm/include/asm/arch-am33xx/sys_proto.h | 2 ++ 1 file changed, 2 insertions(+)