| Message ID | 1342085776-13289-1-git-send-email-B38951@freescale.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Commit | b915341b4be29b3b2c02da932b69871e9b55ca4b |
| Headers | show |
Note that this patch works with uboot update. Please refer to: http://patchwork.ozlabs.org/patch/170627/ -Hongtao. > -----Original Message----- > From: Jia Hongtao-B38951 > Sent: Thursday, July 12, 2012 5:36 PM > To: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org > Cc: Li Yang-R58472; Jia Hongtao-B38951 > Subject: [PATCH] powerpc/sgmii: Add phy nodes in SGMII mode > > In SGMII riser card different PHY chip are used with different external > IRQ from eTSEC. To support PHY link state auto detect in SGMII mode we > should add another group of PHY nodes for SGMII mode. > > For MPC8572DS IRQ6 is used for PHY0~PHY1, IRQ7 is used for PHY2~PHY3. > For MPC8544DS and MPC8536DS IRQ6 is used for PHY0~PHY1. > For P2020DS IRQ5 is used for PHY1~PHY2. > > Signed-off-by: Li Yang <leoli@freescale.com> > Signed-off-by: Jia Hongtao <B38951@freescale.com> > --- > arch/powerpc/boot/dts/mpc8536ds.dtsi | 8 ++++++++ > arch/powerpc/boot/dts/mpc8544ds.dtsi | 9 +++++++++ > arch/powerpc/boot/dts/mpc8572ds.dtsi | 17 +++++++++++++++++ > arch/powerpc/boot/dts/p2020ds.dtsi | 10 ++++++++++ > 4 files changed, 44 insertions(+), 0 deletions(-) >
On Jul 12, 2012, at 5:28 AM, Jia Hongtao-B38951 wrote: > Note that this patch works with uboot update. > Please refer to: > http://patchwork.ozlabs.org/patch/170627/ > > -Hongtao. Will RGMII still work with this patch if I dont update u-boot? I'm assuming yes. - k > >> -----Original Message----- >> From: Jia Hongtao-B38951 >> Sent: Thursday, July 12, 2012 5:36 PM >> To: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org >> Cc: Li Yang-R58472; Jia Hongtao-B38951 >> Subject: [PATCH] powerpc/sgmii: Add phy nodes in SGMII mode >> >> In SGMII riser card different PHY chip are used with different external >> IRQ from eTSEC. To support PHY link state auto detect in SGMII mode we >> should add another group of PHY nodes for SGMII mode. >> >> For MPC8572DS IRQ6 is used for PHY0~PHY1, IRQ7 is used for PHY2~PHY3. >> For MPC8544DS and MPC8536DS IRQ6 is used for PHY0~PHY1. >> For P2020DS IRQ5 is used for PHY1~PHY2. >> >> Signed-off-by: Li Yang <leoli@freescale.com> >> Signed-off-by: Jia Hongtao <B38951@freescale.com> >> --- >> arch/powerpc/boot/dts/mpc8536ds.dtsi | 8 ++++++++ >> arch/powerpc/boot/dts/mpc8544ds.dtsi | 9 +++++++++ >> arch/powerpc/boot/dts/mpc8572ds.dtsi | 17 +++++++++++++++++ >> arch/powerpc/boot/dts/p2020ds.dtsi | 10 ++++++++++ >> 4 files changed, 44 insertions(+), 0 deletions(-) >> >
On Thu, Jul 12, 2012 at 8:18 PM, Kumar Gala <galak@kernel.crashing.org> wrote: > > On Jul 12, 2012, at 5:28 AM, Jia Hongtao-B38951 wrote: > >> Note that this patch works with uboot update. >> Please refer to: >> http://patchwork.ozlabs.org/patch/170627/ >> >> -Hongtao. > > Will RGMII still work with this patch if I dont update u-boot? > > I'm assuming yes. Yes. We just add new nodes without modifying the original PHY nodes. Leo
On Jul 12, 2012, at 4:36 AM, Jia Hongtao wrote: > In SGMII riser card different PHY chip are used with different external > IRQ from eTSEC. To support PHY link state auto detect in SGMII mode we > should add another group of PHY nodes for SGMII mode. > > For MPC8572DS IRQ6 is used for PHY0~PHY1, IRQ7 is used for PHY2~PHY3. > For MPC8544DS and MPC8536DS IRQ6 is used for PHY0~PHY1. > For P2020DS IRQ5 is used for PHY1~PHY2. > > Signed-off-by: Li Yang <leoli@freescale.com> > Signed-off-by: Jia Hongtao <B38951@freescale.com> > --- > arch/powerpc/boot/dts/mpc8536ds.dtsi | 8 ++++++++ > arch/powerpc/boot/dts/mpc8544ds.dtsi | 9 +++++++++ > arch/powerpc/boot/dts/mpc8572ds.dtsi | 17 +++++++++++++++++ > arch/powerpc/boot/dts/p2020ds.dtsi | 10 ++++++++++ > 4 files changed, 44 insertions(+), 0 deletions(-) applied to next - k
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/mpc8536ds.dtsi index cc46dbd..d304a2d 100644 --- a/arch/powerpc/boot/dts/mpc8536ds.dtsi +++ b/arch/powerpc/boot/dts/mpc8536ds.dtsi @@ -203,6 +203,14 @@ reg = <1>; device_type = "ethernet-phy"; }; + sgmii_phy0: sgmii-phy@0 { + interrupts = <6 1 0 0>; + reg = <0x1d>; + }; + sgmii_phy1: sgmii-phy@1 { + interrupts = <6 1 0 0>; + reg = <0x1c>; + }; tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi index 270f64b..77ebc9f 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dtsi +++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi @@ -51,6 +51,15 @@ device_type = "ethernet-phy"; }; + sgmii_phy0: sgmii-phy@0 { + interrupts = <6 1 0 0>; + reg = <0x1c>; + }; + sgmii_phy1: sgmii-phy@1 { + interrupts = <6 1 0 0>; + reg = <0x1d>; + }; + tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; diff --git a/arch/powerpc/boot/dts/mpc8572ds.dtsi b/arch/powerpc/boot/dts/mpc8572ds.dtsi index 1417894..357490b 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dtsi +++ b/arch/powerpc/boot/dts/mpc8572ds.dtsi @@ -169,6 +169,23 @@ reg = <0x3>; }; + sgmii_phy0: sgmii-phy@0 { + interrupts = <6 1 0 0>; + reg = <0x1c>; + }; + sgmii_phy1: sgmii-phy@1 { + interrupts = <6 1 0 0>; + reg = <0x1d>; + }; + sgmii_phy2: sgmii-phy@2 { + interrupts = <7 1 0 0>; + reg = <0x1e>; + }; + sgmii_phy3: sgmii-phy@3 { + interrupts = <7 1 0 0>; + reg = <0x1f>; + }; + tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi index d3b939c..e699cf9 100644 --- a/arch/powerpc/boot/dts/p2020ds.dtsi +++ b/arch/powerpc/boot/dts/p2020ds.dtsi @@ -150,6 +150,16 @@ interrupts = <3 1 0 0>; reg = <0x2>; }; + + sgmii_phy1: sgmii-phy@1 { + interrupts = <5 1 0 0>; + reg = <0x1c>; + }; + sgmii_phy2: sgmii-phy@2 { + interrupts = <5 1 0 0>; + reg = <0x1d>; + }; + tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy";