| Message ID | 1334299574-8667-1-git-send-email-dirk.behme@de.bosch.com |
|---|---|
| State | Accepted |
| Commit | 03f3587822839d90b1b118d3cd51c59d8b4d5b32 |
| Delegated to: | Stefano Babic |
| Headers | show |
>-----Original Message----- >From: Dirk Behme [mailto:dirk.behme@de.bosch.com] >Sent: Friday, April 13, 2012 2:46 PM >To: u-boot@lists.denx.de >Cc: Dirk Behme; Jason Chen; Liu Hui-R64343; Stefano Babic; Fabio Estevam >Subject: [PATCH] i.MX6: arm2: Add AXI cache and Qos setting > >Do the same AXI cache and Qos settings done already in the SabreLite >imximage.cfg for the ARM2 board, too. > >It fixes a display flash issue caused by low priority of the display IDMA >channel. > >Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> >CC: Jason Chen <b02280@freescale.com> >CC: Jason Liu <r64343@freescale.com> >CC: Stefano Babic <sbabic@denx.de> >CC: Fabio Estevam <festevam@gmail.com> >--- > board/freescale/mx6qarm2/imximage.cfg | 6 ++++++ > 1 files changed, 6 insertions(+), 0 deletions(-) > >diff --git a/board/freescale/mx6qarm2/imximage.cfg >b/board/freescale/mx6qarm2/imximage.cfg >index 5f0ee0d..ceecbf9 100644 >--- a/board/freescale/mx6qarm2/imximage.cfg >+++ b/board/freescale/mx6qarm2/imximage.cfg >@@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000 DATA 4 0x020c4078 >0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF >+ >+# enable AXI cache for VDOA/VPU/IPU >+DATA 4 0x020e0010 0xF00000FF >+# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018 >+0x007F007F DATA 4 0x020e001c 0x007F007F Acked-by: Jason Liu <r64343@freescale.com> >-- >1.7.0.4 >
On 13/04/2012 09:10, Liu Hui-R64343 wrote: >> -----Original Message----- >> From: Dirk Behme [mailto:dirk.behme@de.bosch.com] >> Sent: Friday, April 13, 2012 2:46 PM >> To: u-boot@lists.denx.de >> Cc: Dirk Behme; Jason Chen; Liu Hui-R64343; Stefano Babic; Fabio Estevam >> Subject: [PATCH] i.MX6: arm2: Add AXI cache and Qos setting >> >> Do the same AXI cache and Qos settings done already in the SabreLite >> imximage.cfg for the ARM2 board, too. >> >> It fixes a display flash issue caused by low priority of the display IDMA >> channel. >> >> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> >> CC: Jason Chen <b02280@freescale.com> >> CC: Jason Liu <r64343@freescale.com> >> CC: Stefano Babic <sbabic@denx.de> >> CC: Fabio Estevam <festevam@gmail.com> >> --- >> board/freescale/mx6qarm2/imximage.cfg | 6 ++++++ >> 1 files changed, 6 insertions(+), 0 deletions(-) >> >> diff --git a/board/freescale/mx6qarm2/imximage.cfg >> b/board/freescale/mx6qarm2/imximage.cfg >> index 5f0ee0d..ceecbf9 100644 >> --- a/board/freescale/mx6qarm2/imximage.cfg >> +++ b/board/freescale/mx6qarm2/imximage.cfg >> @@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000 DATA 4 0x020c4078 >> 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF >> + >> +# enable AXI cache for VDOA/VPU/IPU >> +DATA 4 0x020e0010 0xF00000FF >> +# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018 >> +0x007F007F DATA 4 0x020e001c 0x007F007F > > Acked-by: Jason Liu <r64343@freescale.com> > Thanks all - this is a fix, I will try to push it for the release. Best regards, Stefano Babic
On 13/04/2012 08:46, Dirk Behme wrote: > Do the same AXI cache and Qos settings done already in the > SabreLite imximage.cfg for the ARM2 board, too. > > It fixes a display flash issue caused by low priority of > the display IDMA channel. > > Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> > CC: Jason Chen <b02280@freescale.com> > CC: Jason Liu <r64343@freescale.com> > CC: Stefano Babic <sbabic@denx.de> > CC: Fabio Estevam <festevam@gmail.com> > --- Applied to u-boot-imx (fix), thanks. Best regards, Stefano Babic
diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index 5f0ee0d..ceecbf9 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000 DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF + +# enable AXI cache for VDOA/VPU/IPU +DATA 4 0x020e0010 0xF00000FF +# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F
Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too. It fixes a display flash issue caused by low priority of the display IDMA channel. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Chen <b02280@freescale.com> CC: Jason Liu <r64343@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <festevam@gmail.com> --- board/freescale/mx6qarm2/imximage.cfg | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)