| Message ID | 1328555872-9616-1-git-send-email-timur@freescale.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Kumar Gala |
| Headers | show |
On Mon, 6 Feb 2012, Timur Tabi wrote: > Add a defintion of register PAMUBYPENR (offset 0x604) to the global > utilities structure. > > PAMUBYPENR is the PAMU bypass enable register. It contains control > bits for enabling bypass mode on each PAMU. > > Signed-off-by: Timur Tabi <timur@freescale.com> > --- > arch/powerpc/include/asm/fsl_guts.h | 4 +++- > 1 files changed, 3 insertions(+), 1 deletions(-) > What code will use this? Once such code exists, have this patch in that patch series. - k
Kumar Gala wrote: > What code will use this? Once such code exists, have this patch in that > patch series. Isn't this patch harmless? I'm not adding any code, and there already are plenty of fields defined in that struct that aren't used anywhere. The register is for the PAMU driver, which is nowhere near ready for upstream anyway. I was hoping to get the this patch in the pipeline ahead of schedule. So if you don't mind, I'd like you to consider this patch as-is.
Hello,
Using the mainline kernel & p1010rdb.dts, fsl_pq_mdio_probe returns busy
on my P1010RDB when first probing the MDIO during kernel boot. On the
console, the error is reported as:
"fsl-pq_mdio: probe of ffe24000.mdio failed with error -16"
I have determined that the failure occurs in the
for_each_child_of_node() loop shown below, which is part of the
fsl_pq_mdio_probe routine. It turns out that tbi->type is always <NULL>
although tbi->name will be "tbi-phy" when scanning the last child node (
I have also attached the relevant portion of the p1010rdb.dtsi file
below). Since tbi-type is never "tbi-phy", the "if (tbi)" statement is
always false, and err is subsequently set to EBUSY below.
Can someone please tell me whether this is an issue with the dts file,
the of library, or the probe function? Any direction on the right way
to patch this would be appreciated.
// from fsl_pq_mdio.c:
for_each_child_of_node(np, tbi) {
if (!strncmp(tbi->type, "tbi-phy", 8))
break;
}
if (tbi) {
const u32 *prop = of_get_property(tbi, "reg", NULL);
if (prop)
tbiaddr = *prop;
}
if (tbiaddr == -1) {
err = -EBUSY;
goto err_free_irqs;
} else {
out_be32(tbipa, tbiaddr);
}
// from p1010rdb.dtsi:
mdio@24000 {
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x1>;
};
phy1: ethernet-phy@1 {
interrupts = <2 1 0 0>;
reg = <0x0>;
};
phy2: ethernet-phy@2 {
interrupts = <2 1 0 0>;
reg = <0x2>;
};
tbi-phy@3 {
device-type = "tbi-phy";
reg = <0x3>;
};
};
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h index bebd124..a9a85ef 100644 --- a/arch/powerpc/include/asm/fsl_guts.h +++ b/arch/powerpc/include/asm/fsl_guts.h @@ -85,7 +85,9 @@ struct ccsr_guts_86xx { u8 res0c4[0x224 - 0xc4]; __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ - u8 res22c[0x800 - 0x22c]; + u8 res22c[0x604 - 0x22c]; + __be32 pamubypenr; /* 0x.0604 - PAMU bypass enable register */ + u8 res608[0x800 - 0x608]; __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ u8 res804[0x900 - 0x804]; __be32 ircr; /* 0x.0900 - Infrared Control Register */
Add a defintion of register PAMUBYPENR (offset 0x604) to the global utilities structure. PAMUBYPENR is the PAMU bypass enable register. It contains control bits for enabling bypass mode on each PAMU. Signed-off-by: Timur Tabi <timur@freescale.com> --- arch/powerpc/include/asm/fsl_guts.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)