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[v3,2/2] pwm: sun8i-v536: document device tree bindings

Message ID 20210302124023.1923-1-fengzheng923@gmail.com
State Changes Requested
Headers show
Series [v3,1/2] pwm: sunxi: Add Allwinner SoC PWM controller driver | expand

Commit Message

Ban Tao March 2, 2021, 12:40 p.m. UTC 
From: Ban Tao <fengzheng923@gmail.com>

This adds binding documentation for sun8i-v536 SoC PWM driver.

Signed-off-by: Ban Tao <fengzheng923@gmail.com>
---
 .../bindings/pwm/pwm-sun8i-v536.txt           | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt

Comments

Maxime Ripard March 4, 2021, 4:08 p.m. UTC | #1 
Hi,

On Tue, Mar 02, 2021 at 08:40:23PM +0800, Ban Tao wrote:
> From: Ban Tao <fengzheng923@gmail.com>
> 
> This adds binding documentation for sun8i-v536 SoC PWM driver.
> 
> Signed-off-by: Ban Tao <fengzheng923@gmail.com>
> ---
>  .../bindings/pwm/pwm-sun8i-v536.txt           | 24 +++++++++++++++++++

Bindings should be done using the YAML format now to enable the DT
validation.

Maxime
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Patch

diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt
new file mode 100644
index 000000000000..ab3f4fe0560a
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt
@@ -0,0 +1,24 @@ 
+Allwinner sun8i-v536 SoC PWM controller
+
+Required properties:
+ - compatible: should be "allwinner,<name>-pwm"
+   "allwinner,sun8i-v833-pwm"
+   "allwinner,sun8i-v536-pwm"
+   "allwinner,sun50i-r818-pwm"
+   "allwinner,sun50i-a133-pwm"
+   "allwinner,sun50i-r329-pwm"
+ - reg: physical base address and length of the controller's registers
+ - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+   the cells format.
+ - clocks: From common clock binding, handle to the parent clock.
+ - resets: From reset clock binding, handle to the parent clock.
+
+Example:
+
+	pwm: pwm@300a0000 {
+		compatible = "allwinner,sun50i-r818-pwm";
+		reg = <0x0300a000 0x3ff>;
+		clocks = <&ccu CLK_BUS_PWM>;
+		resets = <&ccu RST_BUS_PWM>;
+		#pwm-cells = <3>;
+	};