@@ -1439,6 +1446,8 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
+ printk("<<<< base PCI_BASE_ADDRESS_0 0x%08x. PCI_BASE_ADDRESS_1 0x%08x\n",
+ in_le32(mbase + PCI_BASE_ADDRESS_0), in_le32(mbase + PCI_BASE_ADDRESS_1));
resulting to the following during boot:
<<<< base PCI_BASE_ADDRESS_0 0x00000008. PCI_BASE_ADDRESS_1 0x00000100
Also I verified that the LSI device driver passes the DMA mapped
addresses (which turn out to be cut because of types mismatching) to
the PCI device indeed, and the latter manages to write there!:
@@ -209,6 +209,8 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
* Set the "dma handle"
*/
*handle = page_to_bus(page);
+ printk("\n### cut 0x%016llx to 0x%08x ###\n", page_to_bus(page), *handle);
@@ -396,8 +397,8 @@ mpt_reply(MPT_ADAPTER *ioc, u32 pa)
cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
- dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=
- ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
+ printk("Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
+ mr, req_idx, cb_idx, mr->u.hdr.Function);
DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
/* Check/log IOC log info
@@ -4271,13 +4273,16 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
/* Post Reply frames to FIFO
*/
alloc_dma = ioc->alloc_dma;
+ mem = ioc->alloc;
dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
for (i = 0; i < ioc->reply_depth; i++) {
/* Write each address to the IOC! */
CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
+ printk("post 0x%08x(0x%p)\n", alloc_dma, mem);
alloc_dma += ioc->reply_sz;
+ mem = (u8*)mem + ioc->reply_sz;
}
@@ -466,6 +467,7 @@ mpt_interrupt(int irq, void *bus_id)
* Drain the reply FIFO!
*/
do {
+ printk("%s: %08x\n", __FUNCTION__, le32_to_cpu(pa));
if (pa & MPI_ADDRESS_REPLY_A_BIT)
mpt_reply(ioc, pa);
else
resulting to the following:
...
ioc0: LSISAS1068E B3: Capabilities={Initiator}
### cut 0x00000100288c0000 to 0x288c0000 ###
### cut 0x00000100288f0000 to 0x288f0000 ###
post 0x288c0000(0xffe10000)
post 0x288c0050(0xffe10050)
post 0x288c00a0(0xffe100a0)
...
mpt_interrupt: 00004694
Got non-TURBO reply=ffe10000 req_idx=0 cb_idx=f Function=7
mpt_interrupt: 28004694
Got non-TURBO reply=ffe10050 req_idx=1 cb_idx=f Function=4
So, probably the following patch for work-around (2) is still
missing something, since cutting the high bits of 64-bit PCI address
doesn't break anything:
@@ -245,8 +245,8 @@
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
- /* Inbound 4GB range starting at 0 */
- dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
+ /* Inbound 4GB range starting at 1T */
+ dma-ranges = <0x42000000 0x100 0x0 0x0 0x0 0x1 0x00000000>;
/* This drives busses 0 to 0xf */
bus-range = <0x0 0xf>;
@@ -289,8 +289,8 @@
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
- /* Inbound 4GB range starting at 0 */
- dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
+ /* Inbound 4GB range starting at 1T */
+ dma-ranges = <0x42000000 0x100 0x0 0x0 0x0 0x1 0x00000000>;
/* This drives busses 10 to 0x1f */
bus-range = <0x10 0x1f>;
@@ -330,8 +330,8 @@
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
- /* Inbound 4GB range starting at 0 */
- dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
+ /* Inbound 4GB range starting at 1T */
+ dma-ranges = <0x42000000 0x100 0x0 0x0 0x0 0x1 0x00000000>;
/* This drives busses 10 to 0x1f */
bus-range = <0x20 0x2f>;
@@ -371,8 +371,8 @@
ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
- /* Inbound 4GB range starting at 0 */
- dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
+ /* Inbound 4GB range starting at 1T */
+ dma-ranges = <0x42000000 0x100 0x0 0x0 0x0 0x1 0x00000000>;
/* This drives busses 10 to 0x1f */
bus-range = <0x30 0x3f>;
@@ -59,7 +59,7 @@ extern int check_legacy_ioport(unsigned long base_port);
extern unsigned long isa_io_base;
extern unsigned long pci_io_base;
-extern unsigned long pci_dram_offset;
+extern resource_size_t pci_dram_offset;
extern resource_size_t isa_mem_base;
@@ -728,14 +728,14 @@ static inline void * phys_to_virt(unsigned long address)
*/
#ifdef CONFIG_PPC32
-static inline unsigned long virt_to_bus(volatile void * address)
+static inline resource_size_t virt_to_bus(volatile void * address)
{
if (address == NULL)
return 0;
return __pa(address) + PCI_DRAM_OFFSET;
}
-static inline void * bus_to_virt(unsigned long address)
+static inline void * bus_to_virt(resource_size_t address)
{
if (address == 0)
return NULL;
@@ -33,7 +33,7 @@
#endif
unsigned long isa_io_base = 0;
-unsigned long pci_dram_offset = 0;
+resource_size_t pci_dram_offset = 0;
int pcibios_assign_bus_offset = 1;
void pcibios_make_OF_bus_map(void);
@@ -126,10 +126,8 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
if ((pci_space & 0x03000000) != 0x02000000)
continue;
- /* We currently only support memory at 0, and pci_addr
- * within 32 bits space
- */
- if (cpu_addr != 0 || pci_addr > 0xffffffff) {
+ /* We currently only support memory at 0 */
+ if (cpu_addr != 0) {
printk(KERN_WARNING "%s: Ignored unsupported dma range"
" 0x%016llx...0x%016llx -> 0x%016llx\n",
hose->dn->full_name,
@@ -179,18 +177,12 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
return -ENXIO;
}
- /* Check that we are fully contained within 32 bits space */
- if (res->end > 0xffffffff) {
- printk(KERN_ERR "%s: dma-ranges outside of 32 bits space\n",
- hose->dn->full_name);
- return -ENXIO;
- }
out:
dma_offset_set = 1;
pci_dram_offset = res->start;
- printk(KERN_INFO "4xx PCI DMA offset set to 0x%08lx\n",
- pci_dram_offset);
+ printk(KERN_INFO "4xx PCI DMA offset set to 0x%016llx\n",
+ (unsigned long long)pci_dram_offset);
return 0;
}