| Message ID | 20201127130505.724814-2-hegdevasant@linux.vnet.ibm.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/2] hw/ocmb: Fix log message | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch master (b825589e085e23add8d0c58cfde7c8ed1f0b2dfd) |
| snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot | success | Test snowpatch/job/snowpatch-skiboot on branch master |
| snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco | success | Signed-off-by present |
On 11/27/20 6:35 PM, Vasant Hegde wrote: > Looks like HBRT sets top bit in pcbaddress before making OCMB SCOM request. > We have to clear that bit so that we can find proper address range > for SCOM operation. > > Sample failure: > [ 2578.156011925,3] OCMB: no matching address range! > [ 2578.156044481,3] scom_read: to 80000028 off: 8006430d4008c000 rc = -26 > > Also move HRMOR_BIT macro to common include file (hdata/spira.h -> skiboot.h). Merged to master as of f6ea3719782c478e. -Vasant
diff --git a/hdata/spira.h b/hdata/spira.h index f7a1b8237..0e658795c 100644 --- a/hdata/spira.h +++ b/hdata/spira.h @@ -6,12 +6,6 @@ #include "hdif.h" -/* - * To help the FSP to distinguish between physical address and TCE mapped address. - * Also to help hostboot to distinguish physical and relative address. - */ -#define HRMOR_BIT (1ul << 63) - /* * The SPIRA structure * diff --git a/hw/ocmb.c b/hw/ocmb.c index 30a5ad726..bc470d0ab 100644 --- a/hw/ocmb.c +++ b/hw/ocmb.c @@ -35,12 +35,13 @@ struct ocmb { static const struct ocmb_range *find_range(const struct ocmb *o, uint64_t offset) { int i; + uint64_t addr = offset & ~(HRMOR_BIT); for (i = 0; i < o->range_count; i++) { uint64_t start = o->ranges[i].start; uint64_t end = o->ranges[i].end; - if (offset >= start && offset <= end) + if (addr >= start && addr <= end) return &o->ranges[i]; } diff --git a/include/skiboot.h b/include/skiboot.h index 7b71ebd9f..d33c02506 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -143,6 +143,12 @@ static inline bool is_pow2(unsigned long val) #define PCI_DEV(bdfn) (((bdfn) >> 3) & 0x1f) #define PCI_FUNC(bdfn) ((bdfn) & 0x07) +/* + * To help the FSP to distinguish between physical address and TCE mapped address. + * Also to help hostboot to distinguish physical and relative address. + */ +#define HRMOR_BIT (1ul << 63) + /* Clean the stray high bit which the FSP inserts: we only have 52 bits real */ static inline u64 cleanup_addr(u64 addr) {
Looks like HBRT sets top bit in pcbaddress before making OCMB SCOM request. We have to clear that bit so that we can find proper address range for SCOM operation. Sample failure: [ 2578.156011925,3] OCMB: no matching address range! [ 2578.156044481,3] scom_read: to 80000028 off: 8006430d4008c000 rc = -26 Also move HRMOR_BIT macro to common include file (hdata/spira.h -> skiboot.h). Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> --- hdata/spira.h | 6 ------ hw/ocmb.c | 3 ++- include/skiboot.h | 6 ++++++ 3 files changed, 8 insertions(+), 7 deletions(-)