| Message ID | 5f7c528a-8ae0-7e9c-dbe5-e6e7fe5b2b66@xilinx.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [U-Boot,GIT,PULL] Xilinx patches for v2018.05-rc2 | expand |
On Mon, Apr 09, 2018 at 04:39:29PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > > Travis looks good. > https://travis-ci.org/michalsimek/u-boot/builds/364047688 > > And buildman output too. > > Thanks, > Michal > > > The following changes since commit 5bc0543df3079add8152afa041b887d081d71839: > > treewide: Convert CONFIG_HOSTNAME to a string option (2018-04-08 > 18:31:09 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.05-rc2 > > for you to fetch changes up to f190eaf002bf1434587d57c726b3dabfabbc8074: > > arm64: zynqmp: Add support for Xilinx zcu111-revA (2018-04-09 12:14:53 > +0200) > Applied to u-boot/master, thanks! But a small request. A number of Xilinx have commits in the form of: Author: Their Name <their.name@xilinx.com> ... Signed-off-by: Their Name: <tname@xilinx.com> Which is fine in that it's clear that the Author also S-o-B'd it. But since the email doesn't match is does trigger my script that shows me the log to manually confirm the author S-o-B'd it. Can you please ask the team to check their gitconfig? Thanks!
On 10.4.2018 16:08, Tom Rini wrote: > On Mon, Apr 09, 2018 at 04:39:29PM +0200, Michal Simek wrote: > >> Hi Tom, >> >> please pull these changes to your tree. >> >> Travis looks good. >> https://travis-ci.org/michalsimek/u-boot/builds/364047688 >> >> And buildman output too. >> >> Thanks, >> Michal >> >> >> The following changes since commit 5bc0543df3079add8152afa041b887d081d71839: >> >> treewide: Convert CONFIG_HOSTNAME to a string option (2018-04-08 >> 18:31:09 -0400) >> >> are available in the git repository at: >> >> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.05-rc2 >> >> for you to fetch changes up to f190eaf002bf1434587d57c726b3dabfabbc8074: >> >> arm64: zynqmp: Add support for Xilinx zcu111-revA (2018-04-09 12:14:53 >> +0200) >> > > Applied to u-boot/master, thanks! > > But a small request. A number of Xilinx have commits in the form of: > Author: Their Name <their.name@xilinx.com> > ... > Signed-off-by: Their Name: <tname@xilinx.com> > > Which is fine in that it's clear that the Author also S-o-B'd it. But > since the email doesn't match is does trigger my script that shows me > the log to manually confirm the author S-o-B'd it. Can you please ask > the team to check their gitconfig? Thanks! Xilinx is allowing to have email setup in both forms. I see that Siva, Nitin, Vipul and maybe others have that incorrect setting. Do you have that script somewhere to also include it to my flow to make sure that this is aligned when I accept these patches internally too? Thanks, Michal
On Tue, Apr 10, 2018 at 04:16:14PM +0200, Michal Simek wrote: > On 10.4.2018 16:08, Tom Rini wrote: > > On Mon, Apr 09, 2018 at 04:39:29PM +0200, Michal Simek wrote: > > > >> Hi Tom, > >> > >> please pull these changes to your tree. > >> > >> Travis looks good. > >> https://travis-ci.org/michalsimek/u-boot/builds/364047688 > >> > >> And buildman output too. > >> > >> Thanks, > >> Michal > >> > >> > >> The following changes since commit 5bc0543df3079add8152afa041b887d081d71839: > >> > >> treewide: Convert CONFIG_HOSTNAME to a string option (2018-04-08 > >> 18:31:09 -0400) > >> > >> are available in the git repository at: > >> > >> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.05-rc2 > >> > >> for you to fetch changes up to f190eaf002bf1434587d57c726b3dabfabbc8074: > >> > >> arm64: zynqmp: Add support for Xilinx zcu111-revA (2018-04-09 12:14:53 > >> +0200) > >> > > > > Applied to u-boot/master, thanks! > > > > But a small request. A number of Xilinx have commits in the form of: > > Author: Their Name <their.name@xilinx.com> > > ... > > Signed-off-by: Their Name: <tname@xilinx.com> > > > > Which is fine in that it's clear that the Author also S-o-B'd it. But > > since the email doesn't match is does trigger my script that shows me > > the log to manually confirm the author S-o-B'd it. Can you please ask > > the team to check their gitconfig? Thanks! > > Xilinx is allowing to have email setup in both forms. That's fairly common. FWIW, it pops up sometimes for TI and NXP/Freescale (I don't know if it will follow over to qcom). > I see that Siva, Nitin, Vipul and maybe others have that incorrect setting. > Do you have that script somewhere to also include it to my flow to make > sure that this is aligned when I accept these patches internally too? Sure. This is ugly, but functional: #!/bin/bash COMMITS=`git log --no-merges origin/master.. --oneline | wc -l` SIGNS=`mktemp` for HASH in `git log --no-merges origin/master.. --format=%h`;do EMAIL=`git log -n1 --format=%ae $HASH`; git log --grep="Signed-off-by.*$EMAIL" ${HASH}^..${HASH} --format="Commit %h is OK";done > $SIGNS if test $COMMITS -ne `cat $SIGNS | wc -l`;then echo Problematic commits exist: for HASH in `git log --no-merges origin/master.. --format=%h`;do EMAIL=`git log -n1 --format=%ae $HASH`; git log --grep="Signed-off-by.*$EMAIL" --invert-grep ${HASH}^..${HASH};done rm -f $SIGNS exit 1 else rm -f $SIGNS echo "All commits appear OK" fi
On 10.4.2018 16:28, Tom Rini wrote: > On Tue, Apr 10, 2018 at 04:16:14PM +0200, Michal Simek wrote: >> On 10.4.2018 16:08, Tom Rini wrote: >>> On Mon, Apr 09, 2018 at 04:39:29PM +0200, Michal Simek wrote: >>> >>>> Hi Tom, >>>> >>>> please pull these changes to your tree. >>>> >>>> Travis looks good. >>>> https://travis-ci.org/michalsimek/u-boot/builds/364047688 >>>> >>>> And buildman output too. >>>> >>>> Thanks, >>>> Michal >>>> >>>> >>>> The following changes since commit 5bc0543df3079add8152afa041b887d081d71839: >>>> >>>> treewide: Convert CONFIG_HOSTNAME to a string option (2018-04-08 >>>> 18:31:09 -0400) >>>> >>>> are available in the git repository at: >>>> >>>> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.05-rc2 >>>> >>>> for you to fetch changes up to f190eaf002bf1434587d57c726b3dabfabbc8074: >>>> >>>> arm64: zynqmp: Add support for Xilinx zcu111-revA (2018-04-09 12:14:53 >>>> +0200) >>>> >>> >>> Applied to u-boot/master, thanks! >>> >>> But a small request. A number of Xilinx have commits in the form of: >>> Author: Their Name <their.name@xilinx.com> >>> ... >>> Signed-off-by: Their Name: <tname@xilinx.com> >>> >>> Which is fine in that it's clear that the Author also S-o-B'd it. But >>> since the email doesn't match is does trigger my script that shows me >>> the log to manually confirm the author S-o-B'd it. Can you please ask >>> the team to check their gitconfig? Thanks! >> >> Xilinx is allowing to have email setup in both forms. > > That's fairly common. FWIW, it pops up sometimes for TI and > NXP/Freescale (I don't know if it will follow over to qcom). > >> I see that Siva, Nitin, Vipul and maybe others have that incorrect setting. >> Do you have that script somewhere to also include it to my flow to make >> sure that this is aligned when I accept these patches internally too? > > Sure. This is ugly, but functional: > #!/bin/bash > COMMITS=`git log --no-merges origin/master.. --oneline | wc -l` > SIGNS=`mktemp` > > for HASH in `git log --no-merges origin/master.. --format=%h`;do EMAIL=`git log -n1 --format=%ae $HASH`; git log --grep="Signed-off-by.*$EMAIL" ${HASH}^..${HASH} --format="Commit %h is OK";done > $SIGNS > > if test $COMMITS -ne `cat $SIGNS | wc -l`;then > echo Problematic commits exist: > for HASH in `git log --no-merges origin/master.. --format=%h`;do EMAIL=`git log -n1 --format=%ae $HASH`; git log --grep="Signed-off-by.*$EMAIL" --invert-grep ${HASH}^..${HASH};done > rm -f $SIGNS > exit 1 > else > rm -f $SIGNS > echo "All commits appear OK" > fi > Ok. I have let all xilinx people know to fix their setup and will start to checking that. It will be good to integrate this checking in patman. Thanks, Michal
Hi Tom, please pull these changes to your tree. Travis looks good. https://travis-ci.org/michalsimek/u-boot/builds/364047688 And buildman output too. Thanks, Michal The following changes since commit 5bc0543df3079add8152afa041b887d081d71839: treewide: Convert CONFIG_HOSTNAME to a string option (2018-04-08 18:31:09 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.05-rc2 for you to fetch changes up to f190eaf002bf1434587d57c726b3dabfabbc8074: arm64: zynqmp: Add support for Xilinx zcu111-revA (2018-04-09 12:14:53 +0200) ---------------------------------------------------------------- Xilinx changes for v2018.05-rc2 - Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL init for zcu102 revA - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX and zc1751-dc3 - Net fixes - xlnx,phy-type - 64bit axi ethernet support - arasan: Fix nand write issue - fpga fixes - Maintainer file updates ---------------------------------------------------------------- Anton Gerasimov (2): ARM: dts: zynq: Update dts for Z-turn board ARM: dts: zynq: Rename dts for Z-turn board Heinrich Schuchardt (1): MAINTAINERS: ZYNQMP: correct entries Javier Martinez Canillas (1): ARM: dts: zynq: Add generic compatible string for I2C EEPROM Luca Ceresoli (1): arm64: zynqmp: Enable booting to ATF Michal Simek (38): arm: zynq: Handle ENXIO error return value properly MAINTAINERS: Fix zynqmp clock driver path arm64: zynqmp: Sync alignment with mainline arm64: zynqmp: Use maxim prefix for all maxim chips arm64: zynqmp: Use i2c-mux instead of i2cswitch instead arm64: zynqmp: Sync up license with mainline kernel arm64: zynqmp: Remove additional comments from dts files arm64: zynqmp: Use keycode from input/input.h arm64: zynqmp: Use s/_/-/g in node name for zcu102 rev1.0 arm64: zynqmp: Fix spi flash partition definition for zc1751 dc2 arm64: zynqmp: Use atmel prefix instead of at arm64: zynqmp: Add eeprom reference to eeprom nodes arm64: zynqmp: Enable ttcs for zc1751 dc5 arm64: zynqmp: Remove u-boot commands from dts files arm64: zynqmp: Remove number from clock-generator node name arm64: zynqmp: Add silabs prefix to u69 for zcu102 arm64: zynqmp: Remove double spaces from dts file arm: zynq: Remove 0x prefixes from cc108 arm: zynq: Sync up licenses with mainline kernel arm: zynq: Use i2c-mux instead of i2cswitch for pca9548 arm: zynq: Fix eeprom dt nodes arm: zynq: Use fixed partitions for spi flash for zc770 xm010 clk: zynqmp: Add new compatible string for clock driver arm64: zynqmp: Enable pxe and dhcp if commands are enabled arm64: zynqmp: Enable ethernet phys for zc1751 dc5 arm64: zynqmp: Enable mac address randomization for zc1751 dc5 arm64: zynqmp: Enable Fixed link support arm64: zynqmp: Add low level initialization for zcu102-revA arm64: zynqmp: Add low level initialization for zc1751 arm64: zynqmp: Remove power domain description arm64: zynqmp: Remove pinctrl settings arm64: zynqmp: Get 200MHz clock early for MMC arm64: zynqmp: Add support for zcu100 aka Ultra96 board arm64: zynqmp: Add support for zc1751 dc3 arm64: zynqmp: Add support for zc12xx boards arm64: zynqmp: Add support for zcu104 customer board arm64: zynqmp: Add support for Xilinx zcu106-revA arm64: zynqmp: Add support for Xilinx zcu111-revA Nitin Jain (1): fpga: zynqmp: Add support to get the PCAP status for fpga info command Siva Durga Prasad Paladugu (4): fpga: zynqmp: Update zynqmp_load() as per latest xilfpga fpga: zynqmp: Fix the nonsecure bitstream loading issue fpga: zynq: Add delay after PCFG_PROG_B change net: phy: xilinx_phy: Read phytype using property xlnx,phy-type Srinivas Goud (1): arm64: zynqmp: Update sd properties for dc5 Vipul Kumar (2): nand: arasan_nfc: Fixed NAND write issue axi: ethernet: Added support for 64 bit addressing for axi-ethernet MAINTAINERS | 6 +- arch/arm/dts/Makefile | 11 +- arch/arm/dts/zynq-cc108.dts | 15 ++- arch/arm/dts/zynq-zc702.dts | 9 +- arch/arm/dts/zynq-zc706.dts | 9 +- arch/arm/dts/zynq-zc770-xm010.dts | 24 ++-- arch/arm/dts/zynq-zc770-xm011.dts | 9 +- arch/arm/dts/zynq-zc770-xm012.dts | 13 +- arch/arm/dts/zynq-zc770-xm013.dts | 5 +- arch/arm/dts/zynq-zed.dts | 5 +- arch/arm/dts/{zynq-zturn-myir.dts => zynq-zturn.dts} | 61 ++------- arch/arm/dts/zynq-zybo.dts | 5 +- arch/arm/dts/zynqmp-clk-ccf.dtsi | 3 +- arch/arm/dts/zynqmp-clk.dtsi | 6 +- arch/arm/dts/zynqmp-zc1232-revA.dts | 87 +++++++++++++ arch/arm/dts/zynqmp-zc1254-revA.dts | 72 +++++++++++ arch/arm/dts/zynqmp-zc1275-revA.dts | 72 +++++++++++ arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 11 +- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 22 ++-- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 210 +++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 25 +++- arch/arm/dts/zynqmp-zcu100-revC.dts | 343 +++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 15 ++- arch/arm/dts/zynqmp-zcu102-revA.dts | 399 +++++++---------------------------------------------------- arch/arm/dts/zynqmp-zcu102-revB.dts | 11 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 265 +++++++++++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp-zcu104-revC.dts | 266 +++++++++++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp-zcu106-revA.dts | 596 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp-zcu111-revA.dts | 525 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp.dtsi | 219 +++----------------------------- arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 + arch/arm/mach-zynq/clk.c | 3 +- board/xilinx/zynqmp/zynqmp-zc1232-revA/psu_init_gpl.c | 745 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1254-revA/psu_init_gpl.c | 467 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1275-revA | 1 + board/xilinx/zynqmp/zynqmp-zc1751-xm015-dc1/psu_init_gpl.c | 912 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1751-xm016-dc2/psu_init_gpl.c | 900 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1751-xm017-dc3/psu_init_gpl.c | 900 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1751-xm018-dc4/psu_init_gpl.c | 900 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1751-xm019-dc5/psu_init_gpl.c | 926 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 993 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c | 826 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c | 878 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zcu104-revC | 1 + board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c | 802 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ configs/xilinx_zynqmp_zc1232_revA_defconfig | 53 ++++++++ configs/xilinx_zynqmp_zc1254_revA_defconfig | 53 ++++++++ configs/xilinx_zynqmp_zc1275_revA_defconfig | 53 ++++++++ configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 + configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 + configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig | 86 +++++++++++++ configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 + configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 8 ++ configs/xilinx_zynqmp_zcu100_revC_defconfig | 83 +++++++++++++ configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 + configs/xilinx_zynqmp_zcu102_revA_defconfig | 2 + configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 + configs/xilinx_zynqmp_zcu104_revA_defconfig | 95 ++++++++++++++ configs/xilinx_zynqmp_zcu104_revC_defconfig | 95 ++++++++++++++ configs/xilinx_zynqmp_zcu106_revA_defconfig | 104 ++++++++++++++++ configs/xilinx_zynqmp_zcu111_revA_defconfig | 95 ++++++++++++++ configs/zynq_z_turn_defconfig | 2 +- drivers/clk/clk_zynqmp.c | 1 + drivers/fpga/zynqmppl.c | 28 +++-- drivers/fpga/zynqpl.c | 16 +++ drivers/mtd/nand/arasan_nfc.c | 4 +- drivers/net/phy/xilinx_phy.c | 2 +- drivers/net/xilinx_axi_emac.c | 33 +++-- include/configs/xilinx_zynqmp.h | 16 ++- include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h | 20 +++ include/configs/xilinx_zynqmp_zcu100.h | 36 ++++++ include/configs/xilinx_zynqmp_zcu104.h | 36 ++++++ include/configs/xilinx_zynqmp_zcu106.h | 47 +++++++ include/configs/xilinx_zynqmp_zcu111.h | 50 ++++++++ include/dt-bindings/pinctrl/pinctrl-zynqmp.h | 30 ----- include/zynqmppl.h | 1 + 77 files changed, 12876 insertions(+), 764 deletions(-) rename arch/arm/dts/{zynq-zturn-myir.dts => zynq-zturn.dts} (55%) create mode 100644 arch/arm/dts/zynqmp-zc1232-revA.dts create mode 100644 arch/arm/dts/zynqmp-zc1254-revA.dts create mode 100644 arch/arm/dts/zynqmp-zc1275-revA.dts create mode 100644 arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts create mode 100644 arch/arm/dts/zynqmp-zcu100-revC.dts create mode 100644 arch/arm/dts/zynqmp-zcu104-revA.dts create mode 100644 arch/arm/dts/zynqmp-zcu104-revC.dts create mode 100644 arch/arm/dts/zynqmp-zcu106-revA.dts create mode 100644 arch/arm/dts/zynqmp-zcu111-revA.dts create mode 100644 board/xilinx/zynqmp/zynqmp-zc1232-revA/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zc1254-revA/psu_init_gpl.c create mode 120000 board/xilinx/zynqmp/zynqmp-zc1275-revA create mode 100644 board/xilinx/zynqmp/zynqmp-zc1751-xm015-dc1/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zc1751-xm016-dc2/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zc1751-xm017-dc3/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zc1751-xm018-dc4/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zc1751-xm019-dc5/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c create mode 120000 board/xilinx/zynqmp/zynqmp-zcu104-revC create mode 100644 board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c create mode 100644 configs/xilinx_zynqmp_zc1232_revA_defconfig create mode 100644 configs/xilinx_zynqmp_zc1254_revA_defconfig create mode 100644 configs/xilinx_zynqmp_zc1275_revA_defconfig create mode 100644 configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig create mode 100644 configs/xilinx_zynqmp_zcu100_revC_defconfig create mode 100644 configs/xilinx_zynqmp_zcu104_revA_defconfig create mode 100644 configs/xilinx_zynqmp_zcu104_revC_defconfig create mode 100644 configs/xilinx_zynqmp_zcu106_revA_defconfig create mode 100644 configs/xilinx_zynqmp_zcu111_revA_defconfig create mode 100644 include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h create mode 100644 include/configs/xilinx_zynqmp_zcu100.h create mode 100644 include/configs/xilinx_zynqmp_zcu104.h create mode 100644 include/configs/xilinx_zynqmp_zcu106.h create mode 100644 include/configs/xilinx_zynqmp_zcu111.h delete mode 100644 include/dt-bindings/pinctrl/pinctrl-zynqmp.h This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.