diff mbox series

[U-Boot] ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit.

Message ID 1510713820-19985-1-git-send-email-uboot@andestech.com
State Accepted
Commit 0e920ef052e2a5d33b1fd37b0b0ef7b74831e851
Delegated to: Andes
Headers show
Series [U-Boot] ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit. | expand

Commit Message

Andes Nov. 15, 2017, 2:43 a.m. UTC 
From: Rick Chen <rick@andestech.com>

It will be work fine with unsigned long declaretion in timer
register struct when system is 32 bit. But it will not work
well when system is 64 bit. Replace it by u32 and verify both
ok in 32/64 bit.

Signed-off-by: Rick Chen <rick@andestech.com>
---
 drivers/timer/ae3xx_timer.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Simon Glass Nov. 20, 2017, 3:39 p.m. UTC | #1 
On 14 November 2017 at 19:43, Andes <uboot@andestech.com> wrote:
> From: Rick Chen <rick@andestech.com>
>
> It will be work fine with unsigned long declaretion in timer
> register struct when system is 32 bit. But it will not work
> well when system is 64 bit. Replace it by u32 and verify both
> ok in 32/64 bit.
>
> Signed-off-by: Rick Chen <rick@andestech.com>
> ---
>  drivers/timer/ae3xx_timer.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>
diff mbox series

Patch

diff --git a/drivers/timer/ae3xx_timer.c b/drivers/timer/ae3xx_timer.c
index bcc07a0..b710c28 100644
--- a/drivers/timer/ae3xx_timer.c
+++ b/drivers/timer/ae3xx_timer.c
@@ -14,7 +14,7 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define REG32_TMR(x)	(*(unsigned long *)	((plat->regs) + (x>>2)))
+#define REG32_TMR(x)	(*(u32 *)	((plat->regs) + (x>>2)))
 
 /*
  * Definition of register offsets
@@ -68,7 +68,7 @@  struct atctmr_timer_regs {
 };
 
 struct atftmr_timer_platdata {
-	unsigned long *regs;
+	u32 *regs;
 };
 
 static int atftmr_timer_get_count(struct udevice *dev, u64 *count)