Message ID | 1291390657-21923-1-git-send-email-s-paulraj@ti.com |
---|---|
State | Accepted |
Commit | aac0b4b6c153c413b4541a61d9c4296eef689e07 |
Delegated to: | Sandeep Paulraj |
Headers | show |
Hi Sandeep, Le 03/12/2010 16:37, s-paulraj@ti.com a écrit : > From: Sandeep Paulraj<s-paulraj@ti.com> > > The DM6446 does not build due to the ARM > relocation patch. > > Also the board does not build in the NOR > mode. Changed default to NAND to ensure > no build failure. What exactly is the build error message in NOR mode? Amicalement,
Albert, > > From: Sandeep Paulraj <s-paulraj@ti.com> > > The DM6446 does not build due to the ARM > relocation patch. > > Also the board does not build in the NOR > mode. Changed default to NAND to ensure > no build failure. In the NOR mode, the build complained about a CONFIG variable not being defined for the NOR. I have fixed that as well. I cannot test that yet. That will probably be a follow up patch. > While at it removed CONFIG_CMD_KGDB > > Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> --Sandeep
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index e1b1db1..45214fa 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -50,7 +50,7 @@ /*=======*/ #define DV_EVM #define CONFIG_SYS_NAND_SMALLPAGE -#define CONFIG_SYS_USE_NOR +#define CONFIG_SYS_USE_NAND #define CONFIG_DISPLAY_CPUINFO /*===================*/ /* SoC Configuration */ @@ -78,6 +78,7 @@ #define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ + #define DDR_8BANKS /* 8-bank DDR2 (256MB) */ /*====================*/ /* Serial Driver info */ @@ -228,11 +229,13 @@ #define CONFIG_PREBOOT "usb start" #endif #endif -/*=======================*/ -/* KGDB support (if any) */ -/*=======================*/ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */