| Message ID | 1431580312-24880-3-git-send-email-tharvey@gateworks.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Stefano Babic |
| Headers | show |
2015-05-14 7:11 GMT+02:00 Tim Harvey <tharvey@gateworks.com>: > The MX6 has a temperature grade defined by OCOTP_MEM0[7:6] which is at 0x480 > in the Fusemap Description Table in the reference manual. Return this value > as well as min/max temperature based on the value. > > Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the > their Fusemap Description Table however Freescale has confirmed that these > eFUSE bits match the description within the IMX6DQRM and that they will > be added to the next revision of the respective reference manuals. > > This has been tested with IMX6 Automative and Industrial parts. > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > --- > v2: > - split out adding get_cpu_temp_grade to its own patch > - added note about support of MX6SDL and MX6SX > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > --- > arch/arm/cpu/armv7/mx6/soc.c | 38 +++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + > include/imx_thermal.h | 6 +++++ > 3 files changed, 45 insertions(+) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 71fa1fb..6f501ac 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -124,6 +124,44 @@ u32 get_cpu_speed_grade_hz(void) > return 0; > } > > +/* > + * OCOTP_MEM0[7:6] (see Fusemap Description Table offset 0x480) > + * defines a 2-bit Temperature Grade > + * > + * return temperature grade and min/max temperature in celcius > + */ > +#define OCOTP_MEM0_TEMP_SHIFT 6 > + > +u32 get_cpu_temp_grade(int *minc, int *maxc) > +{ > + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; > + struct fuse_bank *bank = &ocotp->bank[1]; > + struct fuse_bank1_regs *fuse = > + (struct fuse_bank1_regs *)bank->fuse_regs; > + uint32_t val; > + > + val = readl(&fuse->mem0); > + val >>= OCOTP_MEM0_TEMP_SHIFT; > + val &= 0x3; > + > + if (minc && maxc) { > + if (val == TEMP_AUTOMOTIVE) { > + *minc = -40; > + *maxc = 125; > + } else if (val == TEMP_INDUSTRIAL) { > + *minc = -40; > + *maxc = 105; > + } else if (val == TEMP_EXTCOMMERCIAL) { > + *minc = -20; > + *maxc = 105; > + } else { > + *minc = 0; > + *maxc = 95; > + } > + } > + return val; > +} > + > #ifdef CONFIG_REVISION_TAG > u32 __weak get_board_rev(void) > { > diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h > index a2cd0a9..c583291 100644 > --- a/arch/arm/include/asm/arch-mx6/sys_proto.h > +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h > @@ -17,6 +17,7 @@ > u32 get_nr_cpus(void); > u32 get_cpu_rev(void); > u32 get_cpu_speed_grade_hz(void); > +u32 get_cpu_temp_grade(int *minc, int *maxc); > > /* returns MXC_CPU_ value */ > #define cpu_type(rev) (((rev) >> 12)&0xff) > diff --git a/include/imx_thermal.h b/include/imx_thermal.h > index be13652..8ce333c 100644 > --- a/include/imx_thermal.h > +++ b/include/imx_thermal.h > @@ -8,6 +8,12 @@ > #ifndef _IMX_THERMAL_H_ > #define _IMX_THERMAL_H_ > > +/* CPU Temperature Grades */ > +#define TEMP_COMMERCIAL 0 > +#define TEMP_EXTCOMMERCIAL 1 > +#define TEMP_INDUSTRIAL 2 > +#define TEMP_AUTOMOTIVE 3 > + > struct imx_thermal_plat { > void *regs; > int fuse_bank; > -- > 1.9.1 > Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> greets -- Christian Gmeiner, MSc https://soundcloud.com/christian-gmeiner
On 05/14/2015 08:11 AM, Tim Harvey wrote: > The MX6 has a temperature grade defined by OCOTP_MEM0[7:6] which is at 0x480 > in the Fusemap Description Table in the reference manual. Return this value > as well as min/max temperature based on the value. > > Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the > their Fusemap Description Table however Freescale has confirmed that these > eFUSE bits match the description within the IMX6DQRM and that they will > be added to the next revision of the respective reference manuals. > > This has been tested with IMX6 Automative and Industrial parts. > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > --- > v2: > - split out adding get_cpu_temp_grade to its own patch > - added note about support of MX6SDL and MX6SX > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > --- > arch/arm/cpu/armv7/mx6/soc.c | 38 +++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + > include/imx_thermal.h | 6 +++++ > 3 files changed, 45 insertions(+) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 71fa1fb..6f501ac 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -124,6 +124,44 @@ u32 get_cpu_speed_grade_hz(void) > return 0; > } > > +/* > + * OCOTP_MEM0[7:6] (see Fusemap Description Table offset 0x480) > + * defines a 2-bit Temperature Grade > + * > + * return temperature grade and min/max temperature in celcius > + */ > +#define OCOTP_MEM0_TEMP_SHIFT 6 > + > +u32 get_cpu_temp_grade(int *minc, int *maxc) > +{ > + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; > + struct fuse_bank *bank = &ocotp->bank[1]; > + struct fuse_bank1_regs *fuse = > + (struct fuse_bank1_regs *)bank->fuse_regs; > + uint32_t val; > + > + val = readl(&fuse->mem0); > + val >>= OCOTP_MEM0_TEMP_SHIFT; > + val &= 0x3; > + > + if (minc && maxc) { > + if (val == TEMP_AUTOMOTIVE) { > + *minc = -40; > + *maxc = 125; > + } else if (val == TEMP_INDUSTRIAL) { > + *minc = -40; > + *maxc = 105; > + } else if (val == TEMP_EXTCOMMERCIAL) { > + *minc = -20; > + *maxc = 105; > + } else { > + *minc = 0; > + *maxc = 95; > + } > + } > + return val; > +} > + > #ifdef CONFIG_REVISION_TAG > u32 __weak get_board_rev(void) > { > diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h > index a2cd0a9..c583291 100644 > --- a/arch/arm/include/asm/arch-mx6/sys_proto.h > +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h > @@ -17,6 +17,7 @@ > u32 get_nr_cpus(void); > u32 get_cpu_rev(void); > u32 get_cpu_speed_grade_hz(void); > +u32 get_cpu_temp_grade(int *minc, int *maxc); > > /* returns MXC_CPU_ value */ > #define cpu_type(rev) (((rev) >> 12)&0xff) > diff --git a/include/imx_thermal.h b/include/imx_thermal.h > index be13652..8ce333c 100644 > --- a/include/imx_thermal.h > +++ b/include/imx_thermal.h > @@ -8,6 +8,12 @@ > #ifndef _IMX_THERMAL_H_ > #define _IMX_THERMAL_H_ > > +/* CPU Temperature Grades */ > +#define TEMP_COMMERCIAL 0 > +#define TEMP_EXTCOMMERCIAL 1 > +#define TEMP_INDUSTRIAL 2 > +#define TEMP_AUTOMOTIVE 3 > + > struct imx_thermal_plat { > void *regs; > int fuse_bank; > Tested-by: Nikolay Dimitrov <picmaster@mail.bg> Regards, Nikolay
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 71fa1fb..6f501ac 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -124,6 +124,44 @@ u32 get_cpu_speed_grade_hz(void) return 0; } +/* + * OCOTP_MEM0[7:6] (see Fusemap Description Table offset 0x480) + * defines a 2-bit Temperature Grade + * + * return temperature grade and min/max temperature in celcius + */ +#define OCOTP_MEM0_TEMP_SHIFT 6 + +u32 get_cpu_temp_grade(int *minc, int *maxc) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + uint32_t val; + + val = readl(&fuse->mem0); + val >>= OCOTP_MEM0_TEMP_SHIFT; + val &= 0x3; + + if (minc && maxc) { + if (val == TEMP_AUTOMOTIVE) { + *minc = -40; + *maxc = 125; + } else if (val == TEMP_INDUSTRIAL) { + *minc = -40; + *maxc = 105; + } else if (val == TEMP_EXTCOMMERCIAL) { + *minc = -20; + *maxc = 105; + } else { + *minc = 0; + *maxc = 95; + } + } + return val; +} + #ifdef CONFIG_REVISION_TAG u32 __weak get_board_rev(void) { diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index a2cd0a9..c583291 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -17,6 +17,7 @@ u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void); +u32 get_cpu_temp_grade(int *minc, int *maxc); /* returns MXC_CPU_ value */ #define cpu_type(rev) (((rev) >> 12)&0xff) diff --git a/include/imx_thermal.h b/include/imx_thermal.h index be13652..8ce333c 100644 --- a/include/imx_thermal.h +++ b/include/imx_thermal.h @@ -8,6 +8,12 @@ #ifndef _IMX_THERMAL_H_ #define _IMX_THERMAL_H_ +/* CPU Temperature Grades */ +#define TEMP_COMMERCIAL 0 +#define TEMP_EXTCOMMERCIAL 1 +#define TEMP_INDUSTRIAL 2 +#define TEMP_AUTOMOTIVE 3 + struct imx_thermal_plat { void *regs; int fuse_bank;