Series Detail
Show a series.
GET /api/series/498564/?format=api
{ "id": 498564, "url": "http://patchwork.ozlabs.org/api/series/498564/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=498564", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "name": "dpll/ice: Add TXC DPLL type and full TX reference clock control for E825", "date": "2026-04-02T23:06:18", "submitter": { "id": 82711, "url": "http://patchwork.ozlabs.org/api/people/82711/?format=api", "name": "Grzegorz Nitka", "email": "grzegorz.nitka@intel.com" }, "version": 5, "total": 8, "received_total": 8, "received_all": true, "mbox": "http://patchwork.ozlabs.org/series/498564/mbox/", "cover_letter": { "id": 2219410, "url": "http://patchwork.ozlabs.org/api/covers/2219410/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/cover/20260402230626.3826719-1-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-1-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:18", "name": "[v5,net-next,0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/cover/20260402230626.3826719-1-grzegorz.nitka@intel.com/mbox/" }, "patches": [ { "id": 2219411, "url": "http://patchwork.ozlabs.org/api/patches/2219411/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-2-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-2-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:19", "name": "[v5,net-next,1/8] dpll: add new DPLL type for transmit clock (TXC) usage", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-2-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219412, "url": "http://patchwork.ozlabs.org/api/patches/2219412/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-3-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-3-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:20", "name": "[v5,net-next,2/8] dpll: allow registering FW-identified pin with a different DPLL", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-3-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219413, "url": "http://patchwork.ozlabs.org/api/patches/2219413/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-4-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-4-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:21", "name": "[v5,net-next,3/8] dpll: extend pin notifier and netlink events with notification source ID", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-4-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219414, "url": "http://patchwork.ozlabs.org/api/patches/2219414/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-5-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-5-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:22", "name": "[v5,net-next,4/8] dpll: zl3073x: allow SyncE_Ref pin state change", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-5-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219415, "url": "http://patchwork.ozlabs.org/api/patches/2219415/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-6-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-6-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:23", "name": "[v5,net-next,5/8] ice: introduce TXC DPLL device and TX ref clock pin framework for E825", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-6-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219416, "url": "http://patchwork.ozlabs.org/api/patches/2219416/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-7-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-7-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:24", "name": "[v5,net-next,6/8] ice: implement CPI support for E825C", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-7-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219417, "url": "http://patchwork.ozlabs.org/api/patches/2219417/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-8-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-8-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:25", "name": "[v5,net-next,7/8] ice: add Tx reference clock index handling to AN restart command", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-8-grzegorz.nitka@intel.com/mbox/" }, { "id": 2219418, "url": "http://patchwork.ozlabs.org/api/patches/2219418/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-9-grzegorz.nitka@intel.com/", "msgid": "<20260402230626.3826719-9-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:26", "name": "[v5,net-next,8/8] ice: implement E825 TX ref clock control and TXC hardware sync status", "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-9-grzegorz.nitka@intel.com/mbox/" } ] }