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GET /api/patches/2219412/?format=api
{ "id": 2219412, "url": "http://patchwork.ozlabs.org/api/patches/2219412/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-3-grzegorz.nitka@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260402230626.3826719-3-grzegorz.nitka@intel.com>", "list_archive_url": null, "date": "2026-04-02T23:06:20", "name": "[v5,net-next,2/8] dpll: allow registering FW-identified pin with a different DPLL", "commit_ref": null, "pull_url": null, "state": "handled-elsewhere", "archived": false, "hash": "ccb4649b3fd3608dfba7bf38c03d13ac5b128f01", "submitter": { "id": 82711, "url": "http://patchwork.ozlabs.org/api/people/82711/?format=api", "name": "Grzegorz Nitka", "email": "grzegorz.nitka@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260402230626.3826719-3-grzegorz.nitka@intel.com/mbox/", "series": [ { "id": 498564, "url": "http://patchwork.ozlabs.org/api/series/498564/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=498564", "date": "2026-04-02T23:06:18", "name": "dpll/ice: Add TXC DPLL type and full TX reference clock control for E825", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/498564/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219412/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219412/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=ORw50WPw;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::138; 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envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=<UNKNOWN> ", "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 smtp1.osuosl.org 2A00580DB1", "OpenDKIM Filter v2.11.0 smtp2.osuosl.org 949A24002D" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=osuosl.org;\n\ts=default; t=1775171427;\n\tbh=uZKBkY+k6IRYFaAh0rxhYL9UCBLdycst07sHfPe6v6w=;\n\th=From:To:Date:In-Reply-To:References:Subject:List-Id:\n\t List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe:\n\t Cc:From;\n\tb=ORw50WPwqf1dPxvVF8fZH3xPfR58YnJ78ZloEHfI1EieI/Nj83Jyc7LRj9GjJ2NVc\n\t cFDDLq042wyT+j2F82HVf208kgmzbmsh38fXl7hE1oTkj7QuCr0+NBTWepbx3vVoat\n\t xvRxDlc9Ou0J3fCPpN+3/AHoSN6rkjDhcxjhUzoxAmSFbmogZ65xguA8Cwp4bAT+Dk\n\t yTYc3D+7MzctDQa0pso33MzSFc2xGwLAQnLKPBknV6q2r4Ca9UQlNSycr7A4U8BR5p\n\t LhATjIDQApEZ2HiNVUaduiEeXXuxequK3l+KK+zcZn2sTx8WnGRD/gpKvaNJ82oZUo\n\t Dts/DjWajOxcA==", "Received-SPF": "Pass (mailfrom) identity=mailfrom; client-ip=198.175.65.19;\n helo=mgamail.intel.com; envelope-from=grzegorz.nitka@intel.com;\n receiver=<UNKNOWN>", "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp2.osuosl.org 949A24002D", "X-CSE-ConnectionGUID": [ "jEz9DtAbReCXhYvwuVDCPw==", "ZdJQoyjIQ1O3dk3ees0qwQ==" ], "X-CSE-MsgGUID": [ "AqlJxBTKRUmE/ju/RWO/rQ==", "NHCIa/5pR6qVwkOxvLZoOw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11747\"; a=\"76123072\"", "E=Sophos;i=\"6.23,156,1770624000\"; d=\"scan'208\";a=\"76123072\"", "E=Sophos;i=\"6.23,156,1770624000\"; d=\"scan'208\";a=\"227044424\"" ], "X-ExtLoop1": "1", "From": "Grzegorz Nitka <grzegorz.nitka@intel.com>", "To": "netdev@vger.kernel.org", "Date": "Fri, 3 Apr 2026 01:06:20 +0200", "Message-Id": "<20260402230626.3826719-3-grzegorz.nitka@intel.com>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20260402230626.3826719-1-grzegorz.nitka@intel.com>", "References": "<20260402230626.3826719-1-grzegorz.nitka@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775171425; x=1806707425;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=mGVGmB9xUUY2QySpvbbDhKQd8FqE0QgLo4M6A/it0eo=;\n b=XiSgiLQcFg8PPVlSrU+S9SChEdkf9kstvfH9O/QRU6mDCoy8odH6k/L+\n 6aT7QqUmUwYnQThYXn49Yyko7o5VcOCxOib3P3xAsmUDIgwpf17LzdYQI\n SSvvUHt0qBVbb/yp2gq4c9B0DMVv3t3VM7X7BP2545/I9FR2c+kXyztWQ\n VIXVhjs9e4DAIsO8eqmvw9460s3mDIEkJNKsusRmc+5E3RHibaXK3ukuM\n OZezBR6LuyKBm/hOlVs0JBBosLWe1vlP9C4hBdyYcIZE9iZzFGE+XxVDQ\n PMfLW7oj7A4bcYspUebM6Eo1J65i/g1ZNSCL+/palKpsJ/Rka6rZOlFgM\n g==;", "X-Mailman-Original-Authentication-Results": [ "smtp2.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com", "smtp2.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=XiSgiLQc" ], "Subject": "[Intel-wired-lan] [PATCH v5 net-next 2/8] dpll: allow registering\n FW-identified pin with a different DPLL", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "ivecera@redhat.com, vadim.fedorenko@linux.dev, kuba@kernel.org,\n jiri@resnulli.us, edumazet@google.com, przemyslaw.kitszel@intel.com,\n richardcochran@gmail.com, donald.hunter@gmail.com,\n linux-kernel@vger.kernel.org, arkadiusz.kubalewski@intel.com,\n Aleksandr Loktionov <aleksandr.loktionov@intel.com>, andrew+netdev@lunn.ch,\n intel-wired-lan@lists.osuosl.org, horms@kernel.org,\n Prathosh.Satish@microchip.com, anthony.l.nguyen@intel.com, pabeni@redhat.com,\n davem@davemloft.net, Jiri Pirko <jiri@nvidia.com>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Relax the (module, clock_id) equality requirement when registering a\npin identified by firmware (pin->fwnode). Some platforms associate a\nFW-described pin with a DPLL instance that differs from the pin's\n(module, clock_id) tuple. For such pins, permit registration without\nrequiring the strict match. Non-FW pins still require equality.\n\nReviewed-by: Jiri Pirko <jiri@nvidia.com>\nReviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>\nReviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\nSigned-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>\n---\n drivers/dpll/dpll_core.c | 18 ++++++++++++++----\n 1 file changed, 14 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c\nindex 3f54754cdec4..55ad03977d6d 100644\n--- a/drivers/dpll/dpll_core.c\n+++ b/drivers/dpll/dpll_core.c\n@@ -880,11 +880,21 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,\n \t\treturn -EINVAL;\n \n \tmutex_lock(&dpll_lock);\n-\tif (WARN_ON(!(dpll->module == pin->module &&\n-\t\t dpll->clock_id == pin->clock_id)))\n+\n+\t/*\n+\t * For pins identified via firmware (pin->fwnode), allow registration\n+\t * even if the pin's (module, clock_id) differs from the target DPLL.\n+\t * For non-fwnode pins, require a strict (module, clock_id) match.\n+\t */\n+\tif (!pin->fwnode &&\n+\t WARN_ON_ONCE(dpll->module != pin->module ||\n+\t\t\t dpll->clock_id != pin->clock_id)) {\n \t\tret = -EINVAL;\n-\telse\n-\t\tret = __dpll_pin_register(dpll, pin, ops, priv, NULL);\n+\t\tgoto out_unlock;\n+\t}\n+\n+\tret = __dpll_pin_register(dpll, pin, ops, priv, NULL);\n+out_unlock:\n \tmutex_unlock(&dpll_lock);\n \n \treturn ret;\n", "prefixes": [ "v5", "net-next", "2/8" ] }