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GET /api/patches/819127/?format=api
{ "id": 819127, "url": "http://patchwork.ozlabs.org/api/patches/819127/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506515969-1472-6-git-send-email-kever.yang@rock-chips.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506515969-1472-6-git-send-email-kever.yang@rock-chips.com>", "list_archive_url": null, "date": "2017-09-27T12:39:26", "name": "[U-Boot,5/8] rockchip: rk3128: add sysreset driver", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "3eb9b93ccf79dd02e35d3be742cf82d547618b91", "submitter": { "id": 64532, "url": "http://patchwork.ozlabs.org/api/people/64532/?format=api", "name": "Kever Yang", "email": "kever.yang@rock-chips.com" }, "delegate": { "id": 69486, "url": "http://patchwork.ozlabs.org/api/users/69486/?format=api", "username": "ptomsich", "first_name": "Philipp", "last_name": "Tomsich", "email": "philipp.tomsich@theobroma-systems.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506515969-1472-6-git-send-email-kever.yang@rock-chips.com/mbox/", "series": [ { "id": 5353, "url": "http://patchwork.ozlabs.org/api/series/5353/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=5353", "date": "2017-09-27T12:39:21", "name": "rockchip: add new SoC support for RK3128", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/5353/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/819127/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/819127/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"dOIazPgH\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2HVk6PGjz9t33\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 27 Sep 2017 22:41:02 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid A9567C21D7B; Wed, 27 Sep 2017 12:40:57 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 5106CC21DE7;\n\tWed, 27 Sep 2017 12:40:07 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid AD532C21C46; Wed, 27 Sep 2017 12:40:00 +0000 (UTC)", "from mail-pg0-f65.google.com (mail-pg0-f65.google.com\n\t[74.125.83.65])\n\tby lists.denx.de (Postfix) with ESMTPS id C04F9C21DA2\n\tfor <u-boot@lists.denx.de>; Wed, 27 Sep 2017 12:39:58 +0000 (UTC)", "by mail-pg0-f65.google.com with SMTP id v5so9087148pgn.4\n\tfor <u-boot@lists.denx.de>; Wed, 27 Sep 2017 05:39:58 -0700 (PDT)", "from localhost.localdomain ([103.29.142.67])\n\tby smtp.gmail.com with ESMTPSA id\n\tv24sm21833899pfi.132.2017.09.27.05.39.53\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tWed, 27 Sep 2017 05:39:56 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=JlsFboj7qju5byxhimGhTnS9UCHa1WgCuCGWwQ6yNaI=;\n\tb=dOIazPgHI/i20xD7UMHXObJId6Abvlqn0w9G70pG91D/CFOoZC0u5kw7hIgsFdy4UZ\n\tNKFac4o94r/XVbk/9G70rUTDPKA/82cW9eWUt9dyLPHLlY7bciWy+lMHQu3esqm+lJiQ\n\tSKpymbtOZQnSHIieK9VbRO098PlqLPMx7JCZ28AQ+qWCyFckDaBIvJizeZvrdlVZnXrv\n\tBZEMfxloixh7BPT7zhsjcvfsYHFKkWDg9ljfjU7V9LEsWLZgzxOPO+3g1dseU3ptr3Zq\n\tLnvUwIVVNQcOE0MOnjzAyxElylqy5bYdyS7oGLldwUm5UHR3+8QDzV3p7oguMj3oIi3F\n\tKwEQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=JlsFboj7qju5byxhimGhTnS9UCHa1WgCuCGWwQ6yNaI=;\n\tb=CDuY1UJCjURXyIEvBwauE2vnfMoPoyhvJo7G2y0lFbmt58sMmyFFykCB4O5D6K950u\n\t1ThUsy//JUcjcWtGdiIMBDVS9+i9/rkwumqXqwSvK/VrUPp88WTsefBwQ77zMAVOMHJS\n\taO6Ieidi7Ts/UHtKEh21aK8zxcYS7sGw5C0aNsljlsb++2F9AKX0aDiojwYqfQZfUFNN\n\t3X8QSMSJBpn85mxMBa96KwO7J3X+crLcm8rXDxKni7ORNQ2srYEM4l1LsjL1oyXnZfqJ\n\tMeu0Pz3VJLnc2XB80A4Xa/WADBsqovyX9MYC0tKnYJCAufNJShKrLTllDZrLnD/exm4s\n\tG3Ag==", "X-Gm-Message-State": "AHPjjUjNs8XaryGSb9verp5qCps0b65rSo1UNu26tpfTWHitfC+KDmIb\n\tL1m+lR6DrMv74cSdZaLq3PDpEw==", "X-Google-Smtp-Source": "AOwi7QDgivyHR5ZyW7hDqO0/iSupSybjG8UmGuY/DnyUyFVbonPecEMQvXmpDwPclPMIPHylAhFp8Q==", "X-Received": "by 10.98.61.156 with SMTP id x28mr1203836pfj.295.1506515997243; \n\tWed, 27 Sep 2017 05:39:57 -0700 (PDT)", "From": "Kever Yang <kever.yang@rock-chips.com>", "To": "u-boot@lists.denx.de", "Date": "Wed, 27 Sep 2017 20:39:26 +0800", "Message-Id": "<1506515969-1472-6-git-send-email-kever.yang@rock-chips.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1506515969-1472-1-git-send-email-kever.yang@rock-chips.com>", "References": "<1506515969-1472-1-git-send-email-kever.yang@rock-chips.com>", "Cc": "Andy Yan <andy.yan@rock-chips.com>", "Subject": "[U-Boot] [PATCH 5/8] rockchip: rk3128: add sysreset driver", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add rk3128 sysreset driver.\n\nSigned-off-by: Kever Yang <kever.yang@rock-chips.com>\n---\n\n drivers/sysreset/Makefile | 1 +\n drivers/sysreset/sysreset_rk3128.c | 45 ++++++++++++++++++++++++++++++++++++++\n 2 files changed, 46 insertions(+)\n create mode 100644 drivers/sysreset/sysreset_rk3128.c", "diff": "diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile\nindex ce161a7..e3a0ab1 100644\n--- a/drivers/sysreset/Makefile\n+++ b/drivers/sysreset/Makefile\n@@ -12,6 +12,7 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o\n ifndef CONFIG_SPL_BUILD\n obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o\n endif\n+obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o\n obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o\n obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o\n obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o\ndiff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c\nnew file mode 100644\nindex 0000000..5aab8ec\n--- /dev/null\n+++ b/drivers/sysreset/sysreset_rk3128.c\n@@ -0,0 +1,45 @@\n+/*\n+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd\n+ *\n+ * SPDX-License-Identifier: GPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <dm.h>\n+#include <errno.h>\n+#include <sysreset.h>\n+#include <asm/io.h>\n+#include <asm/arch/clock.h>\n+#include <asm/arch/cru_rk3128.h>\n+#include <asm/arch/hardware.h>\n+#include <linux/err.h>\n+\n+int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)\n+{\n+\tstruct rk3128_cru *cru = rockchip_get_cru();\n+\n+\tif (IS_ERR(cru))\n+\t\treturn PTR_ERR(cru);\n+\tswitch (type) {\n+\tcase SYSRESET_WARM:\n+\t\twritel(0xeca8, &cru->cru_glb_srst_snd_value);\n+\t\tbreak;\n+\tcase SYSRESET_COLD:\n+\t\twritel(0xfdb9, &cru->cru_glb_srst_fst_value);\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EPROTONOSUPPORT;\n+\t}\n+\n+\treturn -EINPROGRESS;\n+}\n+\n+static struct sysreset_ops rk3128_sysreset = {\n+\t.request\t= rk3128_sysreset_request,\n+};\n+\n+U_BOOT_DRIVER(sysreset_rk3128) = {\n+\t.name\t= \"rk3128_sysreset\",\n+\t.id\t= UCLASS_SYSRESET,\n+\t.ops\t= &rk3128_sysreset,\n+};\n", "prefixes": [ "U-Boot", "5/8" ] }