diff mbox series

[U-Boot,5/8] rockchip: rk3128: add sysreset driver

Message ID 1506515969-1472-6-git-send-email-kever.yang@rock-chips.com
State Superseded
Delegated to: Philipp Tomsich
Headers show
Series rockchip: add new SoC support for RK3128 | expand

Commit Message

Kever Yang Sept. 27, 2017, 12:39 p.m. UTC 
Add rk3128 sysreset driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_rk3128.c | 45 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_rk3128.c

Comments

Philipp Tomsich Sept. 28, 2017, 8:54 a.m. UTC | #1 
On Wed, 27 Sep 2017, Kever Yang wrote:

> Add rk3128 sysreset driver.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

This duplicates existing driver code, see below.

> ---
>
> drivers/sysreset/Makefile          |  1 +
> drivers/sysreset/sysreset_rk3128.c | 45 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
> create mode 100644 drivers/sysreset/sysreset_rk3128.c
>
> diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
> index ce161a7..e3a0ab1 100644
> --- a/drivers/sysreset/Makefile
> +++ b/drivers/sysreset/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
> ifndef CONFIG_SPL_BUILD
> obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
> endif
> +obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
> obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
> obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
> obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
> diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
> new file mode 100644
> index 0000000..5aab8ec
> --- /dev/null
> +++ b/drivers/sysreset/sysreset_rk3128.c
> @@ -0,0 +1,45 @@
> +/*
> + * (C) Copyright 2017 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <sysreset.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/cru_rk3128.h>
> +#include <asm/arch/hardware.h>
> +#include <linux/err.h>
> +
> +int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
> +{
> +	struct rk3128_cru *cru = rockchip_get_cru();
> +
> +	if (IS_ERR(cru))
> +		return PTR_ERR(cru);
> +	switch (type) {
> +	case SYSRESET_WARM:
> +		writel(0xeca8, &cru->cru_glb_srst_snd_value);
> +		break;
> +	case SYSRESET_COLD:
> +		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
> +		break;
> +	default:
> +		return -EPROTONOSUPPORT;
> +	}
> +
> +	return -EINPROGRESS;
> +}

This is verbatim the same code (with the other rk3xxx variant replaced 
with rk3128 in all function names, structures and include-header) as for 
the RK3328, RK322x, RK3399, RK3036 (and possibly others that I may have 
missed).

Could we merge these and use driver_data to find the appropriate offset 
into each CRU?

From what I have seen, these drivers are always bound dynamically from the 
respective clk_rk3xxx driver, so it should be easy to inject the correct 
offset values for the two fields controlling reset (cru_glb_srst_snd_value, 
cru_glb_srst_fst_value) when binding the driver using and offsetof().

> +
> +static struct sysreset_ops rk3128_sysreset = {
> +	.request	= rk3128_sysreset_request,
> +};
> +
> +U_BOOT_DRIVER(sysreset_rk3128) = {
> +	.name	= "rk3128_sysreset",
> +	.id	= UCLASS_SYSRESET,
> +	.ops	= &rk3128_sysreset,
> +};
>
Philipp Tomsich Oct. 6, 2017, 3:51 p.m. UTC | #2 
> Add rk3128 sysreset driver.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  drivers/sysreset/Makefile          |  1 +
>  drivers/sysreset/sysreset_rk3128.c | 45 ++++++++++++++++++++++++++++++++++++++
>  2 files changed, 46 insertions(+)
>  create mode 100644 drivers/sysreset/sysreset_rk3128.c
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich Nov. 23, 2017, 1:56 p.m. UTC | #3 
On Wed, 27 Sep 2017, Kever Yang wrote:

> Add rk3128 sysreset driver.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

See below for requested changes.

> ---
>
> drivers/sysreset/Makefile          |  1 +
> drivers/sysreset/sysreset_rk3128.c | 45 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
> create mode 100644 drivers/sysreset/sysreset_rk3128.c
>
> diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
> index ce161a7..e3a0ab1 100644
> --- a/drivers/sysreset/Makefile
> +++ b/drivers/sysreset/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
> ifndef CONFIG_SPL_BUILD
> obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
> endif
> +obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
> obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
> obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
> obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o

Please update for the new common sysreset driver.

> diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
> new file mode 100644
> index 0000000..5aab8ec
> --- /dev/null
> +++ b/drivers/sysreset/sysreset_rk3128.c
> @@ -0,0 +1,45 @@
> +/*
> + * (C) Copyright 2017 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier:     GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <sysreset.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/cru_rk3128.h>
> +#include <asm/arch/hardware.h>
> +#include <linux/err.h>
> +
> +int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
> +{
> +	struct rk3128_cru *cru = rockchip_get_cru();
> +
> +	if (IS_ERR(cru))
> +		return PTR_ERR(cru);
> +	switch (type) {
> +	case SYSRESET_WARM:
> +		writel(0xeca8, &cru->cru_glb_srst_snd_value);
> +		break;
> +	case SYSRESET_COLD:
> +		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
> +		break;
> +	default:
> +		return -EPROTONOSUPPORT;
> +	}
> +
> +	return -EINPROGRESS;
> +}
> +
> +static struct sysreset_ops rk3128_sysreset = {
> +	.request	= rk3128_sysreset_request,
> +};
> +
> +U_BOOT_DRIVER(sysreset_rk3128) = {
> +	.name	= "rk3128_sysreset",
> +	.id	= UCLASS_SYSRESET,
> +	.ops	= &rk3128_sysreset,
> +};
>

Same.
diff mbox series

Patch

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index ce161a7..e3a0ab1 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -12,6 +12,7 @@  obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
 endif
+obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
new file mode 100644
index 0000000..5aab8ec
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3128.c
@@ -0,0 +1,45 @@ 
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3128_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3128_sysreset = {
+	.request	= rk3128_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3128) = {
+	.name	= "rk3128_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3128_sysreset,
+};