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GET /api/patches/818983/?format=api
{ "id": 818983, "url": "http://patchwork.ozlabs.org/api/patches/818983/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170927073414.17361-6-clabbe.montjoie@gmail.com/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170927073414.17361-6-clabbe.montjoie@gmail.com>", "list_archive_url": null, "date": "2017-09-27T07:34:08", "name": "[v6,05/11] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "8f02862e88b099b2213caf374d4b097b5be3ed67", "submitter": { "id": 64152, "url": "http://patchwork.ozlabs.org/api/people/64152/?format=api", "name": "Corentin Labbe", "email": "clabbe.montjoie@gmail.com" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170927073414.17361-6-clabbe.montjoie@gmail.com/mbox/", "series": [ { "id": 5300, "url": "http://patchwork.ozlabs.org/api/series/5300/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=5300", "date": "2017-09-27T07:34:14", "name": "net: stmmac: dwmac-sun8i: Handle integrated PHY", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/5300/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/818983/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/818983/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tWed, 27 Sep 2017 00:36:38 -0700 (PDT)", "From": "Corentin Labbe <clabbe.montjoie@gmail.com>", "To": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\tfrowand.list@gmail.com", "Cc": "netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com, Corentin Labbe <clabbe.montjoie@gmail.com>", "Subject": "[PATCH v6 05/11] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY", "Date": "Wed, 27 Sep 2017 09:34:08 +0200", "Message-Id": "<20170927073414.17361-6-clabbe.montjoie@gmail.com>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170927073414.17361-1-clabbe.montjoie@gmail.com>", "References": "<20170927073414.17361-1-clabbe.montjoie@gmail.com>", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "This patch add documentation about the MDIO switch used on sun8i-h3-emac\nfor integrated PHY.\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\n---\n .../devicetree/bindings/net/dwmac-sun8i.txt | 138 +++++++++++++++++++--\n 1 file changed, 126 insertions(+), 12 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\nindex 725f3b187886..e2ef4683df08 100644\n--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.\n Please see stmmac.txt for the other unchanged properties.\n \n Required properties:\n-- compatible: should be one of the following string:\n+- compatible: must be one of the following string:\n \t\t\"allwinner,sun8i-a83t-emac\"\n \t\t\"allwinner,sun8i-h3-emac\"\n \t\t\"allwinner,sun8i-v3s-emac\"\n \t\t\"allwinner,sun50i-a64-emac\"\n - reg: address and length of the register for the device.\n - interrupts: interrupt for the device\n-- interrupt-names: should be \"macirq\"\n+- interrupt-names: must be \"macirq\"\n - clocks: A phandle to the reference clock for this device\n-- clock-names: should be \"stmmaceth\"\n+- clock-names: must be \"stmmaceth\"\n - resets: A phandle to the reset control for this device\n-- reset-names: should be \"stmmaceth\"\n+- reset-names: must be \"stmmaceth\"\n - phy-mode: See ethernet.txt\n - phy-handle: See ethernet.txt\n - #address-cells: shall be 1\n@@ -39,23 +39,38 @@ Optional properties for the following compatibles:\n - allwinner,leds-active-low: EPHY LEDs are active low\n \n Required child node of emac:\n-- mdio bus node: should be named mdio\n+- mdio bus node: with compatible \"snps,dwmac-mdio\"\n \n Required properties of the mdio node:\n - #address-cells: shall be 1\n - #size-cells: shall be 0\n \n-The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n+The device node referenced by \"phy\" or \"phy-handle\" must be a child node\n of the mdio node. See phy.txt for the generic PHY bindings.\n \n-Required properties of the phy node with the following compatibles:\n+The following compatibles require that the mdio node have a mdio-mux child\n+node called \"mdio-mux\":\n+ - \"allwinner,sun8i-h3-emac\"\n+ - \"allwinner,sun8i-v3s-emac\":\n+Required properties for the mdio-mux node:\n+ - compatible = \"mdio-mux\"\n+ - one child mdio for the integrated mdio\n+ - one child mdio for the external mdio if present (V3s have none)\n+Required properties for the mdio-mux children node:\n+ - reg: 1 for internal MDIO bus, 2 for external MDIO bus\n+\n+The following compatibles require a PHY node representing the integrated\n+PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n - \"allwinner,sun8i-h3-emac\",\n - \"allwinner,sun8i-v3s-emac\":\n+\n+Required properties of the integrated phy node:\n - clocks: a phandle to the reference clock for the EPHY\n - resets: a phandle to the reset control for the EPHY\n+- phy-is-integrated\n+- Must be a child of the integrated mdio\n \n-Example:\n-\n+Example with integrated PHY:\n emac: ethernet@1c0b000 {\n \tcompatible = \"allwinner,sun8i-h3-emac\";\n \tsyscon = <&syscon>;\n@@ -72,13 +87,112 @@ emac: ethernet@1c0b000 {\n \tphy-handle = <&int_mii_phy>;\n \tphy-mode = \"mii\";\n \tallwinner,leds-active-low;\n+\n+\tmdio0: mdio {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tcompatible = \"snps,dwmac-mdio\";\n+\n+\t\tmdio-mux {\n+\t\t\tcompatible = \"mdio-mux\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tint_mdio: mdio@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\t\t\treg = <1>;\n+\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t\t\t\tphy-is-integrated;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t\text_mdio: mdio@2 {\n+\t\t\t\treg = <2>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+Example with external PHY:\n+emac: ethernet@1c0b000 {\n+\tcompatible = \"allwinner,sun8i-h3-emac\";\n+\tsyscon = <&syscon>;\n+\treg = <0x01c0b000 0x104>;\n+\tinterrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;\n+\tinterrupt-names = \"macirq\";\n+\tresets = <&ccu RST_BUS_EMAC>;\n+\treset-names = \"stmmaceth\";\n+\tclocks = <&ccu CLK_BUS_EMAC>;\n+\tclock-names = \"stmmaceth\";\n+\t#address-cells = <1>;\n+\t#size-cells = <0>;\n+\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\tallwinner,leds-active-low;\n+\n+\tmdio0: mdio {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tcompatible = \"snps,dwmac-mdio\";\n+\n+\t\tmdio-mux {\n+\t\t\tcompatible = \"mdio-mux\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tint_mdio: mdio@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\t\t\treg = <1>;\n+\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t\t\t\tphy-is-integrated;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t\text_mdio: mdio@2 {\n+\t\t\t\treg = <2>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\text_rgmii_phy: ethernet-phy@1 {\n+\t\t\t\t\treg = <1>;\n+\t\t\t\t};\n+\t\t\t}:\n+\t\t};\n+\t};\n+};\n+\n+Example with SoC without integrated PHY\n+\n+emac: ethernet@1c0b000 {\n+\tcompatible = \"allwinner,sun8i-a83t-emac\";\n+\tsyscon = <&syscon>;\n+\treg = <0x01c0b000 0x104>;\n+\tinterrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;\n+\tinterrupt-names = \"macirq\";\n+\tresets = <&ccu RST_BUS_EMAC>;\n+\treset-names = \"stmmaceth\";\n+\tclocks = <&ccu CLK_BUS_EMAC>;\n+\tclock-names = \"stmmaceth\";\n+\t#address-cells = <1>;\n+\t#size-cells = <0>;\n+\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n \tmdio: mdio {\n+\t\tcompatible = \"snps,dwmac-mdio\";\n \t\t#address-cells = <1>;\n \t\t#size-cells = <0>;\n-\t\tint_mii_phy: ethernet-phy@1 {\n+\t\text_rgmii_phy: ethernet-phy@1 {\n \t\t\treg = <1>;\n-\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n-\t\t\tresets = <&ccu RST_BUS_EPHY>;\n \t\t};\n \t};\n };\n", "prefixes": [ "v6", "05/11" ] }