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GET /api/patches/818776/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 818776,
    "url": "http://patchwork.ozlabs.org/api/patches/818776/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170926183318.12995-3-david@redhat.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170926183318.12995-3-david@redhat.com>",
    "list_archive_url": null,
    "date": "2017-09-26T18:33:14",
    "name": "[v1,2/6] s390x/tcg: add MMU for real addresses",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "c00740923958c5c86aeadebead01590fe887dbe3",
    "submitter": {
        "id": 70402,
        "url": "http://patchwork.ozlabs.org/api/people/70402/?format=api",
        "name": "David Hildenbrand",
        "email": "david@redhat.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170926183318.12995-3-david@redhat.com/mbox/",
    "series": [
        {
            "id": 5209,
            "url": "http://patchwork.ozlabs.org/api/series/5209/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=5209",
            "date": "2017-09-26T18:33:12",
            "name": "s390x/tcg: fix some accesses using low address",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/5209/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/818776/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/818776/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": [
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            "ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=david@redhat.com"
        ],
        "Received": [
            "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y1qRD1ppJz9t3R\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 27 Sep 2017 04:36:24 +1000 (AEST)",
            "from localhost ([::1]:50680 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dwuiU-0006Gn-8m\n\tfor incoming@patchwork.ozlabs.org; Tue, 26 Sep 2017 14:36:22 -0400",
            "from eggs.gnu.org ([2001:4830:134:3::10]:45133)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <david@redhat.com>) id 1dwufh-0004PK-Jm\n\tfor qemu-devel@nongnu.org; Tue, 26 Sep 2017 14:33:32 -0400",
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            "from mx1.redhat.com ([209.132.183.28]:45312)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <david@redhat.com>) id 1dwufg-0003Sf-BF\n\tfor qemu-devel@nongnu.org; Tue, 26 Sep 2017 14:33:28 -0400",
            "from smtp.corp.redhat.com\n\t(int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 5FA7A85550;\n\tTue, 26 Sep 2017 18:33:27 +0000 (UTC)",
            "from t460s.redhat.com (ovpn-117-152.ams2.redhat.com\n\t[10.36.117.152])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 9AC6D60841;\n\tTue, 26 Sep 2017 18:33:25 +0000 (UTC)"
        ],
        "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com 5FA7A85550",
        "From": "David Hildenbrand <david@redhat.com>",
        "To": "qemu-devel@nongnu.org",
        "Date": "Tue, 26 Sep 2017 20:33:14 +0200",
        "Message-Id": "<20170926183318.12995-3-david@redhat.com>",
        "In-Reply-To": "<20170926183318.12995-1-david@redhat.com>",
        "References": "<20170926183318.12995-1-david@redhat.com>",
        "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.13",
        "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.28]);\n\tTue, 26 Sep 2017 18:33:27 +0000 (UTC)",
        "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]",
        "X-Received-From": "209.132.183.28",
        "Subject": "[Qemu-devel] [PATCH v1 2/6] s390x/tcg: add MMU for real addresses",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.21",
        "Precedence": "list",
        "List-Id": "<qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>",
        "List-Post": "<mailto:qemu-devel@nongnu.org>",
        "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>",
        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Cc": "thuth@redhat.com, David Hildenbrand <david@redhat.com>, cohuck@redhat.com,\n\tAlexander Graf <agraf@suse.de>,\n\tChristian Borntraeger <borntraeger@de.ibm.com>,\n\tRichard Henderson <rth@twiddle.net>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"
    },
    "content": "This makes it easy to access real addresses (prefix) and in addition\nchecks for valid memory addresses, which is missing when using e.g.\nstl_phys().\n\nWe can later reuse it to implement low address protection checks (then\nwe might even decide to introduce yet another MMU for absolute\naddresses, just for handling storage keys and low address protection).\n\nSigned-off-by: David Hildenbrand <david@redhat.com>\n---\n target/s390x/cpu.h         |  4 +++-\n target/s390x/excp_helper.c | 25 ++++++++++++++++---------\n target/s390x/internal.h    |  2 ++\n target/s390x/mmu_helper.c  | 19 +++++++++++++++++++\n 4 files changed, 40 insertions(+), 10 deletions(-)",
    "diff": "diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h\nindex 9b549dc491..42b4e813e4 100644\n--- a/target/s390x/cpu.h\n+++ b/target/s390x/cpu.h\n@@ -43,12 +43,13 @@\n \n #include \"fpu/softfloat.h\"\n \n-#define NB_MMU_MODES 3\n+#define NB_MMU_MODES 4\n #define TARGET_INSN_START_EXTRA_WORDS 1\n \n #define MMU_MODE0_SUFFIX _primary\n #define MMU_MODE1_SUFFIX _secondary\n #define MMU_MODE2_SUFFIX _home\n+#define MMU_MODE3_SUFFIX _real\n \n #define MMU_USER_IDX 0\n \n@@ -349,6 +350,7 @@ extern const struct VMStateDescription vmstate_s390_cpu;\n #define MMU_PRIMARY_IDX         0\n #define MMU_SECONDARY_IDX       1\n #define MMU_HOME_IDX            2\n+#define MMU_REAL_IDX            3\n \n static inline int cpu_mmu_index(CPUS390XState *env, bool ifetch)\n {\ndiff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c\nindex 308605d9ed..3e4349d00b 100644\n--- a/target/s390x/excp_helper.c\n+++ b/target/s390x/excp_helper.c\n@@ -88,8 +88,8 @@ int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr orig_vaddr,\n {\n     S390CPU *cpu = S390_CPU(cs);\n     CPUS390XState *env = &cpu->env;\n-    uint64_t asc = cpu_mmu_idx_to_asc(mmu_idx);\n     target_ulong vaddr, raddr;\n+    uint64_t asc;\n     int prot;\n \n     DPRINTF(\"%s: address 0x%\" VADDR_PRIx \" rw %d mmu_idx %d\\n\",\n@@ -98,14 +98,21 @@ int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr orig_vaddr,\n     orig_vaddr &= TARGET_PAGE_MASK;\n     vaddr = orig_vaddr;\n \n-    /* 31-Bit mode */\n-    if (!(env->psw.mask & PSW_MASK_64)) {\n-        vaddr &= 0x7fffffff;\n-    }\n-\n-    if (mmu_translate(env, vaddr, rw, asc, &raddr, &prot, true)) {\n-        /* Translation ended in exception */\n-        return 1;\n+    if (mmu_idx < MMU_REAL_IDX) {\n+        asc = cpu_mmu_idx_to_asc(mmu_idx);\n+        /* 31-Bit mode */\n+        if (!(env->psw.mask & PSW_MASK_64)) {\n+            vaddr &= 0x7fffffff;\n+        }\n+        if (mmu_translate(env, vaddr, rw, asc, &raddr, &prot, true)) {\n+            return 1;\n+        }\n+    } else if (mmu_idx == MMU_REAL_IDX) {\n+        if (mmu_translate_real(env, vaddr, rw, &raddr, &prot)) {\n+            return 1;\n+        }\n+    } else {\n+        abort();\n     }\n \n     /* check out of RAM access */\ndiff --git a/target/s390x/internal.h b/target/s390x/internal.h\nindex bc8f83129a..1a83e559e3 100644\n--- a/target/s390x/internal.h\n+++ b/target/s390x/internal.h\n@@ -375,6 +375,8 @@ target_ulong mmu_real2abs(CPUS390XState *env, target_ulong raddr);\n /* mmu_helper.c */\n int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,\n                   target_ulong *raddr, int *flags, bool exc);\n+int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw,\n+                       target_ulong *addr, int *flags);\n \n \n /* misc_helper.c */\ndiff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c\nindex b528c5921d..98c58fc7c9 100644\n--- a/target/s390x/mmu_helper.c\n+++ b/target/s390x/mmu_helper.c\n@@ -497,3 +497,22 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf,\n     g_free(pages);\n     return ret;\n }\n+\n+/**\n+ * Translate a real address into a physical (absolute) address.\n+ * @param raddr  the real address\n+ * @param rw     0 = read, 1 = write, 2 = code fetch\n+ * @param addr  the translated address is stored to this pointer\n+ * @param flags  the PAGE_READ/WRITE/EXEC flags are stored to this pointer\n+ * @return       0 if the translation was successful, < 0 if a fault occurred\n+ */\n+int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw,\n+                       target_ulong *addr, int *flags)\n+{\n+    /* TODO: low address protection once we flush the tlb on cr changes */\n+    *flags = PAGE_READ | PAGE_WRITE;\n+    *addr = mmu_real2abs(env, raddr);\n+\n+    /* TODO: storage key handling */\n+    return 0;\n+}\n",
    "prefixes": [
        "v1",
        "2/6"
    ]
}