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GET /api/patches/818382/?format=api
{ "id": 818382, "url": "http://patchwork.ozlabs.org/api/patches/818382/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx@gmail.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx@gmail.com>", "list_archive_url": null, "date": "2017-09-25T23:22:04", "name": "[v1,3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "9b1ca05f9b9fa53dbb904f4d711a8a0767e0fc44", "submitter": { "id": 18124, "url": "http://patchwork.ozlabs.org/api/people/18124/?format=api", "name": "Dmitry Osipenko", "email": "digetx@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx@gmail.com/mbox/", "series": [ { "id": 5029, "url": "http://patchwork.ozlabs.org/api/series/5029/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=5029", "date": "2017-09-25T23:22:01", "name": "NVIDIA Tegra AHB DMA controller driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/5029/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/818382/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/818382/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-tegra-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"kQObRA72\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1KtB65Xsz9t3Z\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 Sep 2017 09:24:34 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S966233AbdIYXYd (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tMon, 25 Sep 2017 19:24:33 -0400", "from mail-wr0-f193.google.com ([209.85.128.193]:37966 \"EHLO\n\tmail-wr0-f193.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S966204AbdIYXYa (ORCPT\n\t<rfc822;linux-tegra@vger.kernel.org>);\n\tMon, 25 Sep 2017 19:24:30 -0400", "by mail-wr0-f193.google.com with SMTP id p37so918690wrb.5;\n\tMon, 25 Sep 2017 16:24:28 -0700 (PDT)", "from localhost.localdomain (ppp109-252-90-109.pppoe.spdop.ru.\n\t[109.252.90.109]) by smtp.gmail.com with ESMTPSA id\n\ta139sm1161965lfa.39.2017.09.25.16.24.26\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 25 Sep 2017 16:24:27 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:in-reply-to:references;\n\tbh=T3IF95/fZUClOa3SGdrXIvPXPM4NHz+eLTTW8p94rzE=;\n\tb=kQObRA72Il15LsyCu2qWmZjsjkY1INF0F+R7uGEHy6kMDcAWLcQBbu9rVejIRNu8R0\n\tEjgvpDQD05PmJLixALBL4fPe7r91ywRb2kznFuRgX+SvT7hez9xm1dvAUurMusd8neP3\n\tHl/vZ5q/4cjGaMR7F51KlOZBvXwIiEX7xO78gjKvtNQ8irBMEAdIguKWEhChJwakAylj\n\tupPBNIwmQ1tv1LQc0phGAKFylR1eGEATsaYNw0yzh2BAkqhOAvjHyVLnF0t2uJ8XZXIx\n\t3l4QKXfbuGqMsIZBk4QeFN/cyJYTm+mg+qx0yCXcwnoEtAM3TfiCiasXlPeo8itQDV1s\n\tfm2Q==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:in-reply-to:references;\n\tbh=T3IF95/fZUClOa3SGdrXIvPXPM4NHz+eLTTW8p94rzE=;\n\tb=sJeoUyC5UZ6A8EUIShof4MzwTFhqVxe1Deyl/eABWpTm+dy3+2QQPvziUak83Gz57K\n\t0DglXUvjKn/YVGGhTgZGY0Y8HKPFmabZESPix/WJys9eeC5KeXq00doS+dtIp2jpd8ht\n\tMRlv6eBK1+BCk6ufzYgZbxzdtc3DnXMztthyyYCuTWyxrCIFySj67Vf0mrcGBMd8wQIK\n\tjUT0XgKNMA7MRGbQ8geYDghACk6qnYdSWEmswM1O1vp0uBtf/w4dyv2xSUGcfUvuz7z/\n\tN213bBm7vPeJ0fbY5htqHJ/KWXh01biUyvMZ7ryRyo45WRtIz2W/xUD/nCZzbDAVtVUo\n\ttDqg==", "X-Gm-Message-State": "AHPjjUg9tRoghpsbJtNT6fQZB5VJaOTaJ/JNNOtf0P+bjoXvmBOMliwV\n\tqvESSdEerbMnad5lVRomDWY=", "X-Google-Smtp-Source": "AOwi7QDMbdX9EgmQK8JBEAhVTZl1u4clQsotJKIiC0Qf9QVZeFQ0ISofoP9MCKoCrGpF866TR9o2IA==", "X-Received": "by 10.25.27.7 with SMTP id b7mr2389609lfb.94.1506381868136;\n\tMon, 25 Sep 2017 16:24:28 -0700 (PDT)", "From": "Dmitry Osipenko <digetx@gmail.com>", "To": "Thierry Reding <thierry.reding@gmail.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\tLaxman Dewangan <ldewangan@nvidia.com>,\n\tPeter De Schrijver <pdeschrijver@nvidia.com>,\n\tPrashant Gaikwad <pgaikwad@nvidia.com>,\n\tMichael Turquette <mturquette@baylibre.com>,\n\tStephen Boyd <sboyd@codeaurora.org>, Rob Herring <robh+dt@kernel.org>,\n\tVinod Koul <vinod.koul@intel.com>", "Cc": "linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,\n\tdmaengine@vger.kernel.org, linux-clk@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v1 3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB\n\tDMA controller", "Date": "Tue, 26 Sep 2017 02:22:04 +0300", "Message-Id": "<604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx@gmail.com>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": [ "<cover.1506380746.git.digetx@gmail.com>", "<cover.1506380746.git.digetx@gmail.com>" ], "References": [ "<cover.1506380746.git.digetx@gmail.com>", "<cover.1506380746.git.digetx@gmail.com>" ], "Sender": "linux-tegra-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-tegra.vger.kernel.org>", "X-Mailing-List": "linux-tegra@vger.kernel.org" }, "content": "Document DT bindings for NVIDIA Tegra AHB DMA controller that presents\non Tegra20/30 SoC's.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\n---\n .../bindings/dma/nvidia,tegra20-ahbdma.txt | 23 ++++++++++++++++++++++\n 1 file changed, 23 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt", "diff": "diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt\nnew file mode 100644\nindex 000000000000..2af9aa76ae11\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt\n@@ -0,0 +1,23 @@\n+* NVIDIA Tegra AHB DMA controller\n+\n+Required properties:\n+- compatible:\tMust be \"nvidia,tegra20-ahbdma\"\n+- reg:\t\tShould contain registers base address and length.\n+- interrupts:\tShould contain one entry, DMA controller interrupt.\n+- clocks:\tShould contain one entry, DMA controller clock.\n+- resets :\tShould contain one entry, DMA controller reset.\n+- #dma-cells:\tShould be <1>. The cell represents DMA request select value\n+\t\tfor the peripheral. For more details consult the Tegra TRM's\n+\t\tdocumentation, in particular AHB DMA channel control register\n+\t\tREQ_SEL field.\n+\n+Example:\n+\n+ahbdma: ahbdma@60008000 {\n+\tcompatible = \"nvidia,tegra20-ahbdma\";\n+\treg = <0x60008000 0x2000>;\n+\tinterrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;\n+\tclocks = <&tegra_car TEGRA20_CLK_AHBDMA>;\n+\tresets = <&tegra_car 33>;\n+\t#dma-cells = <1>;\n+};\n", "prefixes": [ "v1", "3/5" ] }