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GET /api/patches/817722/?format=api
{ "id": 817722, "url": "http://patchwork.ozlabs.org/api/patches/817722/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170922212930.620249-2-arnd@arndb.de/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170922212930.620249-2-arnd@arndb.de>", "list_archive_url": null, "date": "2017-09-22T21:29:12", "name": "[v4,1/9] brcmsmac: make some local variables 'static const' to reduce stack size", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": true, "hash": "7805798cd4cb5f76df86264588bf6e1829aea5c7", "submitter": { "id": 30, "url": "http://patchwork.ozlabs.org/api/people/30/?format=api", "name": "Arnd Bergmann", "email": "arnd@arndb.de" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170922212930.620249-2-arnd@arndb.de/mbox/", "series": [ { "id": 4712, "url": "http://patchwork.ozlabs.org/api/series/4712/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=4712", "date": "2017-09-22T21:29:16", "name": "bring back stack frame warning with KASAN", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/4712/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/817722/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/817722/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xzRZJ3TBMz9s9Y\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 23 Sep 2017 07:34:16 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752518AbdIVVal (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tFri, 22 Sep 2017 17:30:41 -0400", "from mout.kundenserver.de ([212.227.126.131]:56413 \"EHLO\n\tmout.kundenserver.de\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752389AbdIVVag (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Fri, 22 Sep 2017 17:30:36 -0400", "from wuerfel.lan ([95.208.190.237]) by mrelayeu.kundenserver.de\n\t(mreue002 [212.227.15.129]) with ESMTPA (Nemesis) id\n\t0LlMaV-1dLM1f0u6p-00bHcv; Fri, 22 Sep 2017 23:30:08 +0200" ], "From": "Arnd Bergmann <arnd@arndb.de>", "To": "Arend van Spriel <arend.vanspriel@broadcom.com>,\n\tFranky Lin <franky.lin@broadcom.com>,\n\tHante Meuleman <hante.meuleman@broadcom.com>,\n\tChi-Hsien Lin <chi-hsien.lin@cypress.com>,\n\tWright Feng <wright.feng@cypress.com>, Kalle Valo <kvalo@codeaurora.org>", "Cc": "Arnd Bergmann <arnd@arndb.de>,\n\tMauro Carvalho Chehab <mchehab@kernel.org>, Jiri Pirko\n\t<jiri@resnulli.us>, \"David S. Miller\" <davem@davemloft.net>,\n\tAndrey Ryabinin <aryabinin@virtuozzo.com>, \n\tAlexander Potapenko <glider@google.com>, Dmitry Vyukov\n\t<dvyukov@google.com>, Masahiro Yamada <yamada.masahiro@socionext.com>,\n\tMichal Marek <mmarek@suse.com>, \n\tAndrew Morton <akpm@linux-foundation.org>, Kees Cook\n\t<keescook@chromium.org>, Geert Uytterhoeven <geert@linux-m68k.org>,\n\tGreg Kroah-Hartman <gregkh@linuxfoundation.org>, \n\tlinux-media@vger.kernel.org, linux-kernel@vger.kernel.org, \n\tnetdev@vger.kernel.org, linux-wireless@vger.kernel.org, \n\tbrcm80211-dev-list.pdl@broadcom.com, brcm80211-dev-list@cypress.com,\n\tkasan-dev@googlegroups.com, linux-kbuild@vger.kernel.org,\n\tJakub Jelinek <jakub@gcc.gnu.org>, =?utf-8?q?Martin_Li=C5=A1ka?=\n\t<marxin@gcc.gnu.org>", "Subject": "[PATCH v4 1/9] brcmsmac: make some local variables 'static const'\n\tto reduce stack size", "Date": "Fri, 22 Sep 2017 23:29:12 +0200", "Message-Id": "<20170922212930.620249-2-arnd@arndb.de>", "X-Mailer": "git-send-email 2.9.0", "In-Reply-To": "<20170922212930.620249-1-arnd@arndb.de>", "References": "<20170922212930.620249-1-arnd@arndb.de>", "X-Provags-ID": "V03:K0:2+qaRAVnJEz8UpCFSfQOcy+Us/zKslri5AkGfb0bfWEH3hJpuc2\n\tA7kH2RMyHUdV8B3oQ6GhjeXy8U0xy4x3EPEIsvpgTcIo+Bop4ARAwpQnL7BAsAtYRgVSQ0D\n\tjI0bkOp+gs/tKoriiXYpoxPHOdj/V+3oP9t/BV+nuWN26ub7GZ4rk1+YDEqMzT4m5uEhrI0\n\t+mY+KPDchy/4M5cTQmi2Q==", "X-UI-Out-Filterresults": "notjunk:1; V01:K0:XOQzd9gjK1I=:jNE3f7g6Oj0bsXM+hX3TRT\n\t2maMZAisMDrs++b4n+TuppYa9jISDtTTjQa9wBKlfIzcgK1ZLggvuGOHnRb4yCZkPALOge5qY\n\tXHN4NmpMHPfggtJA51fEGb9qDsZDUfBvjomvI6KVSggvp28TDPVdbc4xi5e7+LYjYyCnQBHmw\n\ti/6dQwS2dq4AAzX3IoQs//iFcexR4s0l7gqnT3Hpyixu7hdQKtpIMg7nW1KkqjIlcmsMLWbQX\n\tAdseqLIcDQLBfCaOKA+fBfXf+f/RivA+dXkFc+2riXCbcz3jdl5tIGr1lgiHyoYN+VNaUV34V\n\t+vH3TbFAX2e1o7YivoOTS2t8OsvHMQud68GRP0246RfPlNErlIEGErDeSpTb9QBEOxnJHZuEv\n\t1APzBwXuqm0XgmekOAgzAFMlTGXr+1xoU/2bmR6OvG8CuyK8wyrMnwURgXAgbSAOLqV7fDVM2\n\tUQRxezKA2Zv0A1dOz8yzOaQ0Sp5LB0fZj85pDWol+bE7PDMsF7GveZdOWTCBJXWTdXa64ZKRL\n\tfnjWYNl6IHnWakE7YnMIh3BuTBGgJtGzw8wApQJs86T1R26vzsL4sNrEKx/vDNHHmssYdCCOc\n\ti9F/AlBlMG66GlZfR5Ki18pTKaDglGl+uH1z5xK3+BlmiD3aqkCdBEKESC16a1gDDwNCLb1oH\n\tQxFJRGr1St/9ISAPwPKbzeoUV3Bq1P1uuAb2YpnZE1BPves88j9Y51cH2UH+WqS/Adja+NW+6\n\tiEmuHeJPViEinUmtd7nhbNAgIdoyY+1Vj/7YBA==", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "With KASAN and a couple of other patches applied, this driver is one\nof the few remaining ones that actually use more than 2048 bytes of\nkernel stack:\n\nbroadcom/brcm80211/brcmsmac/phy/phy_n.c: In function 'wlc_phy_workarounds_nphy_gainctrl':\nbroadcom/brcm80211/brcmsmac/phy/phy_n.c:16065:1: warning: the frame size of 3264 bytes is larger than 2048 bytes [-Wframe-larger-than=]\nbroadcom/brcm80211/brcmsmac/phy/phy_n.c: In function 'wlc_phy_workarounds_nphy':\nbroadcom/brcm80211/brcmsmac/phy/phy_n.c:17138:1: warning: the frame size of 2864 bytes is larger than 2048 bytes [-Wframe-larger-than=]\n\nHere, I'm reducing the stack size by marking as many local variables as\n'static const' as I can without changing the actual code.\n\nThis is the first of three patches to improve the stack usage in this\ndriver. It would be good to have this backported to stabl kernels\nto get all drivers in 'allmodconfig' below the 2048 byte limit so\nwe can turn on the frame warning again globally, but I realize that\nthe patch is larger than the normal limit for stable backports.\n\nThe other two patches do not need to be backported.\n\nAcked-by: Arend van Spriel <arend.vanspriel@broadcom.com>\nSigned-off-by: Arnd Bergmann <arnd@arndb.de>\n---\n .../broadcom/brcm80211/brcmsmac/phy/phy_n.c | 197 ++++++++++-----------\n 1 file changed, 97 insertions(+), 100 deletions(-)", "diff": "diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c\nindex b3aab2fe96eb..ef685465f80a 100644\n--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c\n+++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c\n@@ -14764,8 +14764,8 @@ static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi)\n }\n \n static void\n-wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, u8 *events, u8 *dlys,\n-\t\t u8 len)\n+wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events,\n+\t\t const u8 *dlys, u8 len)\n {\n \tu32 t1_offset, t2_offset;\n \tu8 ctr;\n@@ -15240,16 +15240,16 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi)\n static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)\n {\n \tu16 currband;\n-\ts8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };\n-\ts8 *lna1_gain_db = NULL;\n-\ts8 *lna1_gain_db_2 = NULL;\n-\ts8 *lna2_gain_db = NULL;\n-\ts8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };\n-\ts8 *tia_gain_db;\n-\ts8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };\n-\ts8 *tia_gainbits;\n-\tu16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };\n-\tu16 *rfseq_init_gain;\n+\tstatic const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };\n+\tconst s8 *lna1_gain_db = NULL;\n+\tconst s8 *lna1_gain_db_2 = NULL;\n+\tconst s8 *lna2_gain_db = NULL;\n+\tstatic const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };\n+\tconst s8 *tia_gain_db;\n+\tstatic const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };\n+\tconst s8 *tia_gainbits;\n+\tstatic const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };\n+\tconst u16 *rfseq_init_gain;\n \tu16 init_gaincode;\n \tu16 clip1hi_gaincode;\n \tu16 clip1md_gaincode = 0;\n@@ -15310,10 +15310,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)\n \n \t\t\tif ((freq <= 5080) || (freq == 5825)) {\n \n-\t\t\t\ts8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };\n-\t\t\t\ts8 lna1A_gain_db_2_rev7[] = {\n-\t\t\t\t\t11, 17, 22, 25};\n-\t\t\t\ts8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };\n+\t\t\t\tstatic const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };\n+\t\t\t\tstatic const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25};\n+\t\t\t\tstatic const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };\n \n \t\t\t\tcrsminu_th = 0x3e;\n \t\t\t\tlna1_gain_db = lna1A_gain_db_rev7;\n@@ -15321,10 +15320,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)\n \t\t\t\tlna2_gain_db = lna2A_gain_db_rev7;\n \t\t\t} else if ((freq >= 5500) && (freq <= 5700)) {\n \n-\t\t\t\ts8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };\n-\t\t\t\ts8 lna1A_gain_db_2_rev7[] = {\n-\t\t\t\t\t12, 18, 22, 26};\n-\t\t\t\ts8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };\n+\t\t\t\tstatic const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };\n+\t\t\t\tstatic const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};\n+\t\t\t\tstatic const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };\n \n \t\t\t\tcrsminu_th = 0x45;\n \t\t\t\tclip1md_gaincode_B = 0x14;\n@@ -15335,10 +15333,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)\n \t\t\t\tlna2_gain_db = lna2A_gain_db_rev7;\n \t\t\t} else {\n \n-\t\t\t\ts8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };\n-\t\t\t\ts8 lna1A_gain_db_2_rev7[] = {\n-\t\t\t\t\t12, 18, 22, 26};\n-\t\t\t\ts8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };\n+\t\t\t\tstatic const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };\n+\t\t\t\tstatic const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};\n+\t\t\t\tstatic const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };\n \n \t\t\t\tcrsminu_th = 0x41;\n \t\t\t\tlna1_gain_db = lna1A_gain_db_rev7;\n@@ -15450,65 +15447,65 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)\n \t\tNPHY_RFSEQ_CMD_CLR_HIQ_DIS,\n \t\tNPHY_RFSEQ_CMD_SET_HPF_BW\n \t};\n-\tu8 rfseq_updategainu_dlys[] = { 10, 30, 1 };\n-\ts8 lna1G_gain_db[] = { 7, 11, 16, 23 };\n-\ts8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };\n-\ts8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };\n-\ts8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };\n-\ts8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };\n-\ts8 lna1A_gain_db[] = { 7, 11, 17, 23 };\n-\ts8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };\n-\ts8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };\n-\ts8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };\n-\ts8 *lna1_gain_db = NULL;\n-\ts8 lna2G_gain_db[] = { -5, 6, 10, 14 };\n-\ts8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };\n-\ts8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };\n-\ts8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };\n-\ts8 lna2A_gain_db[] = { -6, 2, 6, 10 };\n-\ts8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };\n-\ts8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };\n-\ts8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };\n-\ts8 *lna2_gain_db = NULL;\n-\ts8 tiaG_gain_db[] = {\n+\tstatic const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };\n+\tstatic const s8 lna1G_gain_db[] = { 7, 11, 16, 23 };\n+\tstatic const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };\n+\tstatic const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };\n+\tstatic const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };\n+\tstatic const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };\n+\tstatic const s8 lna1A_gain_db[] = { 7, 11, 17, 23 };\n+\tstatic const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };\n+\tstatic const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };\n+\tstatic const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };\n+\tconst s8 *lna1_gain_db = NULL;\n+\tstatic const s8 lna2G_gain_db[] = { -5, 6, 10, 14 };\n+\tstatic const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };\n+\tstatic const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };\n+\tstatic const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };\n+\tstatic const s8 lna2A_gain_db[] = { -6, 2, 6, 10 };\n+\tstatic const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };\n+\tstatic const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };\n+\tstatic const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };\n+\tconst s8 *lna2_gain_db = NULL;\n+\tstatic const s8 tiaG_gain_db[] = {\n \t\t0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A };\n-\ts8 tiaA_gain_db[] = {\n+\tstatic const s8 tiaA_gain_db[] = {\n \t\t0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 };\n-\ts8 tiaA_gain_db_rev4[] = {\n+\tstatic const s8 tiaA_gain_db_rev4[] = {\n \t\t0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };\n-\ts8 tiaA_gain_db_rev5[] = {\n+\tstatic const s8 tiaA_gain_db_rev5[] = {\n \t\t0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };\n-\ts8 tiaA_gain_db_rev6[] = {\n+\tstatic const s8 tiaA_gain_db_rev6[] = {\n \t\t0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };\n-\ts8 *tia_gain_db;\n-\ts8 tiaG_gainbits[] = {\n+\tconst s8 *tia_gain_db;\n+\tstatic const s8 tiaG_gainbits[] = {\n \t\t0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 };\n-\ts8 tiaA_gainbits[] = {\n+\tstatic const s8 tiaA_gainbits[] = {\n \t\t0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 };\n-\ts8 tiaA_gainbits_rev4[] = {\n+\tstatic const s8 tiaA_gainbits_rev4[] = {\n \t\t0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };\n-\ts8 tiaA_gainbits_rev5[] = {\n+\tstatic const s8 tiaA_gainbits_rev5[] = {\n \t\t0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };\n-\ts8 tiaA_gainbits_rev6[] = {\n+\tstatic const s8 tiaA_gainbits_rev6[] = {\n \t\t0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };\n-\ts8 *tia_gainbits;\n-\ts8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };\n-\ts8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };\n-\tu16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };\n-\tu16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };\n-\tu16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };\n-\tu16 rfseqG_init_gain_rev5_elna[] = {\n+\tconst s8 *tia_gainbits;\n+\tstatic const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };\n+\tstatic const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };\n+\tstatic const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };\n+\tstatic const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };\n+\tstatic const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };\n+\tstatic const u16 rfseqG_init_gain_rev5_elna[] = {\n \t\t0x013f, 0x013f, 0x013f, 0x013f };\n-\tu16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };\n-\tu16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };\n-\tu16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };\n-\tu16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };\n-\tu16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };\n-\tu16 rfseqA_init_gain_rev4_elna[] = {\n+\tstatic const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };\n+\tstatic const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };\n+\tstatic const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };\n+\tstatic const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };\n+\tstatic const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };\n+\tstatic const u16 rfseqA_init_gain_rev4_elna[] = {\n \t\t0x314f, 0x314f, 0x314f, 0x314f };\n-\tu16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };\n-\tu16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };\n-\tu16 *rfseq_init_gain;\n+\tstatic const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };\n+\tstatic const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };\n+\tconst u16 *rfseq_init_gain;\n \tu16 initG_gaincode = 0x627e;\n \tu16 initG_gaincode_rev4 = 0x527e;\n \tu16 initG_gaincode_rev5 = 0x427e;\n@@ -15538,10 +15535,10 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)\n \tu16 clip1mdA_gaincode_rev6 = 0x2084;\n \tu16 clip1md_gaincode = 0;\n \tu16 clip1loG_gaincode = 0x0074;\n-\tu16 clip1loG_gaincode_rev5[] = {\n+\tstatic const u16 clip1loG_gaincode_rev5[] = {\n \t\t0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c\n \t};\n-\tu16 clip1loG_gaincode_rev6[] = {\n+\tstatic const u16 clip1loG_gaincode_rev6[] = {\n \t\t0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e\n \t};\n \tu16 clip1loG_gaincode_rev6_224B0 = 0x1074;\n@@ -16066,7 +16063,7 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)\n \n static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n {\n-\tu8 rfseq_rx2tx_events[] = {\n+\tstatic const u8 rfseq_rx2tx_events[] = {\n \t\tNPHY_RFSEQ_CMD_NOP,\n \t\tNPHY_RFSEQ_CMD_RXG_FBW,\n \t\tNPHY_RFSEQ_CMD_TR_SWITCH,\n@@ -16076,7 +16073,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \t\tNPHY_RFSEQ_CMD_EXT_PA\n \t};\n \tu8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 };\n-\tu8 rfseq_tx2rx_events[] = {\n+\tstatic const u8 rfseq_tx2rx_events[] = {\n \t\tNPHY_RFSEQ_CMD_NOP,\n \t\tNPHY_RFSEQ_CMD_EXT_PA,\n \t\tNPHY_RFSEQ_CMD_TX_GAIN,\n@@ -16085,8 +16082,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \t\tNPHY_RFSEQ_CMD_RXG_FBW,\n \t\tNPHY_RFSEQ_CMD_CLR_HIQ_DIS\n \t};\n-\tu8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };\n-\tu8 rfseq_tx2rx_events_rev3[] = {\n+\tstatic const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };\n+\tstatic const u8 rfseq_tx2rx_events_rev3[] = {\n \t\tNPHY_REV3_RFSEQ_CMD_EXT_PA,\n \t\tNPHY_REV3_RFSEQ_CMD_INT_PA_PU,\n \t\tNPHY_REV3_RFSEQ_CMD_TX_GAIN,\n@@ -16096,7 +16093,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \t\tNPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS,\n \t\tNPHY_REV3_RFSEQ_CMD_END\n \t};\n-\tu8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };\n+\tstatic const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };\n \tu8 rfseq_rx2tx_events_rev3[] = {\n \t\tNPHY_REV3_RFSEQ_CMD_NOP,\n \t\tNPHY_REV3_RFSEQ_CMD_RXG_FBW,\n@@ -16110,7 +16107,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \t};\n \tu8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 };\n \n-\tu8 rfseq_rx2tx_events_rev3_ipa[] = {\n+\tstatic const u8 rfseq_rx2tx_events_rev3_ipa[] = {\n \t\tNPHY_REV3_RFSEQ_CMD_NOP,\n \t\tNPHY_REV3_RFSEQ_CMD_RXG_FBW,\n \t\tNPHY_REV3_RFSEQ_CMD_TR_SWITCH,\n@@ -16121,15 +16118,15 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \t\tNPHY_REV3_RFSEQ_CMD_INT_PA_PU,\n \t\tNPHY_REV3_RFSEQ_CMD_END\n \t};\n-\tu8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };\n-\tu16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };\n+\tstatic const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };\n+\tstatic const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };\n \n \ts16 alpha0, alpha1, alpha2;\n \ts16 beta0, beta1, beta2;\n \tu32 leg_data_weights, ht_data_weights, nss1_data_weights,\n \t stbc_data_weights;\n \tu8 chan_freq_range = 0;\n-\tu16 dac_control = 0x0002;\n+\tstatic const u16 dac_control = 0x0002;\n \tu16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 };\n \tu16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 };\n \tu16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 };\n@@ -16139,8 +16136,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \tu16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 };\n \tu16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 };\n \tu16 *aux_adc_gain;\n-\tu16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };\n-\tu16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };\n+\tstatic const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };\n+\tstatic const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };\n \ts32 min_nvar_val = 0x18d;\n \ts32 min_nvar_offset_6mbps = 20;\n \tu8 pdetrange;\n@@ -16151,9 +16148,9 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)\n \tu16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77;\n \tu16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77;\n \tu16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77;\n-\tu16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };\n-\tu16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };\n-\tu16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };\n+\tstatic const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };\n+\tstatic const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };\n+\tstatic const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };\n \tu16 ipalvlshift_3p3_war_en = 0;\n \tu16 rccal_bcap_val, rccal_scap_val;\n \tu16 rccal_tx20_11b_bcap = 0;\n@@ -24291,13 +24288,13 @@ static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core)\n \tu16 bbmult;\n \tu16 tblentry;\n \n-\tstruct nphy_txiqcal_ladder ladder_lo[] = {\n+\tstatic const struct nphy_txiqcal_ladder ladder_lo[] = {\n \t\t{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},\n \t\t{25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5},\n \t\t{25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7}\n \t};\n \n-\tstruct nphy_txiqcal_ladder ladder_iq[] = {\n+\tstatic const struct nphy_txiqcal_ladder ladder_iq[] = {\n \t\t{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},\n \t\t{25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1},\n \t\t{100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7}\n@@ -25773,67 +25770,67 @@ wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain,\n \tu16 cal_gain[2];\n \tstruct nphy_iqcal_params cal_params[2];\n \tu32 tbl_len;\n-\tvoid *tbl_ptr;\n+\tconst void *tbl_ptr;\n \tbool ladder_updated[2];\n \tu8 mphase_cal_lastphase = 0;\n \tint bcmerror = 0;\n \tbool phyhang_avoid_state = false;\n \n-\tu16 tbl_tx_iqlo_cal_loft_ladder_20[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {\n \t\t0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901,\n \t\t0x1902,\n \t\t0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607,\n \t\t0x6407\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {\n \t\t0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400,\n \t\t0x3200,\n \t\t0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406,\n \t\t0x6407\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_loft_ladder_40[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {\n \t\t0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201,\n \t\t0x1202,\n \t\t0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207,\n \t\t0x4707\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {\n \t\t0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900,\n \t\t0x2300,\n \t\t0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706,\n \t\t0x4707\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_startcoefs[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_startcoefs[] = {\n \t\t0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,\n \t\t0x0000\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_cmds_fullcal[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {\n \t\t0x8123, 0x8264, 0x8086, 0x8245, 0x8056,\n \t\t0x9123, 0x9264, 0x9086, 0x9245, 0x9056\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_cmds_recal[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_cmds_recal[] = {\n \t\t0x8101, 0x8253, 0x8053, 0x8234, 0x8034,\n \t\t0x9101, 0x9253, 0x9053, 0x9234, 0x9034\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {\n \t\t0x0000, 0x0000, 0x0000, 0x0000, 0x0000,\n \t\t0x0000, 0x0000, 0x0000, 0x0000, 0x0000,\n \t\t0x0000\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {\n \t\t0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234,\n \t\t0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234\n \t};\n \n-\tu16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {\n+\tstatic const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {\n \t\t0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223,\n \t\t0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223\n \t};\n", "prefixes": [ "v4", "1/9" ] }