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GET /api/patches/817655/?format=api
{ "id": 817655, "url": "http://patchwork.ozlabs.org/api/patches/817655/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170922171323.10348-3-f4bug@amsat.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170922171323.10348-3-f4bug@amsat.org>", "list_archive_url": null, "date": "2017-09-22T17:13:18", "name": "[v5,2/7] hw/mdio: Add PHY register definition", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1a7027d33fb4d1d88438f2530d88c2b37cff941a", "submitter": { "id": 70924, "url": "http://patchwork.ozlabs.org/api/people/70924/?format=api", "name": "Philippe Mathieu-Daudé", "email": "f4bug@amsat.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170922171323.10348-3-f4bug@amsat.org/mbox/", "series": [ { "id": 4680, "url": "http://patchwork.ozlabs.org/api/series/4680/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=4680", "date": "2017-09-22T17:13:16", "name": "Generalize MDIO framework", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/4680/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/817655/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/817655/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"dkwLpiyk\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xzKsZ30Zhz9s7h\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 23 Sep 2017 03:17:06 +1000 (AEST)", "from localhost ([::1]:60296 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dvRZY-00064W-Ft\n\tfor incoming@patchwork.ozlabs.org; Fri, 22 Sep 2017 13:17:04 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:59352)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <philippe.mathieu.daude@gmail.com>)\n\tid 1dvRWM-00039s-QP\n\tfor qemu-devel@nongnu.org; Fri, 22 Sep 2017 13:13:48 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <philippe.mathieu.daude@gmail.com>)\n\tid 1dvRWL-0003R5-LA\n\tfor qemu-devel@nongnu.org; Fri, 22 Sep 2017 13:13:46 -0400", "from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:34548)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <philippe.mathieu.daude@gmail.com>)\n\tid 1dvRWL-0003Qf-HY\n\tfor qemu-devel@nongnu.org; Fri, 22 Sep 2017 13:13:45 -0400", "by mail-qt0-x244.google.com with SMTP id q8so1046258qtb.1\n\tfor <qemu-devel@nongnu.org>; Fri, 22 Sep 2017 10:13:45 -0700 (PDT)", "from yoga.lan ([181.93.89.178]) by smtp.gmail.com with ESMTPSA id\n\tf69sm238468qke.27.2017.09.22.10.13.42\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 22 Sep 2017 10:13:44 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=7KpW00sMxw16wF0mIEkeF89e/zuRxR6YFdtK1trbEKw=;\n\tb=dkwLpiykxStyziN1uZTOc3Q0x+iplgNaM4q2eajF6cygNLZv36rS/6ca8ks6y8bmAJ\n\tXIRR1TMy7ZM7VPDH3+jYgpBgdJyjI+Z71UjV6rBJosKAy0whq7Dl4NydzekajkTU+O5o\n\tpyEhtxJ4J62kmmZWwa6Yj/4dBoGH3KSCnR10bCiQiurF45nRP4LZ7rD0fDA2vTXGVKOO\n\twJULB8boK7/LzIxPutMChP8EYuk2laoedurlXrnNjSJblJNsr2fnR8XR4ChqcAJ5D+kR\n\tN01DFss0aQ2WTOK5KVyUeuMQdzq/pWIIJiBpvYzI0E991fL4THeMxtnLupJ3erDiSAeA\n\tqMmw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references:mime-version:content-transfer-encoding;\n\tbh=7KpW00sMxw16wF0mIEkeF89e/zuRxR6YFdtK1trbEKw=;\n\tb=qgDdbMpTZsCTcLgiFchJVZcn+BaDECLhDR6Le+Un1stS4P40EaAFGgCw5NaAb7DjtQ\n\tC3ZwAftX+5xwL5qA1v9MBMrXwQccvLdEYeJ7yd5F50w2DWGtJlraotLrjt0WzlZULQXF\n\tzsR1N+NHjdPY1/BdiGnyk93Q3IRefmjVYiJIKh1R6UrvwFxtRX0k+CvS3rT1slk9mR35\n\ttimVQpyGRUmvsbsrrPGF9cMUKs9ZG+vsQM9F+9s89wRVTHlzvcc/9vFpAfMu9lA5aFTT\n\tPTHRjxbLUe0xP6o+ZTa1h+RbxIkfTI6iKPFDl30803Z8kfb0TdpsArF3pHbgy9lNJXxO\n\t5gSw==", "X-Gm-Message-State": "AHPjjUg+HTHLGp7ieQSaJZ/mPQGaPrBwIe1o7dNx+EfyjysEVNG9P6DO\n\tOe5Tg1SU0P5mXE8cqAZMMC0=", "X-Google-Smtp-Source": "AOwi7QDDU3npOe0uC7MpnaysQKFhER0t1R1l+gFO4/6wkrwIQcuTDw6LG9uUMRijv+r3JuGqEniXmw==", "X-Received": "by 10.200.43.228 with SMTP id n33mr9705232qtn.241.1506100425068; \n\tFri, 22 Sep 2017 10:13:45 -0700 (PDT)", "From": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>", "To": "Peter Maydell <peter.maydell@linaro.org>,\n\tGrant Likely <grant.likely@arm.com>, Jason Wang <jasowang@redhat.com>", "Date": "Fri, 22 Sep 2017 14:13:18 -0300", "Message-Id": "<20170922171323.10348-3-f4bug@amsat.org>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170922171323.10348-1-f4bug@amsat.org>", "References": "<20170922171323.10348-1-f4bug@amsat.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400d:c0d::244", "Subject": "[Qemu-devel] [PATCH v5 2/7] hw/mdio: Add PHY register definition", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "qemu-devel@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?=\n\t<f4bug@amsat.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Grant Likely <grant.likely@arm.com>\n\nTrivial patch to add #defines for defined PHY register address and bit fields\n\nSigned-off-by: Grant Likely <grant.likely@arm.com>\nSigned-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\n---\n include/hw/net/mdio.h | 24 ++++++++++++++++++++++--\n hw/net/mdio.c | 8 ++++----\n 2 files changed, 26 insertions(+), 6 deletions(-)", "diff": "diff --git a/include/hw/net/mdio.h b/include/hw/net/mdio.h\nindex ac36aed3c3..7ffa4389b9 100644\n--- a/include/hw/net/mdio.h\n+++ b/include/hw/net/mdio.h\n@@ -25,14 +25,34 @@\n * THE SOFTWARE.\n */\n \n-/* PHY Advertisement control register */\n+/* PHY MII Register/Bit Definitions */\n+/* PHY Registers defined by IEEE */\n+#define PHY_CTRL 0x00 /* Control Register */\n+#define PHY_STATUS 0x01 /* Status Regiser */\n+#define PHY_ID1 0x02 /* Phy Id Reg (word 1) */\n+#define PHY_ID2 0x03 /* Phy Id Reg (word 2) */\n+#define PHY_AUTONEG_ADV 0x04 /* Autoneg Advertisement */\n+#define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */\n+#define PHY_AUTONEG_EXP 0x06 /* Autoneg Expansion Reg */\n+#define PHY_NEXT_PAGE_TX 0x07 /* Next Page TX */\n+#define PHY_LP_NEXT_PAGE 0x08 /* Link Partner Next Page */\n+#define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */\n+#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */\n+#define PHY_EXT_STATUS 0x0F /* Extended Status Reg */\n+\n+#define NUM_PHY_REGS 0x20 /* 5 bit address bus (0-0x1F) */\n+\n+#define PHY_CTRL_RST 0x8000 /* PHY reset command */\n+#define PHY_CTRL_ANEG_RST 0x0200 /* Autonegotiation reset command */\n+\n+/* PHY Advertisement control and remote capability registers (same bitfields) */\n #define PHY_ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */\n #define PHY_ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */\n #define PHY_ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */\n #define PHY_ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */\n \n struct qemu_phy {\n- uint32_t regs[32];\n+ uint32_t regs[NUM_PHY_REGS];\n \n int link;\n \ndiff --git a/hw/net/mdio.c b/hw/net/mdio.c\nindex 3763fcc8af..3d70d99077 100644\n--- a/hw/net/mdio.c\n+++ b/hw/net/mdio.c\n@@ -122,12 +122,12 @@ static void tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data)\n \n void tdk_init(struct qemu_phy *phy)\n {\n- phy->regs[0] = 0x3100;\n+ phy->regs[PHY_CTRL] = 0x3100;\n /* PHY Id. */\n- phy->regs[2] = 0x0300;\n- phy->regs[3] = 0xe400;\n+ phy->regs[PHY_ID1] = 0x0300;\n+ phy->regs[PHY_ID2] = 0xe400;\n /* Autonegotiation advertisement reg. */\n- phy->regs[4] = 0x01e1;\n+ phy->regs[PHY_AUTONEG_ADV] = 0x01e1;\n phy->link = 1;\n \n phy->read = tdk_read;\n", "prefixes": [ "v5", "2/7" ] }