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GET /api/patches/816928/?format=api
{ "id": 816928, "url": "http://patchwork.ozlabs.org/api/patches/816928/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506005496-8635-6-git-send-email-jjhiblot@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506005496-8635-6-git-send-email-jjhiblot@ti.com>", "list_archive_url": null, "date": "2017-09-21T14:51:36", "name": "[U-Boot,v2,5/5] mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "6c1a888ba842ffc721ca75add3e8bf341b7cd29d", "submitter": { "id": 70508, "url": "http://patchwork.ozlabs.org/api/people/70508/?format=api", "name": "Jean-Jacques Hiblot", "email": "jjhiblot@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506005496-8635-6-git-send-email-jjhiblot@ti.com/mbox/", "series": [ { "id": 4406, "url": "http://patchwork.ozlabs.org/api/series/4406/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=4406", "date": "2017-09-21T14:51:31", "name": "mmc: omap_hsmmc: Add support for ADMA", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/4406/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816928/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816928/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"P/Lgf0AE\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyflZ53qTz9t3v\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 22 Sep 2017 00:54:34 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 64D3DC22091; Thu, 21 Sep 2017 14:53:02 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id A8FBAC21FE5;\n\tThu, 21 Sep 2017 14:52:27 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid C1D23C2202E; Thu, 21 Sep 2017 14:52:03 +0000 (UTC)", "from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77])\n\tby lists.denx.de (Postfix) with ESMTPS id 31C23C21E48\n\tfor <u-boot@lists.denx.de>; Thu, 21 Sep 2017 14:52:00 +0000 (UTC)", "from dlelxv90.itg.ti.com ([172.17.2.17])\n\tby lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LEpwBD001778; \n\tThu, 21 Sep 2017 09:51:58 -0500", "from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37])\n\tby dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEpw2T019674; \n\tThu, 21 Sep 2017 09:51:58 -0500", "from DLEE108.ent.ti.com (157.170.170.38) by DLEE107.ent.ti.com\n\t(157.170.170.37) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tThu, 21 Sep 2017 09:51:57 -0500", "from dflp33.itg.ti.com (10.64.6.16) by DLEE108.ent.ti.com\n\t(157.170.170.38) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Thu, 21 Sep 2017 09:51:57 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEpu6T022243;\n\tThu, 21 Sep 2017 09:51:57 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506005518;\n\tbh=c8PJJGERbDCoJGEON2IYWWwRYrO6RKr48AOGE4O7s0Q=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=P/Lgf0AEeUBZR5/7yeiDNP2dLDolZtMghaPc7ywVlLN0mgTx+n8hegN7Uiq5AJrYo\n\tKK+sjPQMXAXrZwvXa//6F3MTA7G6qg3QG/1Ml+g+4lEtwmImauLPPTd/MGJzNhShSs\n\tKnjH+JD0WSZD3xwbLfsYlXK4mGMPfMYEVu4nfTRc=", "From": "Jean-Jacques Hiblot <jjhiblot@ti.com>", "To": "<jh80.chung@samsung.com>, <trini@konsulko.com>, <kishon@ti.com>,\n\t<sjg@chromium.org>", "Date": "Thu, 21 Sep 2017 16:51:36 +0200", "Message-ID": "<1506005496-8635-6-git-send-email-jjhiblot@ti.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1506005496-8635-1-git-send-email-jjhiblot@ti.com>", "References": "<1506005496-8635-1-git-send-email-jjhiblot@ti.com>", "MIME-Version": "1.0", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2 5/5] mmc: omap_hsmmc: Fix incorrect bit\n\toperations for disabling a bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Kishon Vijay Abraham I <kishon@ti.com>\n\nomap_hsmmc driver uses \"|\" in a couple of places for disabling a bit.\nWhile it's okay to use it in \"mmc_reg_out\" (since mmc_reg_out has a\n_mask_ argument to take care of resetting a bit), it's incorrectly used\nfor resetting flags in \"omap_hsmmc_send_cmd\".\n\nFix it here by using \"&= ~()\" to reset a bit.\n\nSigned-off-by: Kishon Vijay Abraham I <kishon@ti.com>\nSigned-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>\n---\n arch/arm/include/asm/omap_mmc.h | 6 ++----\n drivers/mmc/omap_hsmmc.c | 7 ++++---\n 2 files changed, 6 insertions(+), 7 deletions(-)", "diff": "diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h\nindex 128cd81..bf9de9b 100644\n--- a/arch/arm/include/asm/omap_mmc.h\n+++ b/arch/arm/include/asm/omap_mmc.h\n@@ -90,10 +90,9 @@ struct omap_hsmmc_plat {\n #define DMA_MASTER\t\t\t(0x1 << 20)\n #define BLEN_512BYTESLEN\t\t(0x200 << 0)\n #define NBLK_STPCNT\t\t\t(0x0 << 16)\n-#define DE_DISABLE\t\t\t(0x0 << 0)\n-#define BCE_DISABLE\t\t\t(0x0 << 1)\n+#define DE_ENABLE\t\t\t(0x1 << 0)\n #define BCE_ENABLE\t\t\t(0x1 << 1)\n-#define ACEN_DISABLE\t\t\t(0x0 << 2)\n+#define ACEN_ENABLE\t\t\t(0x1 << 2)\n #define DDIR_OFFSET\t\t\t(4)\n #define DDIR_MASK\t\t\t(0x1 << 4)\n #define DDIR_WRITE\t\t\t(0x0 << 4)\n@@ -134,7 +133,6 @@ struct omap_hsmmc_plat {\n #define ICS_NOTREADY\t\t\t(0x0 << 1)\n #define ICE_OSCILLATE\t\t\t(0x1 << 0)\n #define CEN_MASK\t\t\t(0x1 << 2)\n-#define CEN_DISABLE\t\t\t(0x0 << 2)\n #define CEN_ENABLE\t\t\t(0x1 << 2)\n #define CLKD_OFFSET\t\t\t(6)\n #define CLKD_MASK\t\t\t(0x3FF << 6)\ndiff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c\nindex fcda0e2..1c3d1a5 100644\n--- a/drivers/mmc/omap_hsmmc.c\n+++ b/drivers/mmc/omap_hsmmc.c\n@@ -294,7 +294,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc)\n \n \tdsor = 240;\n \tmmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),\n-\t\t(ICE_STOP | DTO_15THDTO | CEN_DISABLE));\n+\t\t(ICE_STOP | DTO_15THDTO));\n \tmmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,\n \t\t(dsor << CLKD_OFFSET) | ICE_OSCILLATE);\n \tstart = get_timer(0);\n@@ -542,7 +542,8 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,\n \n \t/* enable default flags */\n \tflags =\tflags | (CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK |\n-\t\t\tMSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE);\n+\t\t\tMSBS_SGLEBLK);\n+\tflags &= ~(ACEN_ENABLE | BCE_ENABLE | DE_ENABLE);\n \n \tif (cmd->resp_type & MMC_RSP_CRC)\n \t\tflags |= CCCE_CHECK;\n@@ -809,7 +810,7 @@ static int omap_hsmmc_set_ios(struct udevice *dev)\n \t}\n \n \tmmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),\n-\t\t\t\t(ICE_STOP | DTO_15THDTO | CEN_DISABLE));\n+\t\t\t\t(ICE_STOP | DTO_15THDTO));\n \n \tmmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,\n \t\t\t\t(dsor << CLKD_OFFSET) | ICE_OSCILLATE);\n", "prefixes": [ "U-Boot", "v2", "5/5" ] }