Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/815817/?format=api
{ "id": 815817, "url": "http://patchwork.ozlabs.org/api/patches/815817/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170919201808.11433-5-tuomas.tynkkynen@iki.fi/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170919201808.11433-5-tuomas.tynkkynen@iki.fi>", "list_archive_url": null, "date": "2017-09-19T20:18:06", "name": "[U-Boot,v2,4/6] PCI: Add driver for a 'pci-host-ecam-generic' host controller", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "7112e2f2570bf7770aeff7ef0dc5789bb4edeee2", "submitter": { "id": 32296, "url": "http://patchwork.ozlabs.org/api/people/32296/?format=api", "name": "Tuomas Tynkkynen", "email": "tuomas.tynkkynen@iki.fi" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170919201808.11433-5-tuomas.tynkkynen@iki.fi/mbox/", "series": [ { "id": 3961, "url": "http://patchwork.ozlabs.org/api/series/3961/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=3961", "date": "2017-09-19T20:18:02", "name": "Board for QEMU's '-machine virt' on ARM", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3961/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/815817/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/815817/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"RNBtjLfs\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxZ6G6JR3z9s81\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 20 Sep 2017 06:21:58 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 8EF31C21CB6; Tue, 19 Sep 2017 20:19:58 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 650D4C21DFA;\n\tTue, 19 Sep 2017 20:18:50 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 100BAC21DA2; Tue, 19 Sep 2017 20:18:32 +0000 (UTC)", "from mail-lf0-f68.google.com (mail-lf0-f68.google.com\n\t[209.85.215.68])\n\tby lists.denx.de (Postfix) with ESMTPS id 313E8C21D74\n\tfor <u-boot@lists.denx.de>; Tue, 19 Sep 2017 20:18:29 +0000 (UTC)", "by mail-lf0-f68.google.com with SMTP id c8so358159lfe.2\n\tfor <u-boot@lists.denx.de>; Tue, 19 Sep 2017 13:18:29 -0700 (PDT)", "from localhost.localdomain (85-76-68-181-nat.elisa-mobile.fi.\n\t[85.76.68.181]) by smtp.gmail.com with ESMTPSA id\n\ta197sm21154lfe.95.2017.09.19.13.18.27\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 19 Sep 2017 13:18:27 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=eut9ZwGnS01Dcve/b63278twyYwP8XO+T0orUMzRUEI=;\n\tb=RNBtjLfss//b92967AfbL1FHE6UeF4faj8TFhdQkb5ymk2cwCPhsyKX/hMFrWnrvgS\n\t1Vw2Ijk2TpAXQdaD4tJ3j1gs6x1l3Ivuwv7AkbVdnD2nyWzBBIikbzHG9r0stejwlKTG\n\tCN+XhTlNPq4hVAuuv67ZqDipUe29UjUeH/zDqOE9UkTqYCVdADCyFMrX+Tlxz8PUwkyg\n\t+Skk3BiO/Y1TT9vVhMKSwIJubTyehOc8F1UpZLA4Ij1JDNn52rA19o3ZxkGdFO0hN5Tr\n\tYM0iAeaAM+c2Aazt6ZLcpN5eAPARhwIzACtQhD4zGmwOagkOgI4ZMo+551mn+UfIX+Tl\n\tAzqQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=eut9ZwGnS01Dcve/b63278twyYwP8XO+T0orUMzRUEI=;\n\tb=DT1syDk+OV3mVVHlQ7NOUgCfrPB91KYrqKTRQ5wgJ9/lCLGeokruJa6fONWJBASldt\n\tqNFc1Zc4jljjPt+hdbQa71adBgsMLRTcqwL56+YNt8VOhT43ZmvdOptoY6zkLmogEFhP\n\tSBgcfLx/F1CbeiP8MpU5bIzBeX+OSe4V1F3tRmK7jYTmocLI3D/k7H1x3yBMFzsWj4+n\n\t/c6s2Gp70+H8UpDz4clMfLR7zW7xWYzkwwp31pCr7lBtloXpE/RKgHSXZnKUxZbKmRue\n\tOVreKxV3UF/XMTeHaAvvcqqz4BHkrszCcIY877oCvRUNVP3tMQ9hZXZGYTNc0jY2VfBf\n\tyZTg==", "X-Gm-Message-State": "AHPjjUjJFc2Hq+QhVdWI3WHqfPg/vUVphpPc4w8g9TALaobMIJDNQazo\n\tYaP4oSDZASDvpfAdEVN6N/Bt4A==", "X-Google-Smtp-Source": "AOwi7QB62ULsAyePVJquIXLJYev9mgTYp0VVjEyW6ICf5qbPjW8dJtfKBD1ISnYEhShoi78dF17yww==", "X-Received": "by 10.25.59.147 with SMTP id d19mr1082019lfl.90.1505852308287;\n\tTue, 19 Sep 2017 13:18:28 -0700 (PDT)", "From": "Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>", "To": "u-boot@lists.denx.de", "Date": "Tue, 19 Sep 2017 23:18:06 +0300", "Message-Id": "<20170919201808.11433-5-tuomas.tynkkynen@iki.fi>", "X-Mailer": "git-send-email 2.13.0", "In-Reply-To": "<20170919201808.11433-1-tuomas.tynkkynen@iki.fi>", "References": "<20170919201808.11433-1-tuomas.tynkkynen@iki.fi>", "Cc": "Tom Rini <trini@konsulko.com>", "Subject": "[U-Boot] [PATCH v2 4/6] PCI: Add driver for a\n\t'pci-host-ecam-generic' host controller", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "QEMU emulates such a device with '-machine virt,highmem=off' on ARM.\nThe 'highmem=off' part is required for things to work as the PCI code\nin U-Boot doesn't seem to support 64-bit BARs.\n\nSigned-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>\n---\nv2:\n - no 'default n'\n - remove unnecessary non-DM struct field (inherited from the Xilinx driver)\n - fix doc comment problems (inherited from the Xilinx driver)\n - use the new generic memory mapped config space helpers\n---\n drivers/pci/Kconfig | 8 +++\n drivers/pci/Makefile | 1 +\n drivers/pci/pcie_ecam_generic.c | 143 ++++++++++++++++++++++++++++++++++++++++\n 3 files changed, 152 insertions(+)\n create mode 100644 drivers/pci/pcie_ecam_generic.c", "diff": "diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig\nindex e2a1c0a409..648dff7543 100644\n--- a/drivers/pci/Kconfig\n+++ b/drivers/pci/Kconfig\n@@ -33,6 +33,14 @@ config PCI_PNP\n \thelp\n \t Enable PCI memory and I/O space resource allocation and assignment.\n \n+config PCIE_ECAM_GENERIC\n+\tbool \"Generic ECAM-based PCI host controller support\"\n+\tdefault n\n+\tdepends on DM_PCI\n+\thelp\n+\t Say Y here if you want to enable support for generic ECAM-based\n+\t PCIe host controllers, such as the one emulated by QEMU.\n+\n config PCIE_DW_MVEBU\n \tbool \"Enable Armada-8K PCIe driver (DesignWare core)\"\n \tdefault n\ndiff --git a/drivers/pci/Makefile b/drivers/pci/Makefile\nindex ad44e83996..5eb12efbf5 100644\n--- a/drivers/pci/Makefile\n+++ b/drivers/pci/Makefile\n@@ -17,6 +17,7 @@ obj-$(CONFIG_PCI) += pci.o pci_auto_old.o\n endif\n obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o\n \n+obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o\n obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o\n obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o\n obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o\ndiff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c\nnew file mode 100644\nindex 0000000000..2758f90de1\n--- /dev/null\n+++ b/drivers/pci/pcie_ecam_generic.c\n@@ -0,0 +1,143 @@\n+/*\n+ * Generic PCIE host provided by e.g. QEMU\n+ *\n+ * Heavily based on drivers/pci/pcie_xilinx.c\n+ *\n+ * Copyright (C) 2016 Imagination Technologies\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0\n+ */\n+\n+#include <common.h>\n+#include <dm.h>\n+#include <pci.h>\n+\n+#include <asm/io.h>\n+\n+/**\n+ * struct generic_ecam_pcie - generic_ecam PCIe controller state\n+ * @cfg_base: The base address of memory mapped configuration space\n+ */\n+struct generic_ecam_pcie {\n+\tvoid *cfg_base;\n+};\n+\n+/**\n+ * pci_generic_ecam_conf_address() - Calculate the address of a config access\n+ * @bus: Pointer to the PCI bus\n+ * @bdf: Identifies the PCIe device to access\n+ * @offset: The offset into the device's configuration space\n+ * @paddress: Pointer to the pointer to write the calculates address to\n+ *\n+ * Calculates the address that should be accessed to perform a PCIe\n+ * configuration space access for a given device identified by the PCIe\n+ * controller device @pcie and the bus, device & function numbers in @bdf. If\n+ * access to the device is not valid then the function will return an error\n+ * code. Otherwise the address to access will be written to the pointer pointed\n+ * to by @paddress.\n+ */\n+static int pci_generic_ecam_conf_address(struct udevice *bus, pci_dev_t bdf,\n+\t\t\t\t\t uint offset, void **paddress)\n+{\n+\tstruct generic_ecam_pcie *pcie = dev_get_priv(bus);\n+\tvoid *addr;\n+\n+\taddr = pcie->cfg_base;\n+\taddr += PCI_BUS(bdf) << 20;\n+\taddr += PCI_DEV(bdf) << 15;\n+\taddr += PCI_FUNC(bdf) << 12;\n+\taddr += offset;\n+\t*paddress = addr;\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * pci_generic_ecam_read_config() - Read from configuration space\n+ * @bus: Pointer to the PCI bus\n+ * @bdf: Identifies the PCIe device to access\n+ * @offset: The offset into the device's configuration space\n+ * @valuep: A pointer at which to store the read value\n+ * @size: Indicates the size of access to perform\n+ *\n+ * Read a value of size @size from offset @offset within the configuration\n+ * space of the device identified by the bus, device & function numbers in @bdf\n+ * on the PCI bus @bus.\n+ */\n+static int pci_generic_ecam_read_config(struct udevice *bus, pci_dev_t bdf,\n+\t\t\t\t uint offset, ulong *valuep,\n+\t\t\t\t enum pci_size_t size)\n+{\n+\treturn pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,\n+\t\t\t\t\t bdf, offset, valuep, size);\n+}\n+\n+/**\n+ * pci_generic_ecam_write_config() - Write to configuration space\n+ * @bus: Pointer to the PCI bus\n+ * @bdf: Identifies the PCIe device to access\n+ * @offset: The offset into the device's configuration space\n+ * @value: The value to write\n+ * @size: Indicates the size of access to perform\n+ *\n+ * Write the value @value of size @size from offset @offset within the\n+ * configuration space of the device identified by the bus, device & function\n+ * numbers in @bdf on the PCI bus @bus.\n+ */\n+static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf,\n+\t\t\t\t uint offset, ulong value,\n+\t\t\t\t enum pci_size_t size)\n+{\n+\treturn pci_generic_mmap_write_config(bus, pci_generic_ecam_conf_address,\n+\t\t\t\t\t bdf, offset, value, size);\n+}\n+\n+/**\n+ * pci_generic_ecam_ofdata_to_platdata() - Translate from DT to device state\n+ * @dev: A pointer to the device being operated on\n+ *\n+ * Translate relevant data from the device tree pertaining to device @dev into\n+ * state that the driver will later make use of. This state is stored in the\n+ * device's private data structure.\n+ *\n+ * Return: 0 on success, else -EINVAL\n+ */\n+static int pci_generic_ecam_ofdata_to_platdata(struct udevice *dev)\n+{\n+\tstruct generic_ecam_pcie *pcie = dev_get_priv(dev);\n+\tstruct fdt_resource reg_res;\n+\tDECLARE_GLOBAL_DATA_PTR;\n+\tint err;\n+\n+\terr = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), \"reg\",\n+\t\t\t 0, ®_res);\n+\tif (err < 0) {\n+\t\terror(\"\\\"reg\\\" resource not found\\n\");\n+\t\treturn err;\n+\t}\n+\n+\tpcie->cfg_base = map_physmem(reg_res.start,\n+\t\t\t\t fdt_resource_size(®_res),\n+\t\t\t\t MAP_NOCACHE);\n+\n+\treturn 0;\n+}\n+\n+static const struct dm_pci_ops pci_generic_ecam_ops = {\n+\t.read_config\t= pci_generic_ecam_read_config,\n+\t.write_config\t= pci_generic_ecam_write_config,\n+};\n+\n+static const struct udevice_id pci_generic_ecam_ids[] = {\n+\t{ .compatible = \"pci-host-ecam-generic\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(pci_generic_ecam) = {\n+\t.name\t\t\t= \"pci_generic_ecam\",\n+\t.id\t\t\t= UCLASS_PCI,\n+\t.of_match\t\t= pci_generic_ecam_ids,\n+\t.ops\t\t\t= &pci_generic_ecam_ops,\n+\t.ofdata_to_platdata\t= pci_generic_ecam_ofdata_to_platdata,\n+\t.priv_auto_alloc_size\t= sizeof(struct generic_ecam_pcie),\n+};\n", "prefixes": [ "U-Boot", "v2", "4/6" ] }