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GET /api/patches/814422/?format=api
{ "id": 814422, "url": "http://patchwork.ozlabs.org/api/patches/814422/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170915233524.1375-3-bjorn.andersson@linaro.org/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170915233524.1375-3-bjorn.andersson@linaro.org>", "list_archive_url": null, "date": "2017-09-15T23:35:24", "name": "[v2,2/2] mmc: sdhci-msm: Enable delay circuit calibration clocks", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "ad7c1af0cb5914efc2bff348297fd18d2722f44a", "submitter": { "id": 68398, "url": "http://patchwork.ozlabs.org/api/people/68398/?format=api", "name": "Bjorn Andersson", "email": "bjorn.andersson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170915233524.1375-3-bjorn.andersson@linaro.org/mbox/", "series": [ { "id": 3399, "url": "http://patchwork.ozlabs.org/api/series/3399/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3399", "date": "2017-09-15T23:35:24", "name": "Support SDHCI on 8974pro devices", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3399/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814422/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814422/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"JpvwjBs+\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xvBbn4pMrz9sPk\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tSat, 16 Sep 2017 09:35:49 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751620AbdIOXfe (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tFri, 15 Sep 2017 19:35:34 -0400", "from mail-pf0-f176.google.com ([209.85.192.176]:53921 \"EHLO\n\tmail-pf0-f176.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751605AbdIOXfc (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Fri, 15 Sep 2017 19:35:32 -0400", "by mail-pf0-f176.google.com with SMTP id x78so2172105pff.10\n\tfor <devicetree@vger.kernel.org>;\n\tFri, 15 Sep 2017 16:35:32 -0700 (PDT)", "from localhost.localdomain (ip68-111-217-79.sd.sd.cox.net.\n\t[68.111.217.79]) by smtp.gmail.com with ESMTPSA id\n\t78sm3924751pfk.70.2017.09.15.16.35.30\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 15 Sep 2017 16:35:30 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=dMN2e9183XTHf+ZicZvF5PkAcf3bJ4w04dIcRIxAdLw=;\n\tb=JpvwjBs+xSOQJlKY9TkgZjJGWEPE3rM6MfJ9Pgq5LjDn3ClsmR7pfxX20DgC4ZI5Kx\n\tYtN/lVW4m1Zy+6F/E0X1ggYKrglneT7mZKAOvOq2q87CP/Dn/23+N5eFw0Q+/n745qKn\n\tPpSu7GS1ov3yYSGzuNu/HZR2el3n9JDLHDlss=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=dMN2e9183XTHf+ZicZvF5PkAcf3bJ4w04dIcRIxAdLw=;\n\tb=VS0gBDuz6YCQ3etvXe1UI+isS3f3ZaGoXpIkRe5eCrWWKxOgldwTBSxPcy9qtl2KrL\n\twYwOUrth324e7ShHpKJ9K2oCUzvkUGBh7w0K/wmBoiPIM4EgSuW8uRgqs+49y2cnTTSY\n\t8zx7mvEjrSWKSW22tTYKZ7M0nZ1HfgiHp4Jv9cC/mp0JvAyX7+jCit+oEh4289/E/6Bk\n\t4k+Zxme7vKKR13TPEpVThaEuMI/dkESDO4xcYPdhFGTytdva9+Tz3wcfepPcVR20fcPb\n\tm1LMFaFX5Aj7ik4HpWHGjpq/JGzK9jbmKZVTpLBHt/RwXBP9vSsWXjNHC1KLycBXz6nR\n\tUfrg==", "X-Gm-Message-State": "AHPjjUgPPi3lPdxyfWTmKMX7tgcmei/Pb0xKpTzThVCap0uKCwbdqLSI\n\tg0Qk9LK5STQoJojU", "X-Google-Smtp-Source": "AOwi7QBmAIwjQx+9YiwMp9J7k8maVhuZzk8jbkmqggry3qQFGRVlNpiAtYJxVR7FKLvBf5KnhVAxLA==", "X-Received": "by 10.98.192.18 with SMTP id x18mr1194822pff.2.1505518531501;\n\tFri, 15 Sep 2017 16:35:31 -0700 (PDT)", "From": "Bjorn Andersson <bjorn.andersson@linaro.org>", "To": "Adrian Hunter <adrian.hunter@intel.com>,\n\tUlf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>,\n\tMark Rutland <mark.rutland@arm.com>", "Cc": "linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-msm@vger.kernel.org,\n\tVenkat Gopalakrishnan <venkatg@codeaurora.org>,\n\tRitesh Harjani <riteshh@codeaurora.org>, devicetree@vger.kernel.org", "Subject": "[PATCH v2 2/2] mmc: sdhci-msm: Enable delay circuit calibration\n\tclocks", "Date": "Fri, 15 Sep 2017 16:35:24 -0700", "Message-Id": "<20170915233524.1375-3-bjorn.andersson@linaro.org>", "X-Mailer": "git-send-email 2.12.0", "In-Reply-To": "<20170915233524.1375-1-bjorn.andersson@linaro.org>", "References": "<20170915233524.1375-1-bjorn.andersson@linaro.org>", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "The delay circuit used to support HS400 is calibrated based on two\nadditional clocks. When these clocks are not available and\nFF_CLK_SW_RST_DIS is not set in CORE_HC_MODE, reset might fail. But on\nsome platforms this doesn't work properly and below dump can be seen in\nthe kernel log.\n\n mmc0: Reset 0x1 never completed.\n mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========\n mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00001102\n mmc0: sdhci: Blk size: 0x00004000 | Blk cnt: 0x00000000\n mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000\n mmc0: sdhci: Present: 0x01f80000 | Host ctl: 0x00000000\n mmc0: sdhci: Power: 0x00000000 | Blk gap: 0x00000000\n mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x00000002\n mmc0: sdhci: Timeout: 0x00000000 | Int stat: 0x00000000\n mmc0: sdhci: Int enab: 0x00000000 | Sig enab: 0x00000000\n mmc0: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000\n mmc0: sdhci: Caps: 0x742dc8b2 | Caps_1: 0x00008007\n mmc0: sdhci: Cmd: 0x00000000 | Max curr: 0x00000000\n mmc0: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000\n mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000\n mmc0: sdhci: Host ctl2: 0x00000000\n mmc0: sdhci: ============================================\n\nAdd support for the additional calibration clocks to allow these\nplatforms to be configured appropriately.\n\nCc: Venkat Gopalakrishnan <venkatg@codeaurora.org>\nCc: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>\n---\n\nChanges since v1:\n- Add new clocks to DT binding\n\n Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 2 ++\n drivers/mmc/host/sdhci-msm.c | 12 +++++++++++-\n 2 files changed, 13 insertions(+), 1 deletion(-)", "diff": "diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt\nindex 0576264eab5e..5d9c3cd1bdaa 100644\n--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt\n+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt\n@@ -18,6 +18,8 @@ Required properties:\n \t\"core\"\t- SDC MMC clock (MCLK) (required)\n \t\"bus\"\t- SDCC bus voter clock (optional)\n \t\"xo\"\t- TCXO clock (optional)\n+\t\"cal\"\t- reference clock for RCLK delay calibration (optional)\n+\t\"sleep\"\t- sleep clock for RCLK delay calibration (optional)\n \n Example:\n \ndiff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c\nindex b9ca1b1ef9a8..ea330e8169dc 100644\n--- a/drivers/mmc/host/sdhci-msm.c\n+++ b/drivers/mmc/host/sdhci-msm.c\n@@ -129,7 +129,7 @@ struct sdhci_msm_host {\n \tint pwr_irq;\t\t/* power irq */\n \tstruct clk *bus_clk;\t/* SDHC bus voter clock */\n \tstruct clk *xo_clk;\t/* TCXO clk needed for FLL feature of cm_dll*/\n-\tstruct clk_bulk_data bulk_clks[2]; /* core, iface clocks */\n+\tstruct clk_bulk_data bulk_clks[4]; /* core, iface, cal, sleep clocks */\n \tunsigned long clk_rate;\n \tstruct mmc_host *mmc;\n \tbool use_14lpp_dll_reset;\n@@ -1183,6 +1183,16 @@ static int sdhci_msm_probe(struct platform_device *pdev)\n \tif (ret)\n \t\tdev_warn(&pdev->dev, \"core clock boost failed\\n\");\n \n+\tclk = devm_clk_get(&pdev->dev, \"cal\");\n+\tif (IS_ERR(clk))\n+\t\tclk = NULL;\n+\tmsm_host->bulk_clks[2].clk = clk;\n+\n+\tclk = devm_clk_get(&pdev->dev, \"sleep\");\n+\tif (IS_ERR(clk))\n+\t\tclk = NULL;\n+\tmsm_host->bulk_clks[3].clk = clk;\n+\n \tret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),\n \t\t\t\t msm_host->bulk_clks);\n \tif (ret)\n", "prefixes": [ "v2", "2/2" ] }