[{"id":1772222,"web_url":"http://patchwork.ozlabs.org/comment/1772222/","msgid":"<20170920133051.pqmae3ggomr5bm5k@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-20T20:52:38","subject":"Re: [PATCH v2 2/2] mmc: sdhci-msm: Enable delay circuit calibration\n\tclocks","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Sep 15, 2017 at 04:35:24PM -0700, Bjorn Andersson wrote:\n> The delay circuit used to support HS400 is calibrated based on two\n> additional clocks. When these clocks are not available and\n> FF_CLK_SW_RST_DIS is not set in CORE_HC_MODE, reset might fail. But on\n> some platforms this doesn't work properly and below dump can be seen in\n> the kernel log.\n> \n> mmc0: Reset 0x1 never completed.\n> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========\n> mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00001102\n> mmc0: sdhci: Blk size: 0x00004000 | Blk cnt: 0x00000000\n> mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000\n> mmc0: sdhci: Present: 0x01f80000 | Host ctl: 0x00000000\n> mmc0: sdhci: Power: 0x00000000 | Blk gap: 0x00000000\n> mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x00000002\n> mmc0: sdhci: Timeout: 0x00000000 | Int stat: 0x00000000\n> mmc0: sdhci: Int enab: 0x00000000 | Sig enab: 0x00000000\n> mmc0: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000\n> mmc0: sdhci: Caps: 0x742dc8b2 | Caps_1: 0x00008007\n> mmc0: sdhci: Cmd: 0x00000000 | Max curr: 0x00000000\n> mmc0: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000\n> mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000\n> mmc0: sdhci: Host ctl2: 0x00000000\n> mmc0: sdhci: ============================================\n> \n> Add support for the additional calibration clocks to allow these\n> platforms to be configured appropriately.\n> \n> Cc: Venkat Gopalakrishnan \n> Cc: Ritesh Harjani \n> Signed-off-by: Bjorn Andersson \n> ---\n> \n> Changes since v1:\n> - Add new clocks to DT binding\n> \n> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 2 ++\n\nAcked-by: Rob Herring \n\n> drivers/mmc/host/sdhci-msm.c | 12 +++++++++++-\n> 2 files changed, 13 insertions(+), 1 deletion(-)\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyBx14kW7z9sBZ\n\tfor ;\n\tThu, 21 Sep 2017 07:01:09 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751915AbdITVAZ (ORCPT\n\t);\n\tWed, 20 Sep 2017 17:00:25 -0400","from mail-pg0-f65.google.com ([74.125.83.65]:33362 \"EHLO\n\tmail-pg0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751636AbdITUwl (ORCPT\n\t); Wed, 20 Sep 2017 16:52:41 -0400","by mail-pg0-f65.google.com with SMTP id i130so2253907pgc.0;\n\tWed, 20 Sep 2017 13:52:40 -0700 (PDT)","from localhost ([2620:0:1000:fd28:e83d:5428:912b:b325])\n\tby smtp.gmail.com with ESMTPSA id\n\tt125sm9447078pgc.50.2017.09.20.13.52.39\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 20 Sep 2017 13:52:39 -0700 (PDT)"],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=qtT0zFAhvkdUTytZwC/NkJV/EEUHwtrRZCk/zAnW1jo=;\n\tb=VB2Ugcn0hLkiw0qt1AZqILd6bp1zIYJyomjHBrqFoqWXHQYihuXfcEvw4x2B6tog/O\n\tVO+1jJBDYb01crHqVelAC6/vweaBs/aIho0yL4TbIlpiQkxgoUUKgm5TluClnOqyCmbu\n\t0v0Om1QqnXHiaa4uqBAOBo+tXUeM/zQ7jf6LG2tZeWRZmAvwn0OjrdIihF7PxB1WEA6N\n\t8o2MPxzyrdzTIGoqwxcnvM4sEpT5KVu8niVk9ogz8+y6nbicPTD7DLfqzQAOkjVVcQbI\n\tl7LzB81tIF1pojwXnumYIA5OSHROO+nVHHLMf+RydfXlSCnxlQfaj/7OnhJv1QqcWGXY\n\t9gtw==","X-Gm-Message-State":"AHPjjUjJRv+3OdqlaK7q1WJicseFNbKcJbDBXyhg8rVkXH6C5wdzNTjm\n\tyJlFkdEqkzmgQglKLVEPoQ==","X-Google-Smtp-Source":"AOwi7QBtheTqzikCgdx3wWfLP4zQl5hv9Sus7U+BNu8GtNIj2EqXtl8oclFvTCOmWOKRyqFgNfdpew==","X-Received":"by 10.101.78.7 with SMTP id r7mr3507736pgt.64.1505940760331;\n\tWed, 20 Sep 2017 13:52:40 -0700 (PDT)","Date":"Wed, 20 Sep 2017 15:52:38 -0500","From":"Rob Herring ","To":"Bjorn Andersson ","Cc":"Adrian Hunter ,\n\tUlf Hansson ,\n\tMark Rutland , linux-mmc@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n\tVenkat Gopalakrishnan ,\n\tRitesh Harjani , devicetree@vger.kernel.org","Subject":"Re: [PATCH v2 2/2] mmc: sdhci-msm: Enable delay circuit calibration\n\tclocks","Message-ID":"<20170920133051.pqmae3ggomr5bm5k@rob-hp-laptop>","References":"<20170915233524.1375-1-bjorn.andersson@linaro.org>\n\t<20170915233524.1375-3-bjorn.andersson@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170915233524.1375-3-bjorn.andersson@linaro.org>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]