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GET /api/patches/814110/?format=api
{ "id": 814110, "url": "http://patchwork.ozlabs.org/api/patches/814110/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/patch/1505460876-7303-5-git-send-email-akshay.adiga@linux.vnet.ibm.com/", "project": { "id": 44, "url": "http://patchwork.ozlabs.org/api/projects/44/?format=api", "name": "skiboot firmware development", "link_name": "skiboot", "list_id": "skiboot.lists.ozlabs.org", "list_email": "skiboot@lists.ozlabs.org", "web_url": "http://github.com/open-power/skiboot", "scm_url": "http://github.com/open-power/skiboot", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505460876-7303-5-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "list_archive_url": null, "date": "2017-09-15T07:34:32", "name": "[v4,4/8] SLW: Add opal_slw_set_reg support for power9", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "fdc152459151f094448f83812672a8a35d41f43a", "submitter": { "id": 68766, "url": "http://patchwork.ozlabs.org/api/people/68766/?format=api", "name": "Akshay Adiga", "email": "akshay.adiga@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/skiboot/patch/1505460876-7303-5-git-send-email-akshay.adiga@linux.vnet.ibm.com/mbox/", "series": [ { "id": 3238, "url": "http://patchwork.ozlabs.org/api/series/3238/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/list/?series=3238", "date": "2017-09-15T07:34:28", "name": "Enable stop4 idle state", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/3238/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814110/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814110/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtnJM1VLvz9sPs\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 17:36:03 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xtnJM0Wl0zDrpS\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 17:36:03 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com\n\t[148.163.158.5])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xtnHP33R5zDrZv\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 17:35:13 +1000 (AEST)", "from pps.filterd (m0098413.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8F7YHEP069216\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 03:35:10 -0400", "from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2d03241wyw-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 03:35:09 -0400", "from localhost\n\tby e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <skiboot@lists.ozlabs.org> from <akshay.adiga@linux.vnet.ibm.com>;\n\tFri, 15 Sep 2017 17:35:05 +1000", "from d23relay10.au.ibm.com (202.81.31.229)\n\tby e23smtp03.au.ibm.com (202.81.31.209) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tFri, 15 Sep 2017 17:35:04 +1000", "from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97])\n\tby d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n\tv8F7Z4Y339321842\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 17:35:04 +1000", "from d23av03.au.ibm.com (localhost [127.0.0.1])\n\tby d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id\n\tv8F7Yu9b027150\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 17:34:56 +1000", "from aksadiga.ibm ([9.79.223.131])\n\tby d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id\n\tv8F7YZ5H026751; Fri, 15 Sep 2017 17:34:52 +1000" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=akshay.adiga@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>", "To": "skiboot@lists.ozlabs.org", "Date": "Fri, 15 Sep 2017 13:04:32 +0530", "X-Mailer": "git-send-email 2.5.5", "In-Reply-To": "<1505460876-7303-1-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "References": "<1505460876-7303-1-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "X-TM-AS-MML": "disable", "x-cbid": "17091507-0008-0000-0000-000001580A89", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17091507-0009-0000-0000-0000098D11C3", "Message-Id": "<1505460876-7303-5-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-15_02:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709150113", "Subject": "[Skiboot] [PATCH v4 4/8] SLW: Add opal_slw_set_reg support for\n\tpower9", "X-BeenThere": "skiboot@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Mailing list for skiboot development <skiboot.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/skiboot>,\n\t<mailto:skiboot-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/skiboot/>", "List-Post": "<mailto:skiboot@lists.ozlabs.org>", "List-Help": "<mailto:skiboot-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/skiboot>,\n\t<mailto:skiboot-request@lists.ozlabs.org?subject=subscribe>", "Cc": "ego@linux.vnet.ibm.com, shriyak@linux.vnet.ibm.com", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Skiboot\"\n\t<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "This OPAL call is made from Linux to OPAL to configure values in\nvarious SPRs after wakeup from a deep idle state.\n\nSigned-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>\n---\n hw/slw.c | 60 ++++++++++++++++++++++++++++++++++++++++--------------------\n 1 file changed, 40 insertions(+), 20 deletions(-)", "diff": "diff --git a/hw/slw.c b/hw/slw.c\nindex d8829a6..a1ed7ba 100644\n--- a/hw/slw.c\n+++ b/hw/slw.c\n@@ -30,6 +30,7 @@\n #include <libfdt/libfdt.h>\n #include <opal-api.h>\n \n+#include <p9_stop_api.H>\n #include <p8_pore_table_gen_api.H>\n #include <sbe_xip_image.h>\n \n@@ -1402,41 +1403,60 @@ int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val)\n \n \tstruct cpu_thread *c = find_cpu_by_pir(cpu_pir);\n \tstruct proc_chip *chip;\n-\tvoid *image;\n \tint rc;\n-\tint i;\n-\tint spr_is_supported = 0;\n \n \tassert(c);\n \tchip = get_chip(c->chip_id);\n \tassert(chip);\n-\timage = (void *) chip->slw_base;\n \n-\t/* Check of the SPR is supported by libpore */\n-\tfor ( i=0; i < SLW_SPR_REGS_SIZE ; i++) {\n-\t\tif (sprn == SLW_SPR_REGS[i].value) {\n-\t\t\tspr_is_supported = 1;\n-\t\t\tbreak;\n+\tif (proc_gen == proc_gen_p9) {\n+\t\tif (!chip->homer_base) {\n+\t\t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n+\t\t\t\t\t \"SLW: HOMER base not set %x\\n\",\n+\t\t\t\t\t chip->id);\n+\t\t\treturn OPAL_INTERNAL_ERROR;\n \t\t}\n-\t}\n-\tif (!spr_is_supported) {\n-\t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n+\t\trc = p9_stop_save_cpureg((void *)chip->homer_base,\n+\t\t\t\t\t sprn, val, cpu_pir);\n+\n+\t} else if (proc_gen == proc_gen_p8) {\n+\t\tint spr_is_supported = 0;\n+\t\tvoid *image;\n+\t\tint i;\n+\n+\t\t/* Check of the SPR is supported by libpore */\n+\t\tfor (i = 0; i < SLW_SPR_REGS_SIZE ; i++) {\n+\t\t\tif (sprn == SLW_SPR_REGS[i].value) {\n+\t\t\t\tspr_is_supported = 1;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t\tif (!spr_is_supported) {\n+\t\t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n \t\t\t\"SLW: Trying to set unsupported spr for CPU %x\\n\",\n-\t\t\tc->pir);\n+\t\t\t\tc->pir);\n+\t\t\treturn OPAL_UNSUPPORTED;\n+\t\t}\n+\t\timage = (void *)chip->slw_base;\n+\t\trc = p8_pore_gen_cpureg_fixed(image, P8_SLW_MODEBUILD_SRAM,\n+\t\t\t\t\t sprn, val,\n+\t\t\t\t\t cpu_get_core_index(c),\n+\t\t\t\t\t cpu_get_thread_index(c));\n+\t} else {\n+\t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n+\t\t\"SLW: proc_gen not supported\\n\");\n \t\treturn OPAL_UNSUPPORTED;\n-\t}\n \n-\trc = p8_pore_gen_cpureg_fixed(image, P8_SLW_MODEBUILD_SRAM, sprn,\n-\t\t\t\t\t\tval, cpu_get_core_index(c),\n-\t\t\t\t\t\tcpu_get_thread_index(c));\n+\t}\n \n \tif (rc) {\n \t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n-\t\t\t\"SLW: Failed to set spr for CPU %x\\n\",\n-\t\t\tc->pir);\n+\t\t\t\"SLW: Failed to set spr %llx for CPU %x, RC=0x%x\\n\",\n+\t\t\tsprn, c->pir, rc);\n \t\treturn OPAL_INTERNAL_ERROR;\n \t}\n-\n+\tprlog(PR_DEBUG, \"SLW: restore spr:0x%llx on c:0x%x with 0x%llx\\n\",\n+\t sprn, c->pir, val);\n \treturn OPAL_SUCCESS;\n \n }\n", "prefixes": [ "v4", "4/8" ] }