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GET /api/patches/812877/?format=api
{ "id": 812877, "url": "http://patchwork.ozlabs.org/api/patches/812877/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/1505227262.14827.155.camel@brimstone.rchland.ibm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505227262.14827.155.camel@brimstone.rchland.ibm.com>", "list_archive_url": null, "date": "2017-09-12T14:41:02", "name": "[rs6000] Folding of vector loads in GIMPLE", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "abf63428c4fddf3cba7b091cdb2b361797ab7b44", "submitter": { "id": 3241, "url": "http://patchwork.ozlabs.org/api/people/3241/?format=api", "name": "will schmidt", "email": "will_schmidt@vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/1505227262.14827.155.camel@brimstone.rchland.ibm.com/mbox/", "series": [ { "id": 2719, "url": "http://patchwork.ozlabs.org/api/series/2719/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=2719", "date": "2017-09-12T14:41:02", "name": "[rs6000] Folding of vector loads in GIMPLE", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2719/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812877/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812877/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-return-461935-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461935-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"GrXXMi/8\"; dkim-atps=neutral", "sourceware.org; auth=none" ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xs6v86PJSz9s3T\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 00:41:56 +1000 (AEST)", "(qmail 128788 invoked by alias); 12 Sep 2017 14:41:48 -0000", "(qmail 128774 invoked by uid 89); 12 Sep 2017 14:41:47 -0000", "from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 12 Sep 2017 14:41:45 +0000", "from pps.filterd (m0098399.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8CEfUwa104947\tfor <gcc-patches@gcc.gnu.org>;\n\tTue, 12 Sep 2017 10:41:44 -0400", "from e34.co.us.ibm.com (e34.co.us.ibm.com [32.97.110.152])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cxe6fbumr-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor <gcc-patches@gcc.gnu.org>;\n\tTue, 12 Sep 2017 10:41:42 -0400", "from localhost\tby e34.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted\tfor\n\t<gcc-patches@gcc.gnu.org> from <will_schmidt@vnet.ibm.com>;\n\tTue, 12 Sep 2017 08:41:06 -0600", "from b03cxnp07029.gho.boulder.ibm.com (9.17.130.16)\tby\n\te34.co.us.ibm.com (192.168.1.134) with IBM ESMTP SMTP\n\tGateway: Authorized Use Only! Violators will be prosecuted;\n\tTue, 12 Sep 2017 08:41:03 -0600", "from b03ledav006.gho.boulder.ibm.com\n\t(b03ledav006.gho.boulder.ibm.com [9.17.130.237])\tby\n\tb03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0)\n\twith ESMTP id v8CEf3dm10027292; Tue, 12 Sep 2017 07:41:03 -0700", "from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1])\tby\n\tIMSVA (Postfix) with ESMTP id EFD80C6042;\n\tTue, 12 Sep 2017 08:41:02 -0600 (MDT)", "from [9.10.86.107] (unknown [9.10.86.107])\tby\n\tb03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP id\n\t8EA17C604A; Tue, 12 Sep 2017 08:41:02 -0600 (MDT)" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:subject:from:reply-to:to:cc:content-type:date:mime-version\n\t:content-transfer-encoding:message-id; q=dns; s=default; b=IJkwa\n\th3h19avCxLFyEMsM7uo9Pm2qKVM+az3/z4uFFpm64nPe2uZDOsI6iAVfnRIuMslH\n\tBaFdxzpW/7icxNvas3noHT4QBeanJR3obz9JNevutNqZsjVnJ+zGt5Xwy2+oTu+J\n\t71tGVbH5TL5noNGxEDFMfSCgxwjDRIkvzhUBOM=", "DKIM-Signature": "v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:subject:from:reply-to:to:cc:content-type:date:mime-version\n\t:content-transfer-encoding:message-id; s=default; bh=gzwS5rrKolG\n\tvz/RnXIN4DNLZJY0=; b=GrXXMi/8UJt0/ERF0e21AIaEVgKPRg2Pca6vxuuVVP4\n\t4Pim7brxjevqXVUrEXq36tie6ywGBwUvcjOoXNElTJbhZk1/DTaVbeUxoObXaPxQ\n\t2nQR2L86zcifJhF6+snVUhQOA7ZD7s9KE41IYoTOg/XqkL54DUyzCHIg3AUruFpE\n\t=", "Mailing-List": "contact gcc-patches-help@gcc.gnu.org; run by ezmlm", "Precedence": "bulk", "List-Id": "<gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "List-Archive": "<http://gcc.gnu.org/ml/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-help@gcc.gnu.org>", "Sender": "gcc-patches-owner@gcc.gnu.org", "X-Virus-Found": "No", "X-Spam-SWARE-Status": "No, score=-26.5 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3,\n\tRCVD_IN_DNSWL_LOW,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=H*MI:155", "X-HELO": "mx0a-001b2d01.pphosted.com", "Subject": "[PATCH, rs6000] Folding of vector loads in GIMPLE", "From": "Will Schmidt <will_schmidt@vnet.ibm.com>", "Reply-To": "will_schmidt@vnet.ibm.com", "To": "GCC Patches <gcc-patches@gcc.gnu.org>", "Cc": "Segher Boessenkool <segher@kernel.crashing.org>,\n\tRichard Biener <richard.guenther@gmail.com>,\n\tBill Schmidt <wschmidt@linux.vnet.ibm.com>,\n\tDavid Edelsohn <dje.gcc@gmail.com>", "Content-Type": "text/plain; charset=\"UTF-8\"", "Date": "Tue, 12 Sep 2017 09:41:02 -0500", "Mime-Version": "1.0", "Content-Transfer-Encoding": "7bit", "X-TM-AS-GCONF": "00", "x-cbid": "17091214-0016-0000-0000-000007814D9C", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007711; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000227; SDB=6.00915977; UDB=6.00459924;\n\tIPR=6.00696208; BA=6.00005587; NDR=6.00000001; ZLA=6.00000005;\n\tZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000;\n\tZU=6.00000002; MB=3.00017126; XFM=3.00000015;\n\tUTC=2017-09-12 14:41:05", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17091214-0017-0000-0000-00003B705432", "Message-Id": "<1505227262.14827.155.camel@brimstone.rchland.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-12_04:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0 malwarescore=0 phishscore=0\n\tadultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx\n\tscancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709120205", "X-IsSubscribed": "yes" }, "content": "Hi\n\n[PATCH, rs6000] Folding of vector loads in GIMPLE\n\nFolding of vector loads in GIMPLE.\n \n- Add code to handle gimple folding for the vec_ld builtins.\n- Remove the now obsoleted folding code for vec_ld from rs6000-c.c. Surrounding\ncomments have been adjusted slightly so they continue to read OK for the\nvec_st code that remains.\n \nThe resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\ntests which have been posted separately. (a few minutes ago).\n \nRegtest successfully completed on power6 and newer. (p6,p7,p8le,p8be,p9).\n\nOK for trunk?\n\nThanks,\n-Will\n \n[gcc]\n \n 2017-09-12 Will Schmidt <will_schmidt@vnet.ibm.com>\n \n\t* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n\t for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n\t* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n\t Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.", "diff": "diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\nindex 897306c..73e14d9 100644\n--- a/gcc/config/rs6000/rs6000-c.c\n+++ b/gcc/config/rs6000/rs6000-c.c\n@@ -6459,92 +6459,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n \t\t convert (TREE_TYPE (stmt), arg0));\n stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n return stmt;\n }\n \n- /* Expand vec_ld into an expression that masks the address and\n- performs the load. We need to expand this early to allow\n+ /* Expand vec_st into an expression that masks the address and\n+ performs the store. We need to expand this early to allow\n the best aliasing, as by the time we get into RTL we no longer\n are able to honor __restrict__, for example. We may want to\n consider this for all memory access built-ins.\n \n When -maltivec=be is specified, or the wrong number of arguments\n is provided, simply punt to existing built-in processing. */\n- if (fcode == ALTIVEC_BUILTIN_VEC_LD\n- && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n- && nargs == 2)\n- {\n- tree arg0 = (*arglist)[0];\n- tree arg1 = (*arglist)[1];\n-\n- /* Strip qualifiers like \"const\" from the pointer arg. */\n- tree arg1_type = TREE_TYPE (arg1);\n- if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n-\tgoto bad;\n-\n- tree inner_type = TREE_TYPE (arg1_type);\n- if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n-\t{\n-\t arg1_type = build_pointer_type (build_qualified_type (inner_type,\n-\t\t\t\t\t\t\t\t0));\n-\t arg1 = fold_convert (arg1_type, arg1);\n-\t}\n-\n- /* Construct the masked address. Let existing error handling take\n-\t over if we don't have a constant offset. */\n- arg0 = fold (arg0);\n-\n- if (TREE_CODE (arg0) == INTEGER_CST)\n-\t{\n-\t if (!ptrofftype_p (TREE_TYPE (arg0)))\n-\t arg0 = build1 (NOP_EXPR, sizetype, arg0);\n-\n-\t tree arg1_type = TREE_TYPE (arg1);\n-\t if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n-\t {\n-\t arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n-\t tree const0 = build_int_cstu (sizetype, 0);\n-\t tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n-\t arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n-\t }\n-\n-\t tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n-\t\t\t\t arg1, arg0);\n-\t tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n-\t\t\t\t\t build_int_cst (arg1_type, -16));\n-\n-\t /* Find the built-in to get the return type so we can convert\n-\t the result properly (or fall back to default handling if the\n-\t arguments aren't compatible). */\n-\t for (desc = altivec_overloaded_builtins;\n-\t desc->code && desc->code != fcode; desc++)\n-\t continue;\n-\n-\t for (; desc->code == fcode; desc++)\n-\t if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n-\t\t&& (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n-\t\t\t\t\t\t desc->op2)))\n-\t {\n-\t\ttree ret_type = rs6000_builtin_type (desc->ret_type);\n-\t\tif (TYPE_MODE (ret_type) == V2DImode)\n-\t\t /* Type-based aliasing analysis thinks vector long\n-\t\t and vector long long are different and will put them\n-\t\t in distinct alias classes. Force our return type\n-\t\t to be a may-alias type to avoid this. */\n-\t\t ret_type\n-\t\t = build_pointer_type_for_mode (ret_type, Pmode,\n-\t\t\t\t\t\t true/*can_alias_all*/);\n-\t\telse\n-\t\t ret_type = build_pointer_type (ret_type);\n-\t\taligned = build1 (NOP_EXPR, ret_type, aligned);\n-\t\ttree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n-\t\treturn ret_val;\n-\t }\n-\t}\n- }\n \n- /* Similarly for stvx. */\n if (fcode == ALTIVEC_BUILTIN_VEC_ST\n && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n && nargs == 3)\n {\n tree arg0 = (*arglist)[0];\ndiff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\nindex cf744d8..5b14789 100644\n--- a/gcc/config/rs6000/rs6000.c\n+++ b/gcc/config/rs6000/rs6000.c\n@@ -16473,10 +16473,65 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n \tres = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n \tgsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n \tupdate_call_from_tree (gsi, res);\n \treturn true;\n }\n+ /* Vector loads. */\n+ case ALTIVEC_BUILTIN_LVX_V16QI:\n+ case ALTIVEC_BUILTIN_LVX_V8HI:\n+ case ALTIVEC_BUILTIN_LVX_V4SI:\n+ case ALTIVEC_BUILTIN_LVX_V4SF:\n+ case ALTIVEC_BUILTIN_LVX_V2DI:\n+ case ALTIVEC_BUILTIN_LVX_V2DF:\n+ {\n+\t gimple *g;\n+\t arg0 = gimple_call_arg (stmt, 0); // offset\n+\t arg1 = gimple_call_arg (stmt, 1); // address\n+\n+\t /* Limit folding of loads to LE targets. */\n+\t if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n+\t return false;\n+\n+\t lhs = gimple_call_lhs (stmt);\n+\t location_t loc = gimple_location (stmt);\n+\n+\t tree arg1_type = TREE_TYPE (arg1);\n+\t tree lhs_type = TREE_TYPE (lhs);\n+\n+\t /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n+\t the tree using the value from arg0. The resulting type will match\n+\t the type of arg1. */\n+\t tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n+\t g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n+\t gimple_set_location (g, loc);\n+\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n+\t tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n+\t g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n+\t\t\t\t temp_offset);\n+\t gimple_set_location (g, loc);\n+\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n+\n+\t /* Mask off any lower bits from the address. */\n+\t tree alignment_mask = build_int_cst (arg1_type, -16);\n+\t tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n+\t g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n+\t\t\t\t temp_addr, alignment_mask);\n+\t gimple_set_location (g, loc);\n+\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n+\n+\t /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n+\t take an offset, but since we've already incorporated the offset\n+\t above, here we just pass in a zero. */\n+\t g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n+\t\t\t\t\t\tbuild_int_cst (arg1_type, 0)));\n+\t gimple_set_location (g, loc);\n+\t gsi_replace (gsi, g, true);\n+\n+\t return true;\n+\n+ }\n+\n default:\n \tif (TARGET_DEBUG_BUILTIN)\n \t fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n \t\t fn_code, fn_name1, fn_name2);\n break;\n", "prefixes": [ "rs6000" ] }