[{"id":1767162,"web_url":"http://patchwork.ozlabs.org/comment/1767162/","msgid":"<239ABD63-BB1B-418F-98E8-C92A195F613A@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-12T15:22:37","subject":"Re: [PATCH, rs6000] Folding of vector loads in GIMPLE","submitter":{"id":6459,"url":"http://patchwork.ozlabs.org/api/people/6459/","name":"Bill Schmidt","email":"wschmidt@linux.vnet.ibm.com"},"content":"> On Sep 12, 2017, at 9:41 AM, Will Schmidt wrote:\n> \n> Hi\n> \n> [PATCH, rs6000] Folding of vector loads in GIMPLE\n> \n> Folding of vector loads in GIMPLE.\n> \n> - Add code to handle gimple folding for the vec_ld builtins.\n> - Remove the now obsoleted folding code for vec_ld from rs6000-c.c. Surrounding\n> comments have been adjusted slightly so they continue to read OK for the\n> vec_st code that remains.\n> \n> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n> tests which have been posted separately. (a few minutes ago).\n> \n> Regtest successfully completed on power6 and newer. (p6,p7,p8le,p8be,p9).\n> \n> OK for trunk?\n> \n> Thanks,\n> -Will\n> \n> [gcc]\n> \n> 2017-09-12 Will Schmidt \n> \n> \t* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n> \t for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n> \t* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n> \t Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n> \n> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n> index 897306c..73e14d9 100644\n> --- a/gcc/config/rs6000/rs6000-c.c\n> +++ b/gcc/config/rs6000/rs6000-c.c\n> @@ -6459,92 +6459,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n> \t\t convert (TREE_TYPE (stmt), arg0));\n> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n> return stmt;\n> }\n> \n> - /* Expand vec_ld into an expression that masks the address and\n> - performs the load. We need to expand this early to allow\n> + /* Expand vec_st into an expression that masks the address and\n> + performs the store. We need to expand this early to allow\n> the best aliasing, as by the time we get into RTL we no longer\n> are able to honor __restrict__, for example. We may want to\n> consider this for all memory access built-ins.\n> \n> When -maltivec=be is specified, or the wrong number of arguments\n> is provided, simply punt to existing built-in processing. */\n> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> - && nargs == 2)\n> - {\n> - tree arg0 = (*arglist)[0];\n> - tree arg1 = (*arglist)[1];\n> -\n> - /* Strip qualifiers like \"const\" from the pointer arg. */\n> - tree arg1_type = TREE_TYPE (arg1);\n> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n> -\tgoto bad;\n> -\n> - tree inner_type = TREE_TYPE (arg1_type);\n> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n> -\t{\n> -\t arg1_type = build_pointer_type (build_qualified_type (inner_type,\n> -\t\t\t\t\t\t\t\t0));\n> -\t arg1 = fold_convert (arg1_type, arg1);\n> -\t}\n> -\n> - /* Construct the masked address. Let existing error handling take\n> -\t over if we don't have a constant offset. */\n> - arg0 = fold (arg0);\n> -\n> - if (TREE_CODE (arg0) == INTEGER_CST)\n> -\t{\n> -\t if (!ptrofftype_p (TREE_TYPE (arg0)))\n> -\t arg0 = build1 (NOP_EXPR, sizetype, arg0);\n> -\n> -\t tree arg1_type = TREE_TYPE (arg1);\n> -\t if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n> -\t {\n> -\t arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n> -\t tree const0 = build_int_cstu (sizetype, 0);\n> -\t tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n> -\t arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n> -\t }\n> -\n> -\t tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n> -\t\t\t\t arg1, arg0);\n> -\t tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n> -\t\t\t\t\t build_int_cst (arg1_type, -16));\n> -\n> -\t /* Find the built-in to get the return type so we can convert\n> -\t the result properly (or fall back to default handling if the\n> -\t arguments aren't compatible). */\n> -\t for (desc = altivec_overloaded_builtins;\n> -\t desc->code && desc->code != fcode; desc++)\n> -\t continue;\n> -\n> -\t for (; desc->code == fcode; desc++)\n> -\t if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n> -\t\t&& (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n> -\t\t\t\t\t\t desc->op2)))\n> -\t {\n> -\t\ttree ret_type = rs6000_builtin_type (desc->ret_type);\n> -\t\tif (TYPE_MODE (ret_type) == V2DImode)\n> -\t\t /* Type-based aliasing analysis thinks vector long\n> -\t\t and vector long long are different and will put them\n> -\t\t in distinct alias classes. Force our return type\n> -\t\t to be a may-alias type to avoid this. */\n> -\t\t ret_type\n> -\t\t = build_pointer_type_for_mode (ret_type, Pmode,\n> -\t\t\t\t\t\t true/*can_alias_all*/);\n> -\t\telse\n> -\t\t ret_type = build_pointer_type (ret_type);\n> -\t\taligned = build1 (NOP_EXPR, ret_type, aligned);\n> -\t\ttree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n> -\t\treturn ret_val;\n> -\t }\n> -\t}\n> - }\n> \n> - /* Similarly for stvx. */\n> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> && nargs == 3)\n> {\n> tree arg0 = (*arglist)[0];\n> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n> index cf744d8..5b14789 100644\n> --- a/gcc/config/rs6000/rs6000.c\n> +++ b/gcc/config/rs6000/rs6000.c\n> @@ -16473,10 +16473,65 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n> \tres = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n> \tgsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> \tupdate_call_from_tree (gsi, res);\n> \treturn true;\n> }\n> + /* Vector loads. */\n> + case ALTIVEC_BUILTIN_LVX_V16QI:\n> + case ALTIVEC_BUILTIN_LVX_V8HI:\n> + case ALTIVEC_BUILTIN_LVX_V4SI:\n> + case ALTIVEC_BUILTIN_LVX_V4SF:\n> + case ALTIVEC_BUILTIN_LVX_V2DI:\n> + case ALTIVEC_BUILTIN_LVX_V2DF:\n> + {\n> +\t gimple *g;\n> +\t arg0 = gimple_call_arg (stmt, 0); // offset\n> +\t arg1 = gimple_call_arg (stmt, 1); // address\n> +\n> +\t /* Limit folding of loads to LE targets. */\n> +\t if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n> +\t return false;\n\nWhy? This transformation shouldn't be endian-dependent.\n\nThanks,\nBill\n\n> +\n> +\t lhs = gimple_call_lhs (stmt);\n> +\t location_t loc = gimple_location (stmt);\n> +\n> +\t tree arg1_type = TREE_TYPE (arg1);\n> +\t tree lhs_type = TREE_TYPE (lhs);\n> +\n> +\t /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n> +\t the tree using the value from arg0. The resulting type will match\n> +\t the type of arg1. */\n> +\t tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n> +\t g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n> +\t gimple_set_location (g, loc);\n> +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\t tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> +\t g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n> +\t\t\t\t temp_offset);\n> +\t gimple_set_location (g, loc);\n> +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\n> +\t /* Mask off any lower bits from the address. */\n> +\t tree alignment_mask = build_int_cst (arg1_type, -16);\n> +\t tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> +\t g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n> +\t\t\t\t temp_addr, alignment_mask);\n> +\t gimple_set_location (g, loc);\n> +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\n> +\t /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n> +\t take an offset, but since we've already incorporated the offset\n> +\t above, here we just pass in a zero. */\n> +\t g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n> +\t\t\t\t\t\tbuild_int_cst (arg1_type, 0)));\n> +\t gimple_set_location (g, loc);\n> +\t gsi_replace (gsi, g, true);\n> +\n> +\t return true;\n> +\n> + }\n> +\n> default:\n> \tif (TARGET_DEBUG_BUILTIN)\n> \t fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n> \t\t fn_code, fn_name1, fn_name2);\n> break;\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461947-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"nNAiTjJ9\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xs7pS1qJFz9s7f\n\tfor ;\n\tWed, 13 Sep 2017 01:22:56 +1000 (AEST)","(qmail 85980 invoked by alias); 12 Sep 2017 15:22:46 -0000","(qmail 85341 invoked by uid 89); 12 Sep 2017 15:22:45 -0000","from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.158.5) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 12 Sep 2017 15:22:43 +0000","from pps.filterd (m0098416.ppops.net [127.0.0.1])\tby\n\tmx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8CFJS29167185\tfor ;\n\tTue, 12 Sep 2017 11:22:42 -0400","from e35.co.us.ibm.com (e35.co.us.ibm.com [32.97.110.153])\tby\n\tmx0b-001b2d01.pphosted.com with ESMTP id\n\t2cxgyd4k0v-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tTue, 12 Sep 2017 11:22:41 -0400","from localhost\tby e35.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n> > comments have been adjusted slightly so they continue to read OK for the\n> > vec_st code that remains.\n> > \n> > The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n> > tests which have been posted separately. (a few minutes ago).\n> > \n> > Regtest successfully completed on power6 and newer. (p6,p7,p8le,p8be,p9).\n> > \n> > OK for trunk?\n> > \n> > Thanks,\n> > -Will\n> > \n> > [gcc]\n> > \n> > 2017-09-12 Will Schmidt \n> > \n> > \t* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n> > \t for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n> > \t* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n> > \t Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n> > \n> > diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n> > index 897306c..73e14d9 100644\n> > --- a/gcc/config/rs6000/rs6000-c.c\n> > +++ b/gcc/config/rs6000/rs6000-c.c\n> > @@ -6459,92 +6459,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n> > \t\t convert (TREE_TYPE (stmt), arg0));\n> > stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n> > return stmt;\n> > }\n> > \n> > - /* Expand vec_ld into an expression that masks the address and\n> > - performs the load. We need to expand this early to allow\n> > + /* Expand vec_st into an expression that masks the address and\n> > + performs the store. We need to expand this early to allow\n> > the best aliasing, as by the time we get into RTL we no longer\n> > are able to honor __restrict__, for example. We may want to\n> > consider this for all memory access built-ins.\n> > \n> > When -maltivec=be is specified, or the wrong number of arguments\n> > is provided, simply punt to existing built-in processing. */\n> > - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n> > - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> > - && nargs == 2)\n> > - {\n> > - tree arg0 = (*arglist)[0];\n> > - tree arg1 = (*arglist)[1];\n> > -\n> > - /* Strip qualifiers like \"const\" from the pointer arg. */\n> > - tree arg1_type = TREE_TYPE (arg1);\n> > - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n> > -\tgoto bad;\n> > -\n> > - tree inner_type = TREE_TYPE (arg1_type);\n> > - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n> > -\t{\n> > -\t arg1_type = build_pointer_type (build_qualified_type (inner_type,\n> > -\t\t\t\t\t\t\t\t0));\n> > -\t arg1 = fold_convert (arg1_type, arg1);\n> > -\t}\n> > -\n> > - /* Construct the masked address. Let existing error handling take\n> > -\t over if we don't have a constant offset. */\n> > - arg0 = fold (arg0);\n> > -\n> > - if (TREE_CODE (arg0) == INTEGER_CST)\n> > -\t{\n> > -\t if (!ptrofftype_p (TREE_TYPE (arg0)))\n> > -\t arg0 = build1 (NOP_EXPR, sizetype, arg0);\n> > -\n> > -\t tree arg1_type = TREE_TYPE (arg1);\n> > -\t if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n> > -\t {\n> > -\t arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n> > -\t tree const0 = build_int_cstu (sizetype, 0);\n> > -\t tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n> > -\t arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n> > -\t }\n> > -\n> > -\t tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n> > -\t\t\t\t arg1, arg0);\n> > -\t tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n> > -\t\t\t\t\t build_int_cst (arg1_type, -16));\n> > -\n> > -\t /* Find the built-in to get the return type so we can convert\n> > -\t the result properly (or fall back to default handling if the\n> > -\t arguments aren't compatible). */\n> > -\t for (desc = altivec_overloaded_builtins;\n> > -\t desc->code && desc->code != fcode; desc++)\n> > -\t continue;\n> > -\n> > -\t for (; desc->code == fcode; desc++)\n> > -\t if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n> > -\t\t&& (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n> > -\t\t\t\t\t\t desc->op2)))\n> > -\t {\n> > -\t\ttree ret_type = rs6000_builtin_type (desc->ret_type);\n> > -\t\tif (TYPE_MODE (ret_type) == V2DImode)\n> > -\t\t /* Type-based aliasing analysis thinks vector long\n> > -\t\t and vector long long are different and will put them\n> > -\t\t in distinct alias classes. Force our return type\n> > -\t\t to be a may-alias type to avoid this. */\n> > -\t\t ret_type\n> > -\t\t = build_pointer_type_for_mode (ret_type, Pmode,\n> > -\t\t\t\t\t\t true/*can_alias_all*/);\n> > -\t\telse\n> > -\t\t ret_type = build_pointer_type (ret_type);\n> > -\t\taligned = build1 (NOP_EXPR, ret_type, aligned);\n> > -\t\ttree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n> > -\t\treturn ret_val;\n> > -\t }\n> > -\t}\n> > - }\n> > \n> > - /* Similarly for stvx. */\n> > if (fcode == ALTIVEC_BUILTIN_VEC_ST\n> > && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> > && nargs == 3)\n> > {\n> > tree arg0 = (*arglist)[0];\n> > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n> > index cf744d8..5b14789 100644\n> > --- a/gcc/config/rs6000/rs6000.c\n> > +++ b/gcc/config/rs6000/rs6000.c\n> > @@ -16473,10 +16473,65 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n> > \tres = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n> > \tgsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> > \tupdate_call_from_tree (gsi, res);\n> > \treturn true;\n> > }\n> > + /* Vector loads. */\n> > + case ALTIVEC_BUILTIN_LVX_V16QI:\n> > + case ALTIVEC_BUILTIN_LVX_V8HI:\n> > + case ALTIVEC_BUILTIN_LVX_V4SI:\n> > + case ALTIVEC_BUILTIN_LVX_V4SF:\n> > + case ALTIVEC_BUILTIN_LVX_V2DI:\n> > + case ALTIVEC_BUILTIN_LVX_V2DF:\n> > + {\n> > +\t gimple *g;\n> > +\t arg0 = gimple_call_arg (stmt, 0); // offset\n> > +\t arg1 = gimple_call_arg (stmt, 1); // address\n> > +\n> > +\t /* Limit folding of loads to LE targets. */\n> > +\t if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n> > +\t return false;\n> \n> Why? This transformation shouldn't be endian-dependent.\n\nI was seeing errors in some of the existing tests specific to BE.\nFAIL: gcc.dg/vmx/ld-be-order.c -Os execution test\nFAIL: gcc.dg/vmx/ld-vsx-be-order.c -O0 execution test\n\nI'll give this another attempt without that exclusion and verify. I'll\nadmit it is possible the ld*be-order tests were failing for other\nreasons.\n\nThanks\n-Will\n\n> \n> Thanks,\n> Bill\n> \n> > +\n> > +\t lhs = gimple_call_lhs (stmt);\n> > +\t location_t loc = gimple_location (stmt);\n> > +\n> > +\t tree arg1_type = TREE_TYPE (arg1);\n> > +\t tree lhs_type = TREE_TYPE (lhs);\n> > +\n> > +\t /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n> > +\t the tree using the value from arg0. The resulting type will match\n> > +\t the type of arg1. */\n> > +\t tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n> > +\t g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n> > +\t gimple_set_location (g, loc);\n> > +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> > +\t tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> > +\t g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n> > +\t\t\t\t temp_offset);\n> > +\t gimple_set_location (g, loc);\n> > +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> > +\n> > +\t /* Mask off any lower bits from the address. */\n> > +\t tree alignment_mask = build_int_cst (arg1_type, -16);\n> > +\t tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> > +\t g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n> > +\t\t\t\t temp_addr, alignment_mask);\n> > +\t gimple_set_location (g, loc);\n> > +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> > +\n> > +\t /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n> > +\t take an offset, but since we've already incorporated the offset\n> > +\t above, here we just pass in a zero. */\n> > +\t g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n> > +\t\t\t\t\t\tbuild_int_cst (arg1_type, 0)));\n> > +\t gimple_set_location (g, loc);\n> > +\t gsi_replace (gsi, g, true);\n> > +\n> > +\t return true;\n> > +\n> > + }\n> > +\n> > default:\n> > \tif (TARGET_DEBUG_BUILTIN)\n> > \t fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n> > \t\t fn_code, fn_name1, fn_name2);\n> > break;\n> > \n> > \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461977-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"LiXwc+ju\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsBzG5Zzyz9s7M\n\tfor ;\n\tWed, 13 Sep 2017 03:45:45 +1000 (AEST)","(qmail 43494 invoked by alias); 12 Sep 2017 17:45:35 -0000","(qmail 43285 invoked by uid 89); 12 Sep 2017 17:45:24 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 12 Sep 2017 17:45:14 +0000","from pps.filterd (m0098399.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8CHimlt100242\tfor ;\n\tTue, 12 Sep 2017 13:45:11 -0400","from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cxkmu9spu-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tTue, 12 Sep 2017 13:45:11 -0400","from localhost\tby e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\ncomments have been adjusted slightly so they continue to read OK for the\nexisting vec_st code.\n \nThe resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\ntests which have been posted separately.\n\nFor V2 of this patch, I've removed the chunk of code that prohibited the\ngimple fold from occurring in BE environments. This had fixed an issue\nfor me earlier during my development of the code, and turns out this was\nnot necessary. I've sniff-tested after removing that check and it looks\nOK.\n\n>+ /* Limit folding of loads to LE targets. */ \n> +\t if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n> +\t return false;\n\nI've restarted a regression test on this updated version.\n \nOK for trunk (assuming successful regression test completion) ?\n \nThanks,\n-Will\n \n[gcc]\n\n 2017-09-12 Will Schmidt \n\n * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n\ndiff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\nindex fbab0a2..bb8a77d 100644\n--- a/gcc/config/rs6000/rs6000-c.c\n+++ b/gcc/config/rs6000/rs6000-c.c\n@@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n \t\t convert (TREE_TYPE (stmt), arg0));\n stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n return stmt;\n }\n \n- /* Expand vec_ld into an expression that masks the address and\n- performs the load. We need to expand this early to allow\n+ /* Expand vec_st into an expression that masks the address and\n+ performs the store. We need to expand this early to allow\n the best aliasing, as by the time we get into RTL we no longer\n are able to honor __restrict__, for example. We may want to\n consider this for all memory access built-ins.\n \n When -maltivec=be is specified, or the wrong number of arguments\n is provided, simply punt to existing built-in processing. */\n- if (fcode == ALTIVEC_BUILTIN_VEC_LD\n- && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n- && nargs == 2)\n- {\n- tree arg0 = (*arglist)[0];\n- tree arg1 = (*arglist)[1];\n-\n- /* Strip qualifiers like \"const\" from the pointer arg. */\n- tree arg1_type = TREE_TYPE (arg1);\n- if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n-\tgoto bad;\n-\n- tree inner_type = TREE_TYPE (arg1_type);\n- if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n-\t{\n-\t arg1_type = build_pointer_type (build_qualified_type (inner_type,\n-\t\t\t\t\t\t\t\t0));\n-\t arg1 = fold_convert (arg1_type, arg1);\n-\t}\n-\n- /* Construct the masked address. Let existing error handling take\n-\t over if we don't have a constant offset. */\n- arg0 = fold (arg0);\n-\n- if (TREE_CODE (arg0) == INTEGER_CST)\n-\t{\n-\t if (!ptrofftype_p (TREE_TYPE (arg0)))\n-\t arg0 = build1 (NOP_EXPR, sizetype, arg0);\n-\n-\t tree arg1_type = TREE_TYPE (arg1);\n-\t if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n-\t {\n-\t arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n-\t tree const0 = build_int_cstu (sizetype, 0);\n-\t tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n-\t arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n-\t }\n-\n-\t tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n-\t\t\t\t arg1, arg0);\n-\t tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n-\t\t\t\t\t build_int_cst (arg1_type, -16));\n-\n-\t /* Find the built-in to get the return type so we can convert\n-\t the result properly (or fall back to default handling if the\n-\t arguments aren't compatible). */\n-\t for (desc = altivec_overloaded_builtins;\n-\t desc->code && desc->code != fcode; desc++)\n-\t continue;\n-\n-\t for (; desc->code == fcode; desc++)\n-\t if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n-\t\t&& (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n-\t\t\t\t\t\t desc->op2)))\n-\t {\n-\t\ttree ret_type = rs6000_builtin_type (desc->ret_type);\n-\t\tif (TYPE_MODE (ret_type) == V2DImode)\n-\t\t /* Type-based aliasing analysis thinks vector long\n-\t\t and vector long long are different and will put them\n-\t\t in distinct alias classes. Force our return type\n-\t\t to be a may-alias type to avoid this. */\n-\t\t ret_type\n-\t\t = build_pointer_type_for_mode (ret_type, Pmode,\n-\t\t\t\t\t\t true/*can_alias_all*/);\n-\t\telse\n-\t\t ret_type = build_pointer_type (ret_type);\n-\t\taligned = build1 (NOP_EXPR, ret_type, aligned);\n-\t\ttree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n-\t\treturn ret_val;\n-\t }\n-\t}\n- }\n \n- /* Similarly for stvx. */\n if (fcode == ALTIVEC_BUILTIN_VEC_ST\n && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n && nargs == 3)\n {\n tree arg0 = (*arglist)[0];\ndiff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\nindex 1338371..1fb5f44 100644\n--- a/gcc/config/rs6000/rs6000.c\n+++ b/gcc/config/rs6000/rs6000.c\n@@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n \tres = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n \tgsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n \tupdate_call_from_tree (gsi, res);\n \treturn true;\n }\n+ /* Vector loads. */\n+ case ALTIVEC_BUILTIN_LVX_V16QI:\n+ case ALTIVEC_BUILTIN_LVX_V8HI:\n+ case ALTIVEC_BUILTIN_LVX_V4SI:\n+ case ALTIVEC_BUILTIN_LVX_V4SF:\n+ case ALTIVEC_BUILTIN_LVX_V2DI:\n+ case ALTIVEC_BUILTIN_LVX_V2DF:\n+ {\n+\t gimple *g;\n+\t arg0 = gimple_call_arg (stmt, 0); // offset\n+\t arg1 = gimple_call_arg (stmt, 1); // address\n+\n+\t lhs = gimple_call_lhs (stmt);\n+\t location_t loc = gimple_location (stmt);\n+\n+\t tree arg1_type = TREE_TYPE (arg1);\n+\t tree lhs_type = TREE_TYPE (lhs);\n+\n+\t /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n+\t the tree using the value from arg0. The resulting type will match\n+\t the type of arg1. */\n+\t tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n+\t g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n+\t gimple_set_location (g, loc);\n+\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n+\t tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n+\t g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n+\t\t\t\t temp_offset);\n+\t gimple_set_location (g, loc);\n+\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n+\n+\t /* Mask off any lower bits from the address. */\n+\t tree alignment_mask = build_int_cst (arg1_type, -16);\n+\t tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n+\t g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n+\t\t\t\t temp_addr, alignment_mask);\n+\t gimple_set_location (g, loc);\n+\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n+\n+\t /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n+\t take an offset, but since we've already incorporated the offset\n+\t above, here we just pass in a zero. */\n+\t g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n+\t\t\t\t\t\tbuild_int_cst (arg1_type, 0)));\n+\t gimple_set_location (g, loc);\n+\t gsi_replace (gsi, g, true);\n+\n+\t return true;\n+\n+ }\n+\n default:\n \tif (TARGET_DEBUG_BUILTIN)\n \t fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n \t\t fn_code, fn_name1, fn_name2);\n break;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461990-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"lU8ssvvo\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsHTP59NSz9t2x\n\tfor ;\n\tWed, 13 Sep 2017 07:08:41 +1000 (AEST)","(qmail 97584 invoked by alias); 12 Sep 2017 21:08:34 -0000","(qmail 97565 invoked by uid 89); 12 Sep 2017 21:08:33 -0000","from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.158.5) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 12 Sep 2017 21:08:31 +0000","from pps.filterd (m0098414.ppops.net [127.0.0.1])\tby\n\tmx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8CL4wKp078267\tfor ;\n\tTue, 12 Sep 2017 17:08:29 -0400","from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205])\tby\n\tmx0b-001b2d01.pphosted.com with ESMTP id\n\t2cxmqjq1yd-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tTue, 12 Sep 2017 17:08:29 -0400","from localhost\tby e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n> comments have been adjusted slightly so they continue to read OK for the\n> existing vec_st code.\n> \n> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n> tests which have been posted separately.\n> \n> For V2 of this patch, I've removed the chunk of code that prohibited the\n> gimple fold from occurring in BE environments. This had fixed an issue\n> for me earlier during my development of the code, and turns out this was\n> not necessary. I've sniff-tested after removing that check and it looks\n> OK.\n\nThanks!\n> \n>> + /* Limit folding of loads to LE targets. */ \n>> +\t if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>> +\t return false;\n> \n> I've restarted a regression test on this updated version.\n> \n> OK for trunk (assuming successful regression test completion) ?\n\nLooks good to me otherwise, but Richard may have streamlining\nimprovements, so please wait for his review. And of course Segher's.\n\nThanks,\nBill\n> \n> Thanks,\n> -Will\n> \n> [gcc]\n> \n> 2017-09-12 Will Schmidt \n> \n> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n> \n> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n> index fbab0a2..bb8a77d 100644\n> --- a/gcc/config/rs6000/rs6000-c.c\n> +++ b/gcc/config/rs6000/rs6000-c.c\n> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n> \t\t convert (TREE_TYPE (stmt), arg0));\n> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n> return stmt;\n> }\n> \n> - /* Expand vec_ld into an expression that masks the address and\n> - performs the load. We need to expand this early to allow\n> + /* Expand vec_st into an expression that masks the address and\n> + performs the store. We need to expand this early to allow\n> the best aliasing, as by the time we get into RTL we no longer\n> are able to honor __restrict__, for example. We may want to\n> consider this for all memory access built-ins.\n> \n> When -maltivec=be is specified, or the wrong number of arguments\n> is provided, simply punt to existing built-in processing. */\n> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> - && nargs == 2)\n> - {\n> - tree arg0 = (*arglist)[0];\n> - tree arg1 = (*arglist)[1];\n> -\n> - /* Strip qualifiers like \"const\" from the pointer arg. */\n> - tree arg1_type = TREE_TYPE (arg1);\n> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n> -\tgoto bad;\n> -\n> - tree inner_type = TREE_TYPE (arg1_type);\n> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n> -\t{\n> -\t arg1_type = build_pointer_type (build_qualified_type (inner_type,\n> -\t\t\t\t\t\t\t\t0));\n> -\t arg1 = fold_convert (arg1_type, arg1);\n> -\t}\n> -\n> - /* Construct the masked address. Let existing error handling take\n> -\t over if we don't have a constant offset. */\n> - arg0 = fold (arg0);\n> -\n> - if (TREE_CODE (arg0) == INTEGER_CST)\n> -\t{\n> -\t if (!ptrofftype_p (TREE_TYPE (arg0)))\n> -\t arg0 = build1 (NOP_EXPR, sizetype, arg0);\n> -\n> -\t tree arg1_type = TREE_TYPE (arg1);\n> -\t if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n> -\t {\n> -\t arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n> -\t tree const0 = build_int_cstu (sizetype, 0);\n> -\t tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n> -\t arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n> -\t }\n> -\n> -\t tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n> -\t\t\t\t arg1, arg0);\n> -\t tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n> -\t\t\t\t\t build_int_cst (arg1_type, -16));\n> -\n> -\t /* Find the built-in to get the return type so we can convert\n> -\t the result properly (or fall back to default handling if the\n> -\t arguments aren't compatible). */\n> -\t for (desc = altivec_overloaded_builtins;\n> -\t desc->code && desc->code != fcode; desc++)\n> -\t continue;\n> -\n> -\t for (; desc->code == fcode; desc++)\n> -\t if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n> -\t\t&& (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n> -\t\t\t\t\t\t desc->op2)))\n> -\t {\n> -\t\ttree ret_type = rs6000_builtin_type (desc->ret_type);\n> -\t\tif (TYPE_MODE (ret_type) == V2DImode)\n> -\t\t /* Type-based aliasing analysis thinks vector long\n> -\t\t and vector long long are different and will put them\n> -\t\t in distinct alias classes. Force our return type\n> -\t\t to be a may-alias type to avoid this. */\n> -\t\t ret_type\n> -\t\t = build_pointer_type_for_mode (ret_type, Pmode,\n> -\t\t\t\t\t\t true/*can_alias_all*/);\n> -\t\telse\n> -\t\t ret_type = build_pointer_type (ret_type);\n> -\t\taligned = build1 (NOP_EXPR, ret_type, aligned);\n> -\t\ttree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n> -\t\treturn ret_val;\n> -\t }\n> -\t}\n> - }\n> \n> - /* Similarly for stvx. */\n> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> && nargs == 3)\n> {\n> tree arg0 = (*arglist)[0];\n> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n> index 1338371..1fb5f44 100644\n> --- a/gcc/config/rs6000/rs6000.c\n> +++ b/gcc/config/rs6000/rs6000.c\n> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n> \tres = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n> \tgsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> \tupdate_call_from_tree (gsi, res);\n> \treturn true;\n> }\n> + /* Vector loads. */\n> + case ALTIVEC_BUILTIN_LVX_V16QI:\n> + case ALTIVEC_BUILTIN_LVX_V8HI:\n> + case ALTIVEC_BUILTIN_LVX_V4SI:\n> + case ALTIVEC_BUILTIN_LVX_V4SF:\n> + case ALTIVEC_BUILTIN_LVX_V2DI:\n> + case ALTIVEC_BUILTIN_LVX_V2DF:\n> + {\n> +\t gimple *g;\n> +\t arg0 = gimple_call_arg (stmt, 0); // offset\n> +\t arg1 = gimple_call_arg (stmt, 1); // address\n> +\n> +\t lhs = gimple_call_lhs (stmt);\n> +\t location_t loc = gimple_location (stmt);\n> +\n> +\t tree arg1_type = TREE_TYPE (arg1);\n> +\t tree lhs_type = TREE_TYPE (lhs);\n> +\n> +\t /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n> +\t the tree using the value from arg0. The resulting type will match\n> +\t the type of arg1. */\n> +\t tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n> +\t g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n> +\t gimple_set_location (g, loc);\n> +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\t tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> +\t g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n> +\t\t\t\t temp_offset);\n> +\t gimple_set_location (g, loc);\n> +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\n> +\t /* Mask off any lower bits from the address. */\n> +\t tree alignment_mask = build_int_cst (arg1_type, -16);\n> +\t tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> +\t g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n> +\t\t\t\t temp_addr, alignment_mask);\n> +\t gimple_set_location (g, loc);\n> +\t gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\n> +\t /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n> +\t take an offset, but since we've already incorporated the offset\n> +\t above, here we just pass in a zero. */\n> +\t g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n> +\t\t\t\t\t\tbuild_int_cst (arg1_type, 0)));\n> +\t gimple_set_location (g, loc);\n> +\t gsi_replace (gsi, g, true);\n> +\n> +\t return true;\n> +\n> + }\n> +\n> default:\n> \tif (TARGET_DEBUG_BUILTIN)\n> \t fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n> \t\t fn_code, fn_name1, fn_name2);\n> break;\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461991-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"O9twT1RX\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsJTs1W0cz9t33\n\tfor ;\n\tWed, 13 Sep 2017 07:54:08 +1000 (AEST)","(qmail 88770 invoked by alias); 12 Sep 2017 21:54:00 -0000","(qmail 88746 invoked by uid 89); 12 Sep 2017 21:54:00 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 12 Sep 2017 21:53:58 +0000","from pps.filterd (m0098394.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8CLrnak057310\tfor ;\n\tTue, 12 Sep 2017 17:53:57 -0400","from e37.co.us.ibm.com (e37.co.us.ibm.com [32.97.110.158])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cxhjb38pc-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tTue, 12 Sep 2017 17:53:56 -0400","from localhost\tby e37.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n> comments have been adjusted slightly so they continue to read OK for the\n> existing vec_st code.\n>\n> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n> tests which have been posted separately.\n>\n> For V2 of this patch, I've removed the chunk of code that prohibited the\n> gimple fold from occurring in BE environments. This had fixed an issue\n> for me earlier during my development of the code, and turns out this was\n> not necessary. I've sniff-tested after removing that check and it looks\n> OK.\n>\n>>+ /* Limit folding of loads to LE targets. */\n>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>> + return false;\n>\n> I've restarted a regression test on this updated version.\n>\n> OK for trunk (assuming successful regression test completion) ?\n>\n> Thanks,\n> -Will\n>\n> [gcc]\n>\n> 2017-09-12 Will Schmidt \n>\n> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>\n> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n> index fbab0a2..bb8a77d 100644\n> --- a/gcc/config/rs6000/rs6000-c.c\n> +++ b/gcc/config/rs6000/rs6000-c.c\n> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n> convert (TREE_TYPE (stmt), arg0));\n> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n> return stmt;\n> }\n>\n> - /* Expand vec_ld into an expression that masks the address and\n> - performs the load. We need to expand this early to allow\n> + /* Expand vec_st into an expression that masks the address and\n> + performs the store. We need to expand this early to allow\n> the best aliasing, as by the time we get into RTL we no longer\n> are able to honor __restrict__, for example. We may want to\n> consider this for all memory access built-ins.\n>\n> When -maltivec=be is specified, or the wrong number of arguments\n> is provided, simply punt to existing built-in processing. */\n> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> - && nargs == 2)\n> - {\n> - tree arg0 = (*arglist)[0];\n> - tree arg1 = (*arglist)[1];\n> -\n> - /* Strip qualifiers like \"const\" from the pointer arg. */\n> - tree arg1_type = TREE_TYPE (arg1);\n> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n> - goto bad;\n> -\n> - tree inner_type = TREE_TYPE (arg1_type);\n> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n> - {\n> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n> - 0));\n> - arg1 = fold_convert (arg1_type, arg1);\n> - }\n> -\n> - /* Construct the masked address. Let existing error handling take\n> - over if we don't have a constant offset. */\n> - arg0 = fold (arg0);\n> -\n> - if (TREE_CODE (arg0) == INTEGER_CST)\n> - {\n> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n> -\n> - tree arg1_type = TREE_TYPE (arg1);\n> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n> - {\n> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n> - tree const0 = build_int_cstu (sizetype, 0);\n> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n> - }\n> -\n> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n> - arg1, arg0);\n> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n> - build_int_cst (arg1_type, -16));\n> -\n> - /* Find the built-in to get the return type so we can convert\n> - the result properly (or fall back to default handling if the\n> - arguments aren't compatible). */\n> - for (desc = altivec_overloaded_builtins;\n> - desc->code && desc->code != fcode; desc++)\n> - continue;\n> -\n> - for (; desc->code == fcode; desc++)\n> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n> - desc->op2)))\n> - {\n> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n> - if (TYPE_MODE (ret_type) == V2DImode)\n> - /* Type-based aliasing analysis thinks vector long\n> - and vector long long are different and will put them\n> - in distinct alias classes. Force our return type\n> - to be a may-alias type to avoid this. */\n> - ret_type\n> - = build_pointer_type_for_mode (ret_type, Pmode,\n> - true/*can_alias_all*/);\n> - else\n> - ret_type = build_pointer_type (ret_type);\n> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n> - return ret_val;\n> - }\n> - }\n> - }\n>\n> - /* Similarly for stvx. */\n> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> && nargs == 3)\n> {\n> tree arg0 = (*arglist)[0];\n> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n> index 1338371..1fb5f44 100644\n> --- a/gcc/config/rs6000/rs6000.c\n> +++ b/gcc/config/rs6000/rs6000.c\n> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> update_call_from_tree (gsi, res);\n> return true;\n> }\n> + /* Vector loads. */\n> + case ALTIVEC_BUILTIN_LVX_V16QI:\n> + case ALTIVEC_BUILTIN_LVX_V8HI:\n> + case ALTIVEC_BUILTIN_LVX_V4SI:\n> + case ALTIVEC_BUILTIN_LVX_V4SF:\n> + case ALTIVEC_BUILTIN_LVX_V2DI:\n> + case ALTIVEC_BUILTIN_LVX_V2DF:\n> + {\n> + gimple *g;\n> + arg0 = gimple_call_arg (stmt, 0); // offset\n> + arg1 = gimple_call_arg (stmt, 1); // address\n> +\n> + lhs = gimple_call_lhs (stmt);\n> + location_t loc = gimple_location (stmt);\n> +\n> + tree arg1_type = TREE_TYPE (arg1);\n> + tree lhs_type = TREE_TYPE (lhs);\n> +\n> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n> + the tree using the value from arg0. The resulting type will match\n> + the type of arg1. */\n> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n> + gimple_set_location (g, loc);\n> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n> + temp_offset);\n> + gimple_set_location (g, loc);\n> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> +\n> + /* Mask off any lower bits from the address. */\n> + tree alignment_mask = build_int_cst (arg1_type, -16);\n> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n> + temp_addr, alignment_mask);\n> + gimple_set_location (g, loc);\n> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n\nYou could use\n\n gimple_seq stmts = NULL;\n tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\narg1_type, arg1, temp_offset);\n tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\narg1_type, temp_addr, build_int_cst (arg1_type, -16));\n gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n\n> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n> + take an offset, but since we've already incorporated the offset\n> + above, here we just pass in a zero. */\n> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n> + build_int_cst (arg1_type, 0)));\n\nare you sure about arg1_type here? I'm sure not. For\n\n... foo (struct S *p)\n{\n return __builtin_lvx_v2df (4, (double *)p);\n}\n\nyou'd end up with p as arg1 and thus struct S * as arg1_type and thus\nTBAA using 'struct S' to access the memory.\n\nI think if the builtins have any TBAA constraints you need to build those\nexplicitely, if not, you should use ptr_type_node aka no TBAA.\n\nRichard.\n\n> + gimple_set_location (g, loc);\n> + gsi_replace (gsi, g, true);\n> +\n> + return true;\n> +\n> + }\n> +\n> default:\n> if (TARGET_DEBUG_BUILTIN)\n> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n> fn_code, fn_name1, fn_name2);\n> break;\n>\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462027-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; 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charset=\"UTF-8\"","X-IsSubscribed":"yes"}},{"id":1767973,"web_url":"http://patchwork.ozlabs.org/comment/1767973/","msgid":"<24A6439E-6268-44F8-92CE-EF0F22DA5773@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-13T15:40:30","subject":"Re: [PATCH, rs6000] [v2] Folding of vector loads in GIMPLE","submitter":{"id":6459,"url":"http://patchwork.ozlabs.org/api/people/6459/","name":"Bill Schmidt","email":"wschmidt@linux.vnet.ibm.com"},"content":"On Sep 13, 2017, at 7:23 AM, Richard Biener wrote:\n> \n> On Tue, Sep 12, 2017 at 11:08 PM, Will Schmidt\n> wrote:\n>> Hi,\n>> \n>> [PATCH, rs6000] [v2] Folding of vector loads in GIMPLE\n>> \n>> Folding of vector loads in GIMPLE.\n>> \n>> Add code to handle gimple folding for the vec_ld builtins.\n>> Remove the now obsoleted folding code for vec_ld from rs6000-c.c. Surrounding\n>> comments have been adjusted slightly so they continue to read OK for the\n>> existing vec_st code.\n>> \n>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n>> tests which have been posted separately.\n>> \n>> For V2 of this patch, I've removed the chunk of code that prohibited the\n>> gimple fold from occurring in BE environments. This had fixed an issue\n>> for me earlier during my development of the code, and turns out this was\n>> not necessary. I've sniff-tested after removing that check and it looks\n>> OK.\n>> \n>>> + /* Limit folding of loads to LE targets. */\n>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>>> + return false;\n>> \n>> I've restarted a regression test on this updated version.\n>> \n>> OK for trunk (assuming successful regression test completion) ?\n>> \n>> Thanks,\n>> -Will\n>> \n>> [gcc]\n>> \n>> 2017-09-12 Will Schmidt \n>> \n>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>> \n>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n>> index fbab0a2..bb8a77d 100644\n>> --- a/gcc/config/rs6000/rs6000-c.c\n>> +++ b/gcc/config/rs6000/rs6000-c.c\n>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n>> convert (TREE_TYPE (stmt), arg0));\n>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n>> return stmt;\n>> }\n>> \n>> - /* Expand vec_ld into an expression that masks the address and\n>> - performs the load. We need to expand this early to allow\n>> + /* Expand vec_st into an expression that masks the address and\n>> + performs the store. We need to expand this early to allow\n>> the best aliasing, as by the time we get into RTL we no longer\n>> are able to honor __restrict__, for example. We may want to\n>> consider this for all memory access built-ins.\n>> \n>> When -maltivec=be is specified, or the wrong number of arguments\n>> is provided, simply punt to existing built-in processing. */\n>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>> - && nargs == 2)\n>> - {\n>> - tree arg0 = (*arglist)[0];\n>> - tree arg1 = (*arglist)[1];\n>> -\n>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n>> - tree arg1_type = TREE_TYPE (arg1);\n>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n>> - goto bad;\n>> -\n>> - tree inner_type = TREE_TYPE (arg1_type);\n>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n>> - {\n>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n>> - 0));\n>> - arg1 = fold_convert (arg1_type, arg1);\n>> - }\n>> -\n>> - /* Construct the masked address. Let existing error handling take\n>> - over if we don't have a constant offset. */\n>> - arg0 = fold (arg0);\n>> -\n>> - if (TREE_CODE (arg0) == INTEGER_CST)\n>> - {\n>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n>> -\n>> - tree arg1_type = TREE_TYPE (arg1);\n>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n>> - {\n>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n>> - tree const0 = build_int_cstu (sizetype, 0);\n>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n>> - }\n>> -\n>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n>> - arg1, arg0);\n>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n>> - build_int_cst (arg1_type, -16));\n>> -\n>> - /* Find the built-in to get the return type so we can convert\n>> - the result properly (or fall back to default handling if the\n>> - arguments aren't compatible). */\n>> - for (desc = altivec_overloaded_builtins;\n>> - desc->code && desc->code != fcode; desc++)\n>> - continue;\n>> -\n>> - for (; desc->code == fcode; desc++)\n>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n>> - desc->op2)))\n>> - {\n>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n>> - if (TYPE_MODE (ret_type) == V2DImode)\n>> - /* Type-based aliasing analysis thinks vector long\n>> - and vector long long are different and will put them\n>> - in distinct alias classes. Force our return type\n>> - to be a may-alias type to avoid this. */\n>> - ret_type\n>> - = build_pointer_type_for_mode (ret_type, Pmode,\n>> - true/*can_alias_all*/);\n>> - else\n>> - ret_type = build_pointer_type (ret_type);\n>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n>> - return ret_val;\n>> - }\n>> - }\n>> - }\n>> \n>> - /* Similarly for stvx. */\n>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>> && nargs == 3)\n>> {\n>> tree arg0 = (*arglist)[0];\n>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n>> index 1338371..1fb5f44 100644\n>> --- a/gcc/config/rs6000/rs6000.c\n>> +++ b/gcc/config/rs6000/rs6000.c\n>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>> update_call_from_tree (gsi, res);\n>> return true;\n>> }\n>> + /* Vector loads. */\n>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n>> + {\n>> + gimple *g;\n>> + arg0 = gimple_call_arg (stmt, 0); // offset\n>> + arg1 = gimple_call_arg (stmt, 1); // address\n>> +\n>> + lhs = gimple_call_lhs (stmt);\n>> + location_t loc = gimple_location (stmt);\n>> +\n>> + tree arg1_type = TREE_TYPE (arg1);\n>> + tree lhs_type = TREE_TYPE (lhs);\n>> +\n>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n>> + the tree using the value from arg0. The resulting type will match\n>> + the type of arg1. */\n>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n>> + gimple_set_location (g, loc);\n>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n>> + temp_offset);\n>> + gimple_set_location (g, loc);\n>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>> +\n>> + /* Mask off any lower bits from the address. */\n>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n>> + temp_addr, alignment_mask);\n>> + gimple_set_location (g, loc);\n>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> \n> You could use\n> \n> gimple_seq stmts = NULL;\n> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n> arg1_type, arg1, temp_offset);\n> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> \n>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n>> + take an offset, but since we've already incorporated the offset\n>> + above, here we just pass in a zero. */\n>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n>> + build_int_cst (arg1_type, 0)));\n> \n> are you sure about arg1_type here? I'm sure not. For\n> \n> ... foo (struct S *p)\n> {\n> return __builtin_lvx_v2df (4, (double *)p);\n> }\n> \n> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n> TBAA using 'struct S' to access the memory.\n\nHm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\nWill, you should probably test this example and see, but I'm pretty confident\nabout this (see below).\n\n> \n> I think if the builtins have any TBAA constraints you need to build those\n> explicitely, if not, you should use ptr_type_node aka no TBAA.\n\nThe type signatures are constrained during parsing, so we should only\nsee allowed pointer types on arg1 by the time we get to gimple folding. I\nthink that using arg1_type should work, but I am probably missing\nsomething subtle, so please feel free to whack me on the temple until\nI get it. :-)\n\nBill\n> \n> Richard.\n> \n>> + gimple_set_location (g, loc);\n>> + gsi_replace (gsi, g, true);\n>> +\n>> + return true;\n>> +\n>> + }\n>> +\n>> default:\n>> if (TARGET_DEBUG_BUILTIN)\n>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n>> fn_code, fn_name1, fn_name2);\n>> break;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462048-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"Sm94o2wl\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsm9X6Mplz9s9Y\n\tfor ;\n\tThu, 14 Sep 2017 01:41:34 +1000 (AEST)","(qmail 75782 invoked by alias); 13 Sep 2017 15:41:26 -0000","(qmail 74984 invoked by uid 89); 13 Sep 2017 15:41:25 -0000","from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.158.5) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tWed, 13 Sep 2017 15:41:23 +0000","from pps.filterd (m0098414.ppops.net [127.0.0.1])\tby\n\tmx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8DFfDTJ144740\tfor ;\n\tWed, 13 Sep 2017 11:41:21 -0400","from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150])\tby\n\tmx0b-001b2d01.pphosted.com with ESMTP id\n\t2cy2xpq9hh-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tWed, 13 Sep 2017 11:41:15 -0400","from localhost\tby e32.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n>>> comments have been adjusted slightly so they continue to read OK for the\n>>> existing vec_st code.\n>>> \n>>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n>>> tests which have been posted separately.\n>>> \n>>> For V2 of this patch, I've removed the chunk of code that prohibited the\n>>> gimple fold from occurring in BE environments. This had fixed an issue\n>>> for me earlier during my development of the code, and turns out this was\n>>> not necessary. I've sniff-tested after removing that check and it looks\n>>> OK.\n>>> \n>>>> + /* Limit folding of loads to LE targets. */\n>>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>>>> + return false;\n>>> \n>>> I've restarted a regression test on this updated version.\n>>> \n>>> OK for trunk (assuming successful regression test completion) ?\n>>> \n>>> Thanks,\n>>> -Will\n>>> \n>>> [gcc]\n>>> \n>>> 2017-09-12 Will Schmidt \n>>> \n>>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n>>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n>>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n>>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>>> \n>>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n>>> index fbab0a2..bb8a77d 100644\n>>> --- a/gcc/config/rs6000/rs6000-c.c\n>>> +++ b/gcc/config/rs6000/rs6000-c.c\n>>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n>>> convert (TREE_TYPE (stmt), arg0));\n>>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n>>> return stmt;\n>>> }\n>>> \n>>> - /* Expand vec_ld into an expression that masks the address and\n>>> - performs the load. We need to expand this early to allow\n>>> + /* Expand vec_st into an expression that masks the address and\n>>> + performs the store. We need to expand this early to allow\n>>> the best aliasing, as by the time we get into RTL we no longer\n>>> are able to honor __restrict__, for example. We may want to\n>>> consider this for all memory access built-ins.\n>>> \n>>> When -maltivec=be is specified, or the wrong number of arguments\n>>> is provided, simply punt to existing built-in processing. */\n>>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n>>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>> - && nargs == 2)\n>>> - {\n>>> - tree arg0 = (*arglist)[0];\n>>> - tree arg1 = (*arglist)[1];\n>>> -\n>>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n>>> - tree arg1_type = TREE_TYPE (arg1);\n>>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n>>> - goto bad;\n>>> -\n>>> - tree inner_type = TREE_TYPE (arg1_type);\n>>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n>>> - {\n>>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n>>> - 0));\n>>> - arg1 = fold_convert (arg1_type, arg1);\n>>> - }\n>>> -\n>>> - /* Construct the masked address. Let existing error handling take\n>>> - over if we don't have a constant offset. */\n>>> - arg0 = fold (arg0);\n>>> -\n>>> - if (TREE_CODE (arg0) == INTEGER_CST)\n>>> - {\n>>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n>>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n>>> -\n>>> - tree arg1_type = TREE_TYPE (arg1);\n>>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n>>> - {\n>>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n>>> - tree const0 = build_int_cstu (sizetype, 0);\n>>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n>>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n>>> - }\n>>> -\n>>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n>>> - arg1, arg0);\n>>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n>>> - build_int_cst (arg1_type, -16));\n>>> -\n>>> - /* Find the built-in to get the return type so we can convert\n>>> - the result properly (or fall back to default handling if the\n>>> - arguments aren't compatible). */\n>>> - for (desc = altivec_overloaded_builtins;\n>>> - desc->code && desc->code != fcode; desc++)\n>>> - continue;\n>>> -\n>>> - for (; desc->code == fcode; desc++)\n>>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n>>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n>>> - desc->op2)))\n>>> - {\n>>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n>>> - if (TYPE_MODE (ret_type) == V2DImode)\n>>> - /* Type-based aliasing analysis thinks vector long\n>>> - and vector long long are different and will put them\n>>> - in distinct alias classes. Force our return type\n>>> - to be a may-alias type to avoid this. */\n>>> - ret_type\n>>> - = build_pointer_type_for_mode (ret_type, Pmode,\n>>> - true/*can_alias_all*/);\n>>> - else\n>>> - ret_type = build_pointer_type (ret_type);\n>>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n>>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n>>> - return ret_val;\n>>> - }\n>>> - }\n>>> - }\n>>> \n>>> - /* Similarly for stvx. */\n>>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n>>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>> && nargs == 3)\n>>> {\n>>> tree arg0 = (*arglist)[0];\n>>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n>>> index 1338371..1fb5f44 100644\n>>> --- a/gcc/config/rs6000/rs6000.c\n>>> +++ b/gcc/config/rs6000/rs6000.c\n>>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n>>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>> update_call_from_tree (gsi, res);\n>>> return true;\n>>> }\n>>> + /* Vector loads. */\n>>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n>>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n>>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n>>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n>>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n>>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n>>> + {\n>>> + gimple *g;\n>>> + arg0 = gimple_call_arg (stmt, 0); // offset\n>>> + arg1 = gimple_call_arg (stmt, 1); // address\n>>> +\n>>> + lhs = gimple_call_lhs (stmt);\n>>> + location_t loc = gimple_location (stmt);\n>>> +\n>>> + tree arg1_type = TREE_TYPE (arg1);\n>>> + tree lhs_type = TREE_TYPE (lhs);\n>>> +\n>>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n>>> + the tree using the value from arg0. The resulting type will match\n>>> + the type of arg1. */\n>>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n>>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n>>> + gimple_set_location (g, loc);\n>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n>>> + temp_offset);\n>>> + gimple_set_location (g, loc);\n>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>> +\n>>> + /* Mask off any lower bits from the address. */\n>>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n>>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n>>> + temp_addr, alignment_mask);\n>>> + gimple_set_location (g, loc);\n>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>> \n>> You could use\n>> \n>> gimple_seq stmts = NULL;\n>> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n>> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n>> arg1_type, arg1, temp_offset);\n>> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n>> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>> \n>>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n>>> + take an offset, but since we've already incorporated the offset\n>>> + above, here we just pass in a zero. */\n>>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n>>> + build_int_cst (arg1_type, 0)));\n>> \n>> are you sure about arg1_type here? I'm sure not. For\n>> \n>> ... foo (struct S *p)\n>> {\n>> return __builtin_lvx_v2df (4, (double *)p);\n>> }\n>> \n>> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n>> TBAA using 'struct S' to access the memory.\n> \n> Hm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\n> Will, you should probably test this example and see, but I'm pretty confident\n> about this (see below).\n\nBut, as I should have suspected, you're right. For some reason \ngimple_call_arg is returning p, stripped of the cast information where the\nuser asserted that p points to a double*.\n\nCan you explain to me why this should be so? I assume that somebody\nhas decided to strip_nops the argument and lose the cast.\n\nUsing ptr_type_node loses all type information, so that would be a\nregression from what we do today. In some cases we could reconstruct\nthat this was necessarily, say, a double*, but I don't know how we would\nrecover the signedness for an integer type.\n\nBill\n> \n>> \n>> I think if the builtins have any TBAA constraints you need to build those\n>> explicitely, if not, you should use ptr_type_node aka no TBAA.\n> \n> The type signatures are constrained during parsing, so we should only\n> see allowed pointer types on arg1 by the time we get to gimple folding. I\n> think that using arg1_type should work, but I am probably missing\n> something subtle, so please feel free to whack me on the temple until\n> I get it. :-)\n> \n> Bill\n>> \n>> Richard.\n>> \n>>> + gimple_set_location (g, loc);\n>>> + gsi_replace (gsi, g, true);\n>>> +\n>>> + return true;\n>>> +\n>>> + }\n>>> +\n>>> default:\n>>> if (TARGET_DEBUG_BUILTIN)\n>>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n>>> fn_code, fn_name1, fn_name2);\n>>> break;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462081-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"jPnssOVf\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xstDR4D4dz9rxj\n\tfor ;\n\tThu, 14 Sep 2017 06:14:30 +1000 (AEST)","(qmail 27039 invoked by alias); 13 Sep 2017 20:14:22 -0000","(qmail 26971 invoked by uid 89); 13 Sep 2017 20:14:17 -0000","from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.158.5) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tWed, 13 Sep 2017 20:14:15 +0000","from pps.filterd (m0098421.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8DKDlU9004090\tfor ;\n\tWed, 13 Sep 2017 16:14:13 -0400","from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cy7wscpv7-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tWed, 13 Sep 2017 16:14:13 -0400","from localhost\tby e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n>>>> comments have been adjusted slightly so they continue to read OK for the\n>>>> existing vec_st code.\n>>>>\n>>>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n>>>> tests which have been posted separately.\n>>>>\n>>>> For V2 of this patch, I've removed the chunk of code that prohibited the\n>>>> gimple fold from occurring in BE environments. This had fixed an issue\n>>>> for me earlier during my development of the code, and turns out this was\n>>>> not necessary. I've sniff-tested after removing that check and it looks\n>>>> OK.\n>>>>\n>>>>> + /* Limit folding of loads to LE targets. */\n>>>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>>>>> + return false;\n>>>>\n>>>> I've restarted a regression test on this updated version.\n>>>>\n>>>> OK for trunk (assuming successful regression test completion) ?\n>>>>\n>>>> Thanks,\n>>>> -Will\n>>>>\n>>>> [gcc]\n>>>>\n>>>> 2017-09-12 Will Schmidt \n>>>>\n>>>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n>>>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n>>>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n>>>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>>>>\n>>>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n>>>> index fbab0a2..bb8a77d 100644\n>>>> --- a/gcc/config/rs6000/rs6000-c.c\n>>>> +++ b/gcc/config/rs6000/rs6000-c.c\n>>>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n>>>> convert (TREE_TYPE (stmt), arg0));\n>>>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n>>>> return stmt;\n>>>> }\n>>>>\n>>>> - /* Expand vec_ld into an expression that masks the address and\n>>>> - performs the load. We need to expand this early to allow\n>>>> + /* Expand vec_st into an expression that masks the address and\n>>>> + performs the store. We need to expand this early to allow\n>>>> the best aliasing, as by the time we get into RTL we no longer\n>>>> are able to honor __restrict__, for example. We may want to\n>>>> consider this for all memory access built-ins.\n>>>>\n>>>> When -maltivec=be is specified, or the wrong number of arguments\n>>>> is provided, simply punt to existing built-in processing. */\n>>>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n>>>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>> - && nargs == 2)\n>>>> - {\n>>>> - tree arg0 = (*arglist)[0];\n>>>> - tree arg1 = (*arglist)[1];\n>>>> -\n>>>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n>>>> - goto bad;\n>>>> -\n>>>> - tree inner_type = TREE_TYPE (arg1_type);\n>>>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n>>>> - {\n>>>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n>>>> - 0));\n>>>> - arg1 = fold_convert (arg1_type, arg1);\n>>>> - }\n>>>> -\n>>>> - /* Construct the masked address. Let existing error handling take\n>>>> - over if we don't have a constant offset. */\n>>>> - arg0 = fold (arg0);\n>>>> -\n>>>> - if (TREE_CODE (arg0) == INTEGER_CST)\n>>>> - {\n>>>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n>>>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n>>>> -\n>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n>>>> - {\n>>>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n>>>> - tree const0 = build_int_cstu (sizetype, 0);\n>>>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n>>>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n>>>> - }\n>>>> -\n>>>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n>>>> - arg1, arg0);\n>>>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n>>>> - build_int_cst (arg1_type, -16));\n>>>> -\n>>>> - /* Find the built-in to get the return type so we can convert\n>>>> - the result properly (or fall back to default handling if the\n>>>> - arguments aren't compatible). */\n>>>> - for (desc = altivec_overloaded_builtins;\n>>>> - desc->code && desc->code != fcode; desc++)\n>>>> - continue;\n>>>> -\n>>>> - for (; desc->code == fcode; desc++)\n>>>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n>>>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n>>>> - desc->op2)))\n>>>> - {\n>>>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n>>>> - if (TYPE_MODE (ret_type) == V2DImode)\n>>>> - /* Type-based aliasing analysis thinks vector long\n>>>> - and vector long long are different and will put them\n>>>> - in distinct alias classes. Force our return type\n>>>> - to be a may-alias type to avoid this. */\n>>>> - ret_type\n>>>> - = build_pointer_type_for_mode (ret_type, Pmode,\n>>>> - true/*can_alias_all*/);\n>>>> - else\n>>>> - ret_type = build_pointer_type (ret_type);\n>>>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n>>>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n>>>> - return ret_val;\n>>>> - }\n>>>> - }\n>>>> - }\n>>>>\n>>>> - /* Similarly for stvx. */\n>>>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n>>>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>> && nargs == 3)\n>>>> {\n>>>> tree arg0 = (*arglist)[0];\n>>>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n>>>> index 1338371..1fb5f44 100644\n>>>> --- a/gcc/config/rs6000/rs6000.c\n>>>> +++ b/gcc/config/rs6000/rs6000.c\n>>>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n>>>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>> update_call_from_tree (gsi, res);\n>>>> return true;\n>>>> }\n>>>> + /* Vector loads. */\n>>>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n>>>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n>>>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n>>>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n>>>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n>>>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n>>>> + {\n>>>> + gimple *g;\n>>>> + arg0 = gimple_call_arg (stmt, 0); // offset\n>>>> + arg1 = gimple_call_arg (stmt, 1); // address\n>>>> +\n>>>> + lhs = gimple_call_lhs (stmt);\n>>>> + location_t loc = gimple_location (stmt);\n>>>> +\n>>>> + tree arg1_type = TREE_TYPE (arg1);\n>>>> + tree lhs_type = TREE_TYPE (lhs);\n>>>> +\n>>>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n>>>> + the tree using the value from arg0. The resulting type will match\n>>>> + the type of arg1. */\n>>>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n>>>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n>>>> + gimple_set_location (g, loc);\n>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n>>>> + temp_offset);\n>>>> + gimple_set_location (g, loc);\n>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>> +\n>>>> + /* Mask off any lower bits from the address. */\n>>>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n>>>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n>>>> + temp_addr, alignment_mask);\n>>>> + gimple_set_location (g, loc);\n>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>\n>>> You could use\n>>>\n>>> gimple_seq stmts = NULL;\n>>> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n>>> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n>>> arg1_type, arg1, temp_offset);\n>>> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n>>> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>\n>>>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n>>>> + take an offset, but since we've already incorporated the offset\n>>>> + above, here we just pass in a zero. */\n>>>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n>>>> + build_int_cst (arg1_type, 0)));\n>>>\n>>> are you sure about arg1_type here? I'm sure not. For\n>>>\n>>> ... foo (struct S *p)\n>>> {\n>>> return __builtin_lvx_v2df (4, (double *)p);\n>>> }\n>>>\n>>> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n>>> TBAA using 'struct S' to access the memory.\n>>\n>> Hm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\n>> Will, you should probably test this example and see, but I'm pretty confident\n>> about this (see below).\n>\n> But, as I should have suspected, you're right. For some reason\n> gimple_call_arg is returning p, stripped of the cast information where the\n> user asserted that p points to a double*.\n>\n> Can you explain to me why this should be so? I assume that somebody\n> has decided to strip_nops the argument and lose the cast.\n\npointer types have no meaning in GIMPLE so we aggressively prune them.\n\n> Using ptr_type_node loses all type information, so that would be a\n> regression from what we do today. In some cases we could reconstruct\n> that this was necessarily, say, a double*, but I don't know how we would\n> recover the signedness for an integer type.\n\nHow did we handle the expansion previously - ah - it was done earlier\nin the C FE. So why are you moving it to GIMPLE? The function is called\nresolve_overloaded_builtin - what kind of overloading do you resolve here?\nAs said argument types might not be preserved.\n\nRichard.\n\n> Bill\n>>\n>>>\n>>> I think if the builtins have any TBAA constraints you need to build those\n>>> explicitely, if not, you should use ptr_type_node aka no TBAA.\n>>\n>> The type signatures are constrained during parsing, so we should only\n>> see allowed pointer types on arg1 by the time we get to gimple folding. I\n>> think that using arg1_type should work, but I am probably missing\n>> something subtle, so please feel free to whack me on the temple until\n>> I get it. :-)\n>>\n>> Bill\n>>>\n>>> Richard.\n>>>\n>>>> + gimple_set_location (g, loc);\n>>>> + gsi_replace (gsi, g, true);\n>>>> +\n>>>> + return true;\n>>>> +\n>>>> + }\n>>>> +\n>>>> default:\n>>>> if (TARGET_DEBUG_BUILTIN)\n>>>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n>>>> fn_code, fn_name1, fn_name2);\n>>>> break;\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462115-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"dDj24gpq\"; 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charset=\"UTF-8\"","X-IsSubscribed":"yes"}},{"id":1768637,"web_url":"http://patchwork.ozlabs.org/comment/1768637/","msgid":"<73D3C195-E029-4050-9764-57C07845DBEB@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-14T14:38:13","subject":"Re: [PATCH, rs6000] [v2] Folding of vector loads in GIMPLE","submitter":{"id":6459,"url":"http://patchwork.ozlabs.org/api/people/6459/","name":"Bill Schmidt","email":"wschmidt@linux.vnet.ibm.com"},"content":"On Sep 14, 2017, at 5:15 AM, Richard Biener wrote:\n> \n> On Wed, Sep 13, 2017 at 10:14 PM, Bill Schmidt\n> wrote:\n>> On Sep 13, 2017, at 10:40 AM, Bill Schmidt wrote:\n>>> \n>>> On Sep 13, 2017, at 7:23 AM, Richard Biener wrote:\n>>>> \n>>>> On Tue, Sep 12, 2017 at 11:08 PM, Will Schmidt\n>>>> wrote:\n>>>>> Hi,\n>>>>> \n>>>>> [PATCH, rs6000] [v2] Folding of vector loads in GIMPLE\n>>>>> \n>>>>> Folding of vector loads in GIMPLE.\n>>>>> \n>>>>> Add code to handle gimple folding for the vec_ld builtins.\n>>>>> Remove the now obsoleted folding code for vec_ld from rs6000-c.c. Surrounding\n>>>>> comments have been adjusted slightly so they continue to read OK for the\n>>>>> existing vec_st code.\n>>>>> \n>>>>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n>>>>> tests which have been posted separately.\n>>>>> \n>>>>> For V2 of this patch, I've removed the chunk of code that prohibited the\n>>>>> gimple fold from occurring in BE environments. This had fixed an issue\n>>>>> for me earlier during my development of the code, and turns out this was\n>>>>> not necessary. I've sniff-tested after removing that check and it looks\n>>>>> OK.\n>>>>> \n>>>>>> + /* Limit folding of loads to LE targets. */\n>>>>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>>>>>> + return false;\n>>>>> \n>>>>> I've restarted a regression test on this updated version.\n>>>>> \n>>>>> OK for trunk (assuming successful regression test completion) ?\n>>>>> \n>>>>> Thanks,\n>>>>> -Will\n>>>>> \n>>>>> [gcc]\n>>>>> \n>>>>> 2017-09-12 Will Schmidt \n>>>>> \n>>>>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n>>>>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n>>>>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n>>>>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>>>>> \n>>>>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n>>>>> index fbab0a2..bb8a77d 100644\n>>>>> --- a/gcc/config/rs6000/rs6000-c.c\n>>>>> +++ b/gcc/config/rs6000/rs6000-c.c\n>>>>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n>>>>> convert (TREE_TYPE (stmt), arg0));\n>>>>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n>>>>> return stmt;\n>>>>> }\n>>>>> \n>>>>> - /* Expand vec_ld into an expression that masks the address and\n>>>>> - performs the load. We need to expand this early to allow\n>>>>> + /* Expand vec_st into an expression that masks the address and\n>>>>> + performs the store. We need to expand this early to allow\n>>>>> the best aliasing, as by the time we get into RTL we no longer\n>>>>> are able to honor __restrict__, for example. We may want to\n>>>>> consider this for all memory access built-ins.\n>>>>> \n>>>>> When -maltivec=be is specified, or the wrong number of arguments\n>>>>> is provided, simply punt to existing built-in processing. */\n>>>>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n>>>>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>>> - && nargs == 2)\n>>>>> - {\n>>>>> - tree arg0 = (*arglist)[0];\n>>>>> - tree arg1 = (*arglist)[1];\n>>>>> -\n>>>>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n>>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n>>>>> - goto bad;\n>>>>> -\n>>>>> - tree inner_type = TREE_TYPE (arg1_type);\n>>>>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n>>>>> - {\n>>>>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n>>>>> - 0));\n>>>>> - arg1 = fold_convert (arg1_type, arg1);\n>>>>> - }\n>>>>> -\n>>>>> - /* Construct the masked address. Let existing error handling take\n>>>>> - over if we don't have a constant offset. */\n>>>>> - arg0 = fold (arg0);\n>>>>> -\n>>>>> - if (TREE_CODE (arg0) == INTEGER_CST)\n>>>>> - {\n>>>>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n>>>>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n>>>>> -\n>>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n>>>>> - {\n>>>>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n>>>>> - tree const0 = build_int_cstu (sizetype, 0);\n>>>>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n>>>>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n>>>>> - }\n>>>>> -\n>>>>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n>>>>> - arg1, arg0);\n>>>>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n>>>>> - build_int_cst (arg1_type, -16));\n>>>>> -\n>>>>> - /* Find the built-in to get the return type so we can convert\n>>>>> - the result properly (or fall back to default handling if the\n>>>>> - arguments aren't compatible). */\n>>>>> - for (desc = altivec_overloaded_builtins;\n>>>>> - desc->code && desc->code != fcode; desc++)\n>>>>> - continue;\n>>>>> -\n>>>>> - for (; desc->code == fcode; desc++)\n>>>>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n>>>>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n>>>>> - desc->op2)))\n>>>>> - {\n>>>>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n>>>>> - if (TYPE_MODE (ret_type) == V2DImode)\n>>>>> - /* Type-based aliasing analysis thinks vector long\n>>>>> - and vector long long are different and will put them\n>>>>> - in distinct alias classes. Force our return type\n>>>>> - to be a may-alias type to avoid this. */\n>>>>> - ret_type\n>>>>> - = build_pointer_type_for_mode (ret_type, Pmode,\n>>>>> - true/*can_alias_all*/);\n>>>>> - else\n>>>>> - ret_type = build_pointer_type (ret_type);\n>>>>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n>>>>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n>>>>> - return ret_val;\n>>>>> - }\n>>>>> - }\n>>>>> - }\n>>>>> \n>>>>> - /* Similarly for stvx. */\n>>>>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n>>>>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>>> && nargs == 3)\n>>>>> {\n>>>>> tree arg0 = (*arglist)[0];\n>>>>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n>>>>> index 1338371..1fb5f44 100644\n>>>>> --- a/gcc/config/rs6000/rs6000.c\n>>>>> +++ b/gcc/config/rs6000/rs6000.c\n>>>>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n>>>>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n>>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>>> update_call_from_tree (gsi, res);\n>>>>> return true;\n>>>>> }\n>>>>> + /* Vector loads. */\n>>>>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n>>>>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n>>>>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n>>>>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n>>>>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n>>>>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n>>>>> + {\n>>>>> + gimple *g;\n>>>>> + arg0 = gimple_call_arg (stmt, 0); // offset\n>>>>> + arg1 = gimple_call_arg (stmt, 1); // address\n>>>>> +\n>>>>> + lhs = gimple_call_lhs (stmt);\n>>>>> + location_t loc = gimple_location (stmt);\n>>>>> +\n>>>>> + tree arg1_type = TREE_TYPE (arg1);\n>>>>> + tree lhs_type = TREE_TYPE (lhs);\n>>>>> +\n>>>>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n>>>>> + the tree using the value from arg0. The resulting type will match\n>>>>> + the type of arg1. */\n>>>>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n>>>>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n>>>>> + gimple_set_location (g, loc);\n>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n>>>>> + temp_offset);\n>>>>> + gimple_set_location (g, loc);\n>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>> +\n>>>>> + /* Mask off any lower bits from the address. */\n>>>>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n>>>>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n>>>>> + temp_addr, alignment_mask);\n>>>>> + gimple_set_location (g, loc);\n>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>> \n>>>> You could use\n>>>> \n>>>> gimple_seq stmts = NULL;\n>>>> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n>>>> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n>>>> arg1_type, arg1, temp_offset);\n>>>> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n>>>> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>> \n>>>>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n>>>>> + take an offset, but since we've already incorporated the offset\n>>>>> + above, here we just pass in a zero. */\n>>>>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n>>>>> + build_int_cst (arg1_type, 0)));\n>>>> \n>>>> are you sure about arg1_type here? I'm sure not. For\n>>>> \n>>>> ... foo (struct S *p)\n>>>> {\n>>>> return __builtin_lvx_v2df (4, (double *)p);\n>>>> }\n>>>> \n>>>> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n>>>> TBAA using 'struct S' to access the memory.\n>>> \n>>> Hm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\n>>> Will, you should probably test this example and see, but I'm pretty confident\n>>> about this (see below).\n>> \n>> But, as I should have suspected, you're right. For some reason\n>> gimple_call_arg is returning p, stripped of the cast information where the\n>> user asserted that p points to a double*.\n>> \n>> Can you explain to me why this should be so? I assume that somebody\n>> has decided to strip_nops the argument and lose the cast.\n> \n> pointer types have no meaning in GIMPLE so we aggressively prune them.\n> \n>> Using ptr_type_node loses all type information, so that would be a\n>> regression from what we do today. In some cases we could reconstruct\n>> that this was necessarily, say, a double*, but I don't know how we would\n>> recover the signedness for an integer type.\n> \n> How did we handle the expansion previously - ah - it was done earlier\n> in the C FE. So why are you moving it to GIMPLE? The function is called\n> resolve_overloaded_builtin - what kind of overloading do you resolve here?\n> As said argument types might not be preserved.\n\nThe AltiVec builtins allow overloaded names based on the argument types,\nusing a special callout during parsing to convert the overloaded names to\ntype-specific names. Historically these have then remained builtin calls\nuntil RTL expansion, which loses a lot of useful optimization. Will has been\ngradually implementing gimple folding for these builtins so that we can\noptimize simple vector arithmetic and so on. The overloading is still dealt\nwith during parsing.\n\nAs an example:\n\n double a[64];\n vector double x = vec_ld (0, a);\n\nwill get translated into\n\n vector double x = __builtin_altivec_lvx_v2df (0, a);\n\nand \n\n unsigned char b[64];\n vector unsigned char y = vec_ld (0, b);\n\nwill get translated into\n\n vector unsigned char y = __builtin_altivec_lvx_v16qi (0, b);\n\nSo in resolving the overloading we still maintain the type info for arg1.\n\nEarlier I had dealt with the performance issue in a different way for the \nvec_ld and vec_st overloaded builtins, which created the rather grotty \ncode in rs6000-c.c to modify the parse trees instead. My hope was that\nwe could simplify the code by having Will deal with them as gimple folds\ninstead. But if in so doing we lose type information, that may not be the\nright call.\n\nHowever, since you say that gimple aggressively removes the casts \nfrom pointer types, perhaps the code that we see in early gimple from\nthe existing method might also be missing the type information? Will,\nit would be worth looking at that code to see. If it's no different then\nperhaps we still go ahead with the folding.\n\nAnother note for Will: The existing code gives up when -maltivec=be has\nbeen specified, and you probably want to do that as well. That may be\nwhy you initially turned off big endian -- it is easy to misread that code.\n-maltivec=be is VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN.\n\nThanks,\nBill\n> \n> Richard.\n> \n>> Bill\n>>> \n>>>> \n>>>> I think if the builtins have any TBAA constraints you need to build those\n>>>> explicitely, if not, you should use ptr_type_node aka no TBAA.\n>>> \n>>> The type signatures are constrained during parsing, so we should only\n>>> see allowed pointer types on arg1 by the time we get to gimple folding. I\n>>> think that using arg1_type should work, but I am probably missing\n>>> something subtle, so please feel free to whack me on the temple until\n>>> I get it. :-)\n>>> \n>>> Bill\n>>>> \n>>>> Richard.\n>>>> \n>>>>> + gimple_set_location (g, loc);\n>>>>> + gsi_replace (gsi, g, true);\n>>>>> +\n>>>>> + return true;\n>>>>> +\n>>>>> + }\n>>>>> +\n>>>>> default:\n>>>>> if (TARGET_DEBUG_BUILTIN)\n>>>>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n>>>>> fn_code, fn_name1, fn_name2);\n>>>>> break;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462146-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"tYIQMvqD\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtLkJ61wGz9sPk\n\tfor ;\n\tFri, 15 Sep 2017 00:38:32 +1000 (AEST)","(qmail 121478 invoked by alias); 14 Sep 2017 14:38:24 -0000","(qmail 121410 invoked by uid 89); 14 Sep 2017 14:38:23 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tThu, 14 Sep 2017 14:38:20 +0000","from pps.filterd (m0098393.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8EEam30091862\tfor ;\n\tThu, 14 Sep 2017 10:38:19 -0400","from e37.co.us.ibm.com (e37.co.us.ibm.com [32.97.110.158])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cyrp06cy8-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tThu, 14 Sep 2017 10:38:18 -0400","from localhost\tby e37.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n> >>>>> comments have been adjusted slightly so they continue to read OK for the\n> >>>>> existing vec_st code.\n> >>>>> \n> >>>>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n> >>>>> tests which have been posted separately.\n> >>>>> \n> >>>>> For V2 of this patch, I've removed the chunk of code that prohibited the\n> >>>>> gimple fold from occurring in BE environments. This had fixed an issue\n> >>>>> for me earlier during my development of the code, and turns out this was\n> >>>>> not necessary. I've sniff-tested after removing that check and it looks\n> >>>>> OK.\n> >>>>> \n> >>>>>> + /* Limit folding of loads to LE targets. */\n> >>>>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n> >>>>>> + return false;\n> >>>>> \n> >>>>> I've restarted a regression test on this updated version.\n> >>>>> \n> >>>>> OK for trunk (assuming successful regression test completion) ?\n> >>>>> \n> >>>>> Thanks,\n> >>>>> -Will\n> >>>>> \n> >>>>> [gcc]\n> >>>>> \n> >>>>> 2017-09-12 Will Schmidt \n> >>>>> \n> >>>>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n> >>>>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n> >>>>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n> >>>>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n> >>>>> \n> >>>>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n> >>>>> index fbab0a2..bb8a77d 100644\n> >>>>> --- a/gcc/config/rs6000/rs6000-c.c\n> >>>>> +++ b/gcc/config/rs6000/rs6000-c.c\n> >>>>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n> >>>>> convert (TREE_TYPE (stmt), arg0));\n> >>>>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n> >>>>> return stmt;\n> >>>>> }\n> >>>>> \n> >>>>> - /* Expand vec_ld into an expression that masks the address and\n> >>>>> - performs the load. We need to expand this early to allow\n> >>>>> + /* Expand vec_st into an expression that masks the address and\n> >>>>> + performs the store. We need to expand this early to allow\n> >>>>> the best aliasing, as by the time we get into RTL we no longer\n> >>>>> are able to honor __restrict__, for example. We may want to\n> >>>>> consider this for all memory access built-ins.\n> >>>>> \n> >>>>> When -maltivec=be is specified, or the wrong number of arguments\n> >>>>> is provided, simply punt to existing built-in processing. */\n> >>>>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n> >>>>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> >>>>> - && nargs == 2)\n> >>>>> - {\n> >>>>> - tree arg0 = (*arglist)[0];\n> >>>>> - tree arg1 = (*arglist)[1];\n> >>>>> -\n> >>>>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n> >>>>> - tree arg1_type = TREE_TYPE (arg1);\n> >>>>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n> >>>>> - goto bad;\n> >>>>> -\n> >>>>> - tree inner_type = TREE_TYPE (arg1_type);\n> >>>>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n> >>>>> - {\n> >>>>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n> >>>>> - 0));\n> >>>>> - arg1 = fold_convert (arg1_type, arg1);\n> >>>>> - }\n> >>>>> -\n> >>>>> - /* Construct the masked address. Let existing error handling take\n> >>>>> - over if we don't have a constant offset. */\n> >>>>> - arg0 = fold (arg0);\n> >>>>> -\n> >>>>> - if (TREE_CODE (arg0) == INTEGER_CST)\n> >>>>> - {\n> >>>>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n> >>>>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n> >>>>> -\n> >>>>> - tree arg1_type = TREE_TYPE (arg1);\n> >>>>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n> >>>>> - {\n> >>>>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n> >>>>> - tree const0 = build_int_cstu (sizetype, 0);\n> >>>>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n> >>>>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n> >>>>> - }\n> >>>>> -\n> >>>>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n> >>>>> - arg1, arg0);\n> >>>>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n> >>>>> - build_int_cst (arg1_type, -16));\n> >>>>> -\n> >>>>> - /* Find the built-in to get the return type so we can convert\n> >>>>> - the result properly (or fall back to default handling if the\n> >>>>> - arguments aren't compatible). */\n> >>>>> - for (desc = altivec_overloaded_builtins;\n> >>>>> - desc->code && desc->code != fcode; desc++)\n> >>>>> - continue;\n> >>>>> -\n> >>>>> - for (; desc->code == fcode; desc++)\n> >>>>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n> >>>>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n> >>>>> - desc->op2)))\n> >>>>> - {\n> >>>>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n> >>>>> - if (TYPE_MODE (ret_type) == V2DImode)\n> >>>>> - /* Type-based aliasing analysis thinks vector long\n> >>>>> - and vector long long are different and will put them\n> >>>>> - in distinct alias classes. Force our return type\n> >>>>> - to be a may-alias type to avoid this. */\n> >>>>> - ret_type\n> >>>>> - = build_pointer_type_for_mode (ret_type, Pmode,\n> >>>>> - true/*can_alias_all*/);\n> >>>>> - else\n> >>>>> - ret_type = build_pointer_type (ret_type);\n> >>>>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n> >>>>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n> >>>>> - return ret_val;\n> >>>>> - }\n> >>>>> - }\n> >>>>> - }\n> >>>>> \n> >>>>> - /* Similarly for stvx. */\n> >>>>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n> >>>>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n> >>>>> && nargs == 3)\n> >>>>> {\n> >>>>> tree arg0 = (*arglist)[0];\n> >>>>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n> >>>>> index 1338371..1fb5f44 100644\n> >>>>> --- a/gcc/config/rs6000/rs6000.c\n> >>>>> +++ b/gcc/config/rs6000/rs6000.c\n> >>>>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n> >>>>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n> >>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> >>>>> update_call_from_tree (gsi, res);\n> >>>>> return true;\n> >>>>> }\n> >>>>> + /* Vector loads. */\n> >>>>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n> >>>>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n> >>>>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n> >>>>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n> >>>>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n> >>>>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n> >>>>> + {\n> >>>>> + gimple *g;\n> >>>>> + arg0 = gimple_call_arg (stmt, 0); // offset\n> >>>>> + arg1 = gimple_call_arg (stmt, 1); // address\n> >>>>> +\n> >>>>> + lhs = gimple_call_lhs (stmt);\n> >>>>> + location_t loc = gimple_location (stmt);\n> >>>>> +\n> >>>>> + tree arg1_type = TREE_TYPE (arg1);\n> >>>>> + tree lhs_type = TREE_TYPE (lhs);\n> >>>>> +\n> >>>>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n> >>>>> + the tree using the value from arg0. The resulting type will match\n> >>>>> + the type of arg1. */\n> >>>>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n> >>>>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n> >>>>> + gimple_set_location (g, loc);\n> >>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> >>>>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> >>>>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n> >>>>> + temp_offset);\n> >>>>> + gimple_set_location (g, loc);\n> >>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> >>>>> +\n> >>>>> + /* Mask off any lower bits from the address. */\n> >>>>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n> >>>>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n> >>>>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n> >>>>> + temp_addr, alignment_mask);\n> >>>>> + gimple_set_location (g, loc);\n> >>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n> >>>> \n> >>>> You could use\n> >>>> \n> >>>> gimple_seq stmts = NULL;\n> >>>> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n> >>>> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n> >>>> arg1_type, arg1, temp_offset);\n> >>>> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n> >>>> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n> >>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n> >>>> \n> >>>>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n> >>>>> + take an offset, but since we've already incorporated the offset\n> >>>>> + above, here we just pass in a zero. */\n> >>>>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n> >>>>> + build_int_cst (arg1_type, 0)));\n> >>>> \n> >>>> are you sure about arg1_type here? I'm sure not. For\n> >>>> \n> >>>> ... foo (struct S *p)\n> >>>> {\n> >>>> return __builtin_lvx_v2df (4, (double *)p);\n> >>>> }\n> >>>> \n> >>>> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n> >>>> TBAA using 'struct S' to access the memory.\n> >>> \n> >>> Hm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\n> >>> Will, you should probably test this example and see, but I'm pretty confident\n> >>> about this (see below).\n> >> \n> >> But, as I should have suspected, you're right. For some reason\n> >> gimple_call_arg is returning p, stripped of the cast information where the\n> >> user asserted that p points to a double*.\n> >> \n> >> Can you explain to me why this should be so? I assume that somebody\n> >> has decided to strip_nops the argument and lose the cast.\n> > \n> > pointer types have no meaning in GIMPLE so we aggressively prune them.\n> > \n> >> Using ptr_type_node loses all type information, so that would be a\n> >> regression from what we do today. In some cases we could reconstruct\n> >> that this was necessarily, say, a double*, but I don't know how we would\n> >> recover the signedness for an integer type.\n> > \n> > How did we handle the expansion previously - ah - it was done earlier\n> > in the C FE. So why are you moving it to GIMPLE? The function is called\n> > resolve_overloaded_builtin - what kind of overloading do you resolve here?\n> > As said argument types might not be preserved.\n> \n> The AltiVec builtins allow overloaded names based on the argument types,\n> using a special callout during parsing to convert the overloaded names to\n> type-specific names. Historically these have then remained builtin calls\n> until RTL expansion, which loses a lot of useful optimization. Will has been\n> gradually implementing gimple folding for these builtins so that we can\n> optimize simple vector arithmetic and so on. The overloading is still dealt\n> with during parsing.\n> \n> As an example:\n> \n> double a[64];\n> vector double x = vec_ld (0, a);\n> \n> will get translated into\n> \n> vector double x = __builtin_altivec_lvx_v2df (0, a);\n> \n> and \n> \n> unsigned char b[64];\n> vector unsigned char y = vec_ld (0, b);\n> \n> will get translated into\n> \n> vector unsigned char y = __builtin_altivec_lvx_v16qi (0, b);\n> \n> So in resolving the overloading we still maintain the type info for arg1.\n> \n> Earlier I had dealt with the performance issue in a different way for the \n> vec_ld and vec_st overloaded builtins, which created the rather grotty \n> code in rs6000-c.c to modify the parse trees instead. My hope was that\n> we could simplify the code by having Will deal with them as gimple folds\n> instead. But if in so doing we lose type information, that may not be the\n> right call.\n> \n> However, since you say that gimple aggressively removes the casts \n> from pointer types, perhaps the code that we see in early gimple from\n> the existing method might also be missing the type information? Will,\n> it would be worth looking at that code to see. If it's no different then\n> perhaps we still go ahead with the folding.\n\nThe rs6000-c.c version of the code did not fold unless arg0 was\nconstant; and if it was a constant, it appears the operation got turned\ndirectly into a * reference. So there isn't a good before/after compare\nthere.\n\nWhat I see:\n\t return vec_ld (ll1, (vector double *)p);\n\nat gimple-time after the rs6000-c.c folding was a mostly un-folded \n\n D.3207 = __builtin_altivec_lvx_v2dfD.1443 (ll1D.3192, pD.3193);\n\nwhile this, with a constant value for arg0:\n\treturn vec_ld (16, (vector double *)p);\nat gimple time after rs6000-c.c folding became a reference:\n _1 = p + 16;\n _2 = _1 & -16B;\n D.3196 = *_2;\n\nwith the rs6000.c gimple folding code (the changes I've got locally),\nthe before/after with arg0 is constant reads the same. When arg0 is a\nvariable:\n\t return vec_ld (ll1, (vector double *)p);\nat dump-gimple time it then becomes:\n D.3208 = (sizetype) ll1D.3192;\n D.3209 = pD.3193 + D.3208;\n D.3210 = D.3209 & -16B;\n D.3207 = MEM[(struct S *)D.3210];\n\nAnd if I change the code such that arg1_type is instead ptr_type_node:\n D.3207 = MEM[(voidD.44 *)D.3210];\n\nSo... \n\n> Another note for Will: The existing code gives up when -maltivec=be has\n> been specified, and you probably want to do that as well. That may be\n> why you initially turned off big endian -- it is easy to misread that code.\n> -maltivec=be is VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN.\n\nYeah, I apparently inverted and confused the logic when I made that\nchange. My current snippet reads as:\n\n /* Do not fold for -maltivec=be on LE targets. */\n if (VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN)\n return false;\n\n\n> Thanks,\n> Bill\n> > \n> > Richard.\n> > \n> >> Bill\n> >>> \n> >>>> \n> >>>> I think if the builtins have any TBAA constraints you need to build those\n> >>>> explicitely, if not, you should use ptr_type_node aka no TBAA.\n> >>> \n> >>> The type signatures are constrained during parsing, so we should only\n> >>> see allowed pointer types on arg1 by the time we get to gimple folding. I\n> >>> think that using arg1_type should work, but I am probably missing\n> >>> something subtle, so please feel free to whack me on the temple until\n> >>> I get it. :-)\n> >>> \n> >>> Bill\n> >>>> \n> >>>> Richard.\n> >>>> \n> >>>>> + gimple_set_location (g, loc);\n> >>>>> + gsi_replace (gsi, g, true);\n> >>>>> +\n> >>>>> + return true;\n> >>>>> +\n> >>>>> + }\n> >>>>> +\n> >>>>> default:\n> >>>>> if (TARGET_DEBUG_BUILTIN)\n> >>>>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n> >>>>> fn_code, fn_name1, fn_name2);\n> >>>>> break;\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462178-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"xUdqtImq\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtW0n0VQ0z9s82\n\tfor ;\n\tFri, 15 Sep 2017 06:51:35 +1000 (AEST)","(qmail 39562 invoked by alias); 14 Sep 2017 20:51:21 -0000","(qmail 39503 invoked by uid 89); 14 Sep 2017 20:51:21 -0000","from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.158.5) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tThu, 14 Sep 2017 20:51:18 +0000","from pps.filterd (m0098413.ppops.net [127.0.0.1])\tby\n\tmx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8EKnRM5116274\tfor ;\n\tThu, 14 Sep 2017 16:51:16 -0400","from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150])\tby\n\tmx0b-001b2d01.pphosted.com with ESMTP id\n\t2cyuy185qv-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tThu, 14 Sep 2017 16:51:16 -0400","from localhost\tby e32.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\n>>>>>> comments have been adjusted slightly so they continue to read OK for the\n>>>>>> existing vec_st code.\n>>>>>>\n>>>>>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n>>>>>> tests which have been posted separately.\n>>>>>>\n>>>>>> For V2 of this patch, I've removed the chunk of code that prohibited the\n>>>>>> gimple fold from occurring in BE environments. This had fixed an issue\n>>>>>> for me earlier during my development of the code, and turns out this was\n>>>>>> not necessary. I've sniff-tested after removing that check and it looks\n>>>>>> OK.\n>>>>>>\n>>>>>>> + /* Limit folding of loads to LE targets. */\n>>>>>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>>>>>>> + return false;\n>>>>>>\n>>>>>> I've restarted a regression test on this updated version.\n>>>>>>\n>>>>>> OK for trunk (assuming successful regression test completion) ?\n>>>>>>\n>>>>>> Thanks,\n>>>>>> -Will\n>>>>>>\n>>>>>> [gcc]\n>>>>>>\n>>>>>> 2017-09-12 Will Schmidt \n>>>>>>\n>>>>>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n>>>>>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n>>>>>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n>>>>>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>>>>>>\n>>>>>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n>>>>>> index fbab0a2..bb8a77d 100644\n>>>>>> --- a/gcc/config/rs6000/rs6000-c.c\n>>>>>> +++ b/gcc/config/rs6000/rs6000-c.c\n>>>>>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n>>>>>> convert (TREE_TYPE (stmt), arg0));\n>>>>>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n>>>>>> return stmt;\n>>>>>> }\n>>>>>>\n>>>>>> - /* Expand vec_ld into an expression that masks the address and\n>>>>>> - performs the load. We need to expand this early to allow\n>>>>>> + /* Expand vec_st into an expression that masks the address and\n>>>>>> + performs the store. We need to expand this early to allow\n>>>>>> the best aliasing, as by the time we get into RTL we no longer\n>>>>>> are able to honor __restrict__, for example. We may want to\n>>>>>> consider this for all memory access built-ins.\n>>>>>>\n>>>>>> When -maltivec=be is specified, or the wrong number of arguments\n>>>>>> is provided, simply punt to existing built-in processing. */\n>>>>>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n>>>>>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>>>> - && nargs == 2)\n>>>>>> - {\n>>>>>> - tree arg0 = (*arglist)[0];\n>>>>>> - tree arg1 = (*arglist)[1];\n>>>>>> -\n>>>>>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n>>>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>>>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n>>>>>> - goto bad;\n>>>>>> -\n>>>>>> - tree inner_type = TREE_TYPE (arg1_type);\n>>>>>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n>>>>>> - {\n>>>>>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n>>>>>> - 0));\n>>>>>> - arg1 = fold_convert (arg1_type, arg1);\n>>>>>> - }\n>>>>>> -\n>>>>>> - /* Construct the masked address. Let existing error handling take\n>>>>>> - over if we don't have a constant offset. */\n>>>>>> - arg0 = fold (arg0);\n>>>>>> -\n>>>>>> - if (TREE_CODE (arg0) == INTEGER_CST)\n>>>>>> - {\n>>>>>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n>>>>>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n>>>>>> -\n>>>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>>>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n>>>>>> - {\n>>>>>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n>>>>>> - tree const0 = build_int_cstu (sizetype, 0);\n>>>>>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n>>>>>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n>>>>>> - }\n>>>>>> -\n>>>>>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n>>>>>> - arg1, arg0);\n>>>>>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n>>>>>> - build_int_cst (arg1_type, -16));\n>>>>>> -\n>>>>>> - /* Find the built-in to get the return type so we can convert\n>>>>>> - the result properly (or fall back to default handling if the\n>>>>>> - arguments aren't compatible). */\n>>>>>> - for (desc = altivec_overloaded_builtins;\n>>>>>> - desc->code && desc->code != fcode; desc++)\n>>>>>> - continue;\n>>>>>> -\n>>>>>> - for (; desc->code == fcode; desc++)\n>>>>>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n>>>>>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n>>>>>> - desc->op2)))\n>>>>>> - {\n>>>>>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n>>>>>> - if (TYPE_MODE (ret_type) == V2DImode)\n>>>>>> - /* Type-based aliasing analysis thinks vector long\n>>>>>> - and vector long long are different and will put them\n>>>>>> - in distinct alias classes. Force our return type\n>>>>>> - to be a may-alias type to avoid this. */\n>>>>>> - ret_type\n>>>>>> - = build_pointer_type_for_mode (ret_type, Pmode,\n>>>>>> - true/*can_alias_all*/);\n>>>>>> - else\n>>>>>> - ret_type = build_pointer_type (ret_type);\n>>>>>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n>>>>>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n>>>>>> - return ret_val;\n>>>>>> - }\n>>>>>> - }\n>>>>>> - }\n>>>>>>\n>>>>>> - /* Similarly for stvx. */\n>>>>>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n>>>>>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>>>> && nargs == 3)\n>>>>>> {\n>>>>>> tree arg0 = (*arglist)[0];\n>>>>>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n>>>>>> index 1338371..1fb5f44 100644\n>>>>>> --- a/gcc/config/rs6000/rs6000.c\n>>>>>> +++ b/gcc/config/rs6000/rs6000.c\n>>>>>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n>>>>>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n>>>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>>>> update_call_from_tree (gsi, res);\n>>>>>> return true;\n>>>>>> }\n>>>>>> + /* Vector loads. */\n>>>>>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n>>>>>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n>>>>>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n>>>>>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n>>>>>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n>>>>>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n>>>>>> + {\n>>>>>> + gimple *g;\n>>>>>> + arg0 = gimple_call_arg (stmt, 0); // offset\n>>>>>> + arg1 = gimple_call_arg (stmt, 1); // address\n>>>>>> +\n>>>>>> + lhs = gimple_call_lhs (stmt);\n>>>>>> + location_t loc = gimple_location (stmt);\n>>>>>> +\n>>>>>> + tree arg1_type = TREE_TYPE (arg1);\n>>>>>> + tree lhs_type = TREE_TYPE (lhs);\n>>>>>> +\n>>>>>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n>>>>>> + the tree using the value from arg0. The resulting type will match\n>>>>>> + the type of arg1. */\n>>>>>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n>>>>>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n>>>>>> + gimple_set_location (g, loc);\n>>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>>>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n>>>>>> + temp_offset);\n>>>>>> + gimple_set_location (g, loc);\n>>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>>> +\n>>>>>> + /* Mask off any lower bits from the address. */\n>>>>>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n>>>>>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>>>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n>>>>>> + temp_addr, alignment_mask);\n>>>>>> + gimple_set_location (g, loc);\n>>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>>\n>>>>> You could use\n>>>>>\n>>>>> gimple_seq stmts = NULL;\n>>>>> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n>>>>> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n>>>>> arg1_type, arg1, temp_offset);\n>>>>> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n>>>>> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n>>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>>>\n>>>>>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n>>>>>> + take an offset, but since we've already incorporated the offset\n>>>>>> + above, here we just pass in a zero. */\n>>>>>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n>>>>>> + build_int_cst (arg1_type, 0)));\n>>>>>\n>>>>> are you sure about arg1_type here? I'm sure not. For\n>>>>>\n>>>>> ... foo (struct S *p)\n>>>>> {\n>>>>> return __builtin_lvx_v2df (4, (double *)p);\n>>>>> }\n>>>>>\n>>>>> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n>>>>> TBAA using 'struct S' to access the memory.\n>>>>\n>>>> Hm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\n>>>> Will, you should probably test this example and see, but I'm pretty confident\n>>>> about this (see below).\n>>>\n>>> But, as I should have suspected, you're right. For some reason\n>>> gimple_call_arg is returning p, stripped of the cast information where the\n>>> user asserted that p points to a double*.\n>>>\n>>> Can you explain to me why this should be so? I assume that somebody\n>>> has decided to strip_nops the argument and lose the cast.\n>>\n>> pointer types have no meaning in GIMPLE so we aggressively prune them.\n>>\n>>> Using ptr_type_node loses all type information, so that would be a\n>>> regression from what we do today. In some cases we could reconstruct\n>>> that this was necessarily, say, a double*, but I don't know how we would\n>>> recover the signedness for an integer type.\n>>\n>> How did we handle the expansion previously - ah - it was done earlier\n>> in the C FE. So why are you moving it to GIMPLE? The function is called\n>> resolve_overloaded_builtin - what kind of overloading do you resolve here?\n>> As said argument types might not be preserved.\n>\n> The AltiVec builtins allow overloaded names based on the argument types,\n> using a special callout during parsing to convert the overloaded names to\n> type-specific names. Historically these have then remained builtin calls\n> until RTL expansion, which loses a lot of useful optimization. Will has been\n> gradually implementing gimple folding for these builtins so that we can\n> optimize simple vector arithmetic and so on. The overloading is still dealt\n> with during parsing.\n>\n> As an example:\n>\n> double a[64];\n> vector double x = vec_ld (0, a);\n>\n> will get translated into\n>\n> vector double x = __builtin_altivec_lvx_v2df (0, a);\n>\n> and\n>\n> unsigned char b[64];\n> vector unsigned char y = vec_ld (0, b);\n>\n> will get translated into\n>\n> vector unsigned char y = __builtin_altivec_lvx_v16qi (0, b);\n>\n> So in resolving the overloading we still maintain the type info for arg1.\n\nSo TBAA-wise the vec_ld is specced to use alias-set zero for this case\nas it loads from a unsinged char array? Or is it alias-set zero because\nthe type of arg1 is unsigned char *? What if the type of arg1 was\nstruct X *?\n\n> Earlier I had dealt with the performance issue in a different way for the\n> vec_ld and vec_st overloaded builtins, which created the rather grotty\n> code in rs6000-c.c to modify the parse trees instead. My hope was that\n> we could simplify the code by having Will deal with them as gimple folds\n> instead. But if in so doing we lose type information, that may not be the\n> right call.\n>\n> However, since you say that gimple aggressively removes the casts\n> from pointer types, perhaps the code that we see in early gimple from\n> the existing method might also be missing the type information? Will,\n> it would be worth looking at that code to see. If it's no different then\n> perhaps we still go ahead with the folding.\n\nAs I said you can't simply use the type of arg1 for the TBAA type.\nYou can conservatively use ptr_type_node (alias-set zero) or you\ncan use sth that you derive from the builtin used (is a supposedly\nexisting _v4si variant always subject to int * TBAA?)\n\n> Another note for Will: The existing code gives up when -maltivec=be has\n> been specified, and you probably want to do that as well. That may be\n> why you initially turned off big endian -- it is easy to misread that code.\n> -maltivec=be is VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN.\n>\n> Thanks,\n> Bill\n>>\n>> Richard.\n>>\n>>> Bill\n>>>>\n>>>>>\n>>>>> I think if the builtins have any TBAA constraints you need to build those\n>>>>> explicitely, if not, you should use ptr_type_node aka no TBAA.\n>>>>\n>>>> The type signatures are constrained during parsing, so we should only\n>>>> see allowed pointer types on arg1 by the time we get to gimple folding. I\n>>>> think that using arg1_type should work, but I am probably missing\n>>>> something subtle, so please feel free to whack me on the temple until\n>>>> I get it. :-)\n>>>>\n>>>> Bill\n>>>>>\n>>>>> Richard.\n>>>>>\n>>>>>> + gimple_set_location (g, loc);\n>>>>>> + gsi_replace (gsi, g, true);\n>>>>>> +\n>>>>>> + return true;\n>>>>>> +\n>>>>>> + }\n>>>>>> +\n>>>>>> default:\n>>>>>> if (TARGET_DEBUG_BUILTIN)\n>>>>>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n>>>>>> fn_code, fn_name1, fn_name2);\n>>>>>> break;\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462207-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"vh7QDN3N\"; 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charset=\"UTF-8\"","X-IsSubscribed":"yes"}},{"id":1769177,"web_url":"http://patchwork.ozlabs.org/comment/1769177/","msgid":"<0B9CF26C-8F9E-4C4E-8F42-50B99DA3D7B8@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-15T13:16:45","subject":"Re: [PATCH, rs6000] [v2] Folding of vector loads in GIMPLE","submitter":{"id":6459,"url":"http://patchwork.ozlabs.org/api/people/6459/","name":"Bill Schmidt","email":"wschmidt@linux.vnet.ibm.com"},"content":"On Sep 15, 2017, at 4:13 AM, Richard Biener wrote:\n> \n> On Thu, Sep 14, 2017 at 4:38 PM, Bill Schmidt\n> wrote:\n>> On Sep 14, 2017, at 5:15 AM, Richard Biener wrote:\n>>> \n>>> On Wed, Sep 13, 2017 at 10:14 PM, Bill Schmidt\n>>> wrote:\n>>>> On Sep 13, 2017, at 10:40 AM, Bill Schmidt wrote:\n>>>>> \n>>>>> On Sep 13, 2017, at 7:23 AM, Richard Biener wrote:\n>>>>>> \n>>>>>> On Tue, Sep 12, 2017 at 11:08 PM, Will Schmidt\n>>>>>> wrote:\n>>>>>>> Hi,\n>>>>>>> \n>>>>>>> [PATCH, rs6000] [v2] Folding of vector loads in GIMPLE\n>>>>>>> \n>>>>>>> Folding of vector loads in GIMPLE.\n>>>>>>> \n>>>>>>> Add code to handle gimple folding for the vec_ld builtins.\n>>>>>>> Remove the now obsoleted folding code for vec_ld from rs6000-c.c. Surrounding\n>>>>>>> comments have been adjusted slightly so they continue to read OK for the\n>>>>>>> existing vec_st code.\n>>>>>>> \n>>>>>>> The resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\n>>>>>>> tests which have been posted separately.\n>>>>>>> \n>>>>>>> For V2 of this patch, I've removed the chunk of code that prohibited the\n>>>>>>> gimple fold from occurring in BE environments. This had fixed an issue\n>>>>>>> for me earlier during my development of the code, and turns out this was\n>>>>>>> not necessary. I've sniff-tested after removing that check and it looks\n>>>>>>> OK.\n>>>>>>> \n>>>>>>>> + /* Limit folding of loads to LE targets. */\n>>>>>>>> + if (BYTES_BIG_ENDIAN || VECTOR_ELT_ORDER_BIG)\n>>>>>>>> + return false;\n>>>>>>> \n>>>>>>> I've restarted a regression test on this updated version.\n>>>>>>> \n>>>>>>> OK for trunk (assuming successful regression test completion) ?\n>>>>>>> \n>>>>>>> Thanks,\n>>>>>>> -Will\n>>>>>>> \n>>>>>>> [gcc]\n>>>>>>> \n>>>>>>> 2017-09-12 Will Schmidt \n>>>>>>> \n>>>>>>> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n>>>>>>> for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n>>>>>>> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n>>>>>>> Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.\n>>>>>>> \n>>>>>>> diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\n>>>>>>> index fbab0a2..bb8a77d 100644\n>>>>>>> --- a/gcc/config/rs6000/rs6000-c.c\n>>>>>>> +++ b/gcc/config/rs6000/rs6000-c.c\n>>>>>>> @@ -6470,92 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n>>>>>>> convert (TREE_TYPE (stmt), arg0));\n>>>>>>> stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n>>>>>>> return stmt;\n>>>>>>> }\n>>>>>>> \n>>>>>>> - /* Expand vec_ld into an expression that masks the address and\n>>>>>>> - performs the load. We need to expand this early to allow\n>>>>>>> + /* Expand vec_st into an expression that masks the address and\n>>>>>>> + performs the store. We need to expand this early to allow\n>>>>>>> the best aliasing, as by the time we get into RTL we no longer\n>>>>>>> are able to honor __restrict__, for example. We may want to\n>>>>>>> consider this for all memory access built-ins.\n>>>>>>> \n>>>>>>> When -maltivec=be is specified, or the wrong number of arguments\n>>>>>>> is provided, simply punt to existing built-in processing. */\n>>>>>>> - if (fcode == ALTIVEC_BUILTIN_VEC_LD\n>>>>>>> - && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>>>>> - && nargs == 2)\n>>>>>>> - {\n>>>>>>> - tree arg0 = (*arglist)[0];\n>>>>>>> - tree arg1 = (*arglist)[1];\n>>>>>>> -\n>>>>>>> - /* Strip qualifiers like \"const\" from the pointer arg. */\n>>>>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>>>>> - if (!POINTER_TYPE_P (arg1_type) && TREE_CODE (arg1_type) != ARRAY_TYPE)\n>>>>>>> - goto bad;\n>>>>>>> -\n>>>>>>> - tree inner_type = TREE_TYPE (arg1_type);\n>>>>>>> - if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n>>>>>>> - {\n>>>>>>> - arg1_type = build_pointer_type (build_qualified_type (inner_type,\n>>>>>>> - 0));\n>>>>>>> - arg1 = fold_convert (arg1_type, arg1);\n>>>>>>> - }\n>>>>>>> -\n>>>>>>> - /* Construct the masked address. Let existing error handling take\n>>>>>>> - over if we don't have a constant offset. */\n>>>>>>> - arg0 = fold (arg0);\n>>>>>>> -\n>>>>>>> - if (TREE_CODE (arg0) == INTEGER_CST)\n>>>>>>> - {\n>>>>>>> - if (!ptrofftype_p (TREE_TYPE (arg0)))\n>>>>>>> - arg0 = build1 (NOP_EXPR, sizetype, arg0);\n>>>>>>> -\n>>>>>>> - tree arg1_type = TREE_TYPE (arg1);\n>>>>>>> - if (TREE_CODE (arg1_type) == ARRAY_TYPE)\n>>>>>>> - {\n>>>>>>> - arg1_type = TYPE_POINTER_TO (TREE_TYPE (arg1_type));\n>>>>>>> - tree const0 = build_int_cstu (sizetype, 0);\n>>>>>>> - tree arg1_elt0 = build_array_ref (loc, arg1, const0);\n>>>>>>> - arg1 = build1 (ADDR_EXPR, arg1_type, arg1_elt0);\n>>>>>>> - }\n>>>>>>> -\n>>>>>>> - tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n>>>>>>> - arg1, arg0);\n>>>>>>> - tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n>>>>>>> - build_int_cst (arg1_type, -16));\n>>>>>>> -\n>>>>>>> - /* Find the built-in to get the return type so we can convert\n>>>>>>> - the result properly (or fall back to default handling if the\n>>>>>>> - arguments aren't compatible). */\n>>>>>>> - for (desc = altivec_overloaded_builtins;\n>>>>>>> - desc->code && desc->code != fcode; desc++)\n>>>>>>> - continue;\n>>>>>>> -\n>>>>>>> - for (; desc->code == fcode; desc++)\n>>>>>>> - if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n>>>>>>> - && (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n>>>>>>> - desc->op2)))\n>>>>>>> - {\n>>>>>>> - tree ret_type = rs6000_builtin_type (desc->ret_type);\n>>>>>>> - if (TYPE_MODE (ret_type) == V2DImode)\n>>>>>>> - /* Type-based aliasing analysis thinks vector long\n>>>>>>> - and vector long long are different and will put them\n>>>>>>> - in distinct alias classes. Force our return type\n>>>>>>> - to be a may-alias type to avoid this. */\n>>>>>>> - ret_type\n>>>>>>> - = build_pointer_type_for_mode (ret_type, Pmode,\n>>>>>>> - true/*can_alias_all*/);\n>>>>>>> - else\n>>>>>>> - ret_type = build_pointer_type (ret_type);\n>>>>>>> - aligned = build1 (NOP_EXPR, ret_type, aligned);\n>>>>>>> - tree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n>>>>>>> - return ret_val;\n>>>>>>> - }\n>>>>>>> - }\n>>>>>>> - }\n>>>>>>> \n>>>>>>> - /* Similarly for stvx. */\n>>>>>>> if (fcode == ALTIVEC_BUILTIN_VEC_ST\n>>>>>>> && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n>>>>>>> && nargs == 3)\n>>>>>>> {\n>>>>>>> tree arg0 = (*arglist)[0];\n>>>>>>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\n>>>>>>> index 1338371..1fb5f44 100644\n>>>>>>> --- a/gcc/config/rs6000/rs6000.c\n>>>>>>> +++ b/gcc/config/rs6000/rs6000.c\n>>>>>>> @@ -16547,10 +16547,61 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n>>>>>>> res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n>>>>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>>>>> update_call_from_tree (gsi, res);\n>>>>>>> return true;\n>>>>>>> }\n>>>>>>> + /* Vector loads. */\n>>>>>>> + case ALTIVEC_BUILTIN_LVX_V16QI:\n>>>>>>> + case ALTIVEC_BUILTIN_LVX_V8HI:\n>>>>>>> + case ALTIVEC_BUILTIN_LVX_V4SI:\n>>>>>>> + case ALTIVEC_BUILTIN_LVX_V4SF:\n>>>>>>> + case ALTIVEC_BUILTIN_LVX_V2DI:\n>>>>>>> + case ALTIVEC_BUILTIN_LVX_V2DF:\n>>>>>>> + {\n>>>>>>> + gimple *g;\n>>>>>>> + arg0 = gimple_call_arg (stmt, 0); // offset\n>>>>>>> + arg1 = gimple_call_arg (stmt, 1); // address\n>>>>>>> +\n>>>>>>> + lhs = gimple_call_lhs (stmt);\n>>>>>>> + location_t loc = gimple_location (stmt);\n>>>>>>> +\n>>>>>>> + tree arg1_type = TREE_TYPE (arg1);\n>>>>>>> + tree lhs_type = TREE_TYPE (lhs);\n>>>>>>> +\n>>>>>>> + /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n>>>>>>> + the tree using the value from arg0. The resulting type will match\n>>>>>>> + the type of arg1. */\n>>>>>>> + tree temp_offset = create_tmp_reg_or_ssa_name (sizetype);\n>>>>>>> + g = gimple_build_assign (temp_offset, NOP_EXPR, arg0);\n>>>>>>> + gimple_set_location (g, loc);\n>>>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>>>> + tree temp_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>>>>> + g = gimple_build_assign (temp_addr, POINTER_PLUS_EXPR, arg1,\n>>>>>>> + temp_offset);\n>>>>>>> + gimple_set_location (g, loc);\n>>>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>>>> +\n>>>>>>> + /* Mask off any lower bits from the address. */\n>>>>>>> + tree alignment_mask = build_int_cst (arg1_type, -16);\n>>>>>>> + tree aligned_addr = create_tmp_reg_or_ssa_name (arg1_type);\n>>>>>>> + g = gimple_build_assign (aligned_addr, BIT_AND_EXPR,\n>>>>>>> + temp_addr, alignment_mask);\n>>>>>>> + gimple_set_location (g, loc);\n>>>>>>> + gsi_insert_before (gsi, g, GSI_SAME_STMT);\n>>>>>> \n>>>>>> You could use\n>>>>>> \n>>>>>> gimple_seq stmts = NULL;\n>>>>>> tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n>>>>>> tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n>>>>>> arg1_type, arg1, temp_offset);\n>>>>>> tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n>>>>>> arg1_type, temp_addr, build_int_cst (arg1_type, -16));\n>>>>>> gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n>>>>>> \n>>>>>>> + /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n>>>>>>> + take an offset, but since we've already incorporated the offset\n>>>>>>> + above, here we just pass in a zero. */\n>>>>>>> + g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n>>>>>>> + build_int_cst (arg1_type, 0)));\n>>>>>> \n>>>>>> are you sure about arg1_type here? I'm sure not. For\n>>>>>> \n>>>>>> ... foo (struct S *p)\n>>>>>> {\n>>>>>> return __builtin_lvx_v2df (4, (double *)p);\n>>>>>> }\n>>>>>> \n>>>>>> you'd end up with p as arg1 and thus struct S * as arg1_type and thus\n>>>>>> TBAA using 'struct S' to access the memory.\n>>>>> \n>>>>> Hm, is that so? Wouldn't arg1_type be double* since arg1 is (double *)p?\n>>>>> Will, you should probably test this example and see, but I'm pretty confident\n>>>>> about this (see below).\n>>>> \n>>>> But, as I should have suspected, you're right. For some reason\n>>>> gimple_call_arg is returning p, stripped of the cast information where the\n>>>> user asserted that p points to a double*.\n>>>> \n>>>> Can you explain to me why this should be so? I assume that somebody\n>>>> has decided to strip_nops the argument and lose the cast.\n>>> \n>>> pointer types have no meaning in GIMPLE so we aggressively prune them.\n>>> \n>>>> Using ptr_type_node loses all type information, so that would be a\n>>>> regression from what we do today. In some cases we could reconstruct\n>>>> that this was necessarily, say, a double*, but I don't know how we would\n>>>> recover the signedness for an integer type.\n>>> \n>>> How did we handle the expansion previously - ah - it was done earlier\n>>> in the C FE. So why are you moving it to GIMPLE? The function is called\n>>> resolve_overloaded_builtin - what kind of overloading do you resolve here?\n>>> As said argument types might not be preserved.\n>> \n>> The AltiVec builtins allow overloaded names based on the argument types,\n>> using a special callout during parsing to convert the overloaded names to\n>> type-specific names. Historically these have then remained builtin calls\n>> until RTL expansion, which loses a lot of useful optimization. Will has been\n>> gradually implementing gimple folding for these builtins so that we can\n>> optimize simple vector arithmetic and so on. The overloading is still dealt\n>> with during parsing.\n>> \n>> As an example:\n>> \n>> double a[64];\n>> vector double x = vec_ld (0, a);\n>> \n>> will get translated into\n>> \n>> vector double x = __builtin_altivec_lvx_v2df (0, a);\n>> \n>> and\n>> \n>> unsigned char b[64];\n>> vector unsigned char y = vec_ld (0, b);\n>> \n>> will get translated into\n>> \n>> vector unsigned char y = __builtin_altivec_lvx_v16qi (0, b);\n>> \n>> So in resolving the overloading we still maintain the type info for arg1.\n> \n> So TBAA-wise the vec_ld is specced to use alias-set zero for this case\n> as it loads from a unsinged char array? Or is it alias-set zero because\n> the type of arg1 is unsigned char *? What if the type of arg1 was\n> struct X *?\n> \n>> Earlier I had dealt with the performance issue in a different way for the\n>> vec_ld and vec_st overloaded builtins, which created the rather grotty\n>> code in rs6000-c.c to modify the parse trees instead. My hope was that\n>> we could simplify the code by having Will deal with them as gimple folds\n>> instead. But if in so doing we lose type information, that may not be the\n>> right call.\n>> \n>> However, since you say that gimple aggressively removes the casts\n>> from pointer types, perhaps the code that we see in early gimple from\n>> the existing method might also be missing the type information? Will,\n>> it would be worth looking at that code to see. If it's no different then\n>> perhaps we still go ahead with the folding.\n> \n> As I said you can't simply use the type of arg1 for the TBAA type.\n> You can conservatively use ptr_type_node (alias-set zero) or you\n> can use sth that you derive from the builtin used (is a supposedly\n> existing _v4si variant always subject to int * TBAA?)\n\nAfter thinking about this a while, I believe Will should use ptr_type_node\nhere. I think anything we do to try to enforce some TBAA on these\npointer types will be fragile. Supposedly a _v2df variant should point\nonly to [an array of] double or to a vector double, and parsing enforces\nthat at least they've cast to that so they assert they know what they're\ndoing. Beyond that we needn't be too fussed if it's actually a\nstruct X * or the like. We already have issues with \"vector long\" and\n\"vector long long\" being different types in theory but aliased together\nfor 64-bit because they are the same in practice.\n\nAs long as we are still commoning identical loads (which didn't used\nto happen before the parsing-level expansion was done), I'll be happy.\nWe can always revisit this later if we feel like refined TBAA would solve a\nconcrete problem.\n\nBill\n> \n>> Another note for Will: The existing code gives up when -maltivec=be has\n>> been specified, and you probably want to do that as well. That may be\n>> why you initially turned off big endian -- it is easy to misread that code.\n>> -maltivec=be is VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN.\n>> \n>> Thanks,\n>> Bill\n>>> \n>>> Richard.\n>>> \n>>>> Bill\n>>>>> \n>>>>>> \n>>>>>> I think if the builtins have any TBAA constraints you need to build those\n>>>>>> explicitely, if not, you should use ptr_type_node aka no TBAA.\n>>>>> \n>>>>> The type signatures are constrained during parsing, so we should only\n>>>>> see allowed pointer types on arg1 by the time we get to gimple folding. I\n>>>>> think that using arg1_type should work, but I am probably missing\n>>>>> something subtle, so please feel free to whack me on the temple until\n>>>>> I get it. :-)\n>>>>> \n>>>>> Bill\n>>>>>> \n>>>>>> Richard.\n>>>>>> \n>>>>>>> + gimple_set_location (g, loc);\n>>>>>>> + gsi_replace (gsi, g, true);\n>>>>>>> +\n>>>>>>> + return true;\n>>>>>>> +\n>>>>>>> + }\n>>>>>>> +\n>>>>>>> default:\n>>>>>>> if (TARGET_DEBUG_BUILTIN)\n>>>>>>> fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n>>>>>>> fn_code, fn_name1, fn_name2);\n>>>>>>> break;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462246-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"BVtTpNnX\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtwsr1gpxz9s7M\n\tfor ;\n\tFri, 15 Sep 2017 23:17:04 +1000 (AEST)","(qmail 89915 invoked by alias); 15 Sep 2017 13:16:56 -0000","(qmail 88794 invoked by uid 89); 15 Sep 2017 13:16:55 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tFri, 15 Sep 2017 13:16:52 +0000","from pps.filterd (m0098404.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8FDGCFm085047\tfor ;\n\tFri, 15 Sep 2017 09:16:50 -0400","from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2d0cn38u2m-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tFri, 15 Sep 2017 09:16:50 -0400","from localhost\tby e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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