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GET /api/patches/812743/?format=api
{ "id": 812743, "url": "http://patchwork.ozlabs.org/api/patches/812743/?format=api", "web_url": "http://patchwork.ozlabs.org/project/ubuntu-kernel/patch/1505209542-17445-3-git-send-email-stefan.bader@canonical.com/", "project": { "id": 15, "url": "http://patchwork.ozlabs.org/api/projects/15/?format=api", "name": "Ubuntu Kernel", "link_name": "ubuntu-kernel", "list_id": "kernel-team.lists.ubuntu.com", "list_email": "kernel-team@lists.ubuntu.com", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>", "list_archive_url": null, "date": "2017-09-12T09:45:39", "name": "[Xenial,2/3] UBUNTU: SAUCE: s390/mm: fix local TLB flushing vs. detach of an mm address space", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "cd42440d4a833c5375625383db0f581c8c626903", "submitter": { "id": 2898, "url": "http://patchwork.ozlabs.org/api/people/2898/?format=api", "name": "Stefan Bader", "email": "stefan.bader@canonical.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/ubuntu-kernel/patch/1505209542-17445-3-git-send-email-stefan.bader@canonical.com/mbox/", "series": [ { "id": 2646, "url": "http://patchwork.ozlabs.org/api/series/2646/?format=api", "web_url": "http://patchwork.ozlabs.org/project/ubuntu-kernel/list/?series=2646", "date": "2017-09-12T09:45:39", "name": null, "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2646/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812743/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812743/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<kernel-team-bounces@lists.ubuntu.com>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com\n\t(client-ip=91.189.94.19; helo=huckleberry.canonical.com;\n\tenvelope-from=kernel-team-bounces@lists.ubuntu.com;\n\treceiver=<UNKNOWN>)", "Received": [ "from huckleberry.canonical.com (huckleberry.canonical.com\n\t[91.189.94.19])\n\tby ozlabs.org (Postfix) with ESMTP id 3xs0KX5PjQz9sRg;\n\tTue, 12 Sep 2017 19:45:52 +1000 (AEST)", "from localhost ([127.0.0.1] helo=huckleberry.canonical.com)\n\tby huckleberry.canonical.com with esmtp (Exim 4.86_2)\n\t(envelope-from <kernel-team-bounces@lists.ubuntu.com>)\n\tid 1drhlK-0003Qx-Ul; Tue, 12 Sep 2017 09:45:46 +0000", "from youngberry.canonical.com ([91.189.89.112])\n\tby huckleberry.canonical.com with esmtps\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128)\n\t(Exim 4.86_2) (envelope-from <stefan.bader@canonical.com>)\n\tid 1drhlH-0003Oz-ML\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 09:45:43 +0000", "from 1.general.smb.uk.vpn ([10.172.193.28] helo=canonical.com)\n\tby youngberry.canonical.com with esmtpsa\n\t(TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.76) (envelope-from <stefan.bader@canonical.com>)\n\tid 1drhlH-0006U9-Ds\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 09:45:43 +0000" ], "From": "Stefan Bader <stefan.bader@canonical.com>", "To": "kernel-team@lists.ubuntu.com", "Subject": "[Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB flushing\n\tvs. detach of an mm address space", "Date": "Tue, 12 Sep 2017 11:45:39 +0200", "Message-Id": "<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1505209542-17445-1-git-send-email-stefan.bader@canonical.com>", "References": "<1505209542-17445-1-git-send-email-stefan.bader@canonical.com>", "X-BeenThere": "kernel-team@lists.ubuntu.com", "X-Mailman-Version": "2.1.20", "Precedence": "list", "List-Id": "Kernel team discussions <kernel-team.lists.ubuntu.com>", "List-Unsubscribe": "<https://lists.ubuntu.com/mailman/options/kernel-team>,\n\t<mailto:kernel-team-request@lists.ubuntu.com?subject=unsubscribe>", "List-Archive": "<https://lists.ubuntu.com/archives/kernel-team>", "List-Post": "<mailto:kernel-team@lists.ubuntu.com>", "List-Help": "<mailto:kernel-team-request@lists.ubuntu.com?subject=help>", "List-Subscribe": "<https://lists.ubuntu.com/mailman/listinfo/kernel-team>,\n\t<mailto:kernel-team-request@lists.ubuntu.com?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "kernel-team-bounces@lists.ubuntu.com", "Sender": "\"kernel-team\" <kernel-team-bounces@lists.ubuntu.com>" }, "content": "From: Martin Schwidefsky <schwidefsky@de.ibm.com>\n\nBugLink: http://bugs.launchpad.net/bugs/1708399\n\nThe local TLB flushing code keeps an additional mask in the mm.context,\nthe cpu_attach_mask. At the time a global flush of an address space is\ndone the cpu_attach_mask is copied to the mm_cpumask in order to avoid\nfuture global flushes in case the mm is used by a single CPU only after\nthe flush.\n\nTrouble is that the reset of the mm_cpumask is racy against the detach\nof an mm address space by switch_mm. The current order is first the\nglobal TLB flush and then the copy of the cpu_attach_mask to the\nmm_cpumask. The order needs to be the other way around.\n\nCc: <stable@vger.kernel.org>\nReviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>\nSigned-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>\n(backported from b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659 linux-next)\n[merged with \"s390/mm,kvm: flush gmap address space with IDTE\"]\nSigned-off-by: Stefan Bader <stefan.bader@canonical.com>\n---\n arch/s390/include/asm/tlbflush.h | 56 ++++++++++++----------------------------\n 1 file changed, 16 insertions(+), 40 deletions(-)", "diff": "diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h\nindex 80868c84..d54cc83 100644\n--- a/arch/s390/include/asm/tlbflush.h\n+++ b/arch/s390/include/asm/tlbflush.h\n@@ -47,47 +47,31 @@ static inline void __tlb_flush_global(void)\n }\n \n /*\n- * Flush TLB entries for a specific mm on all CPUs (in case gmap is used\n- * this implicates multiple ASCEs!).\n+ * Flush TLB entries for a specific ASCE on all CPUs.\n */\n-static inline void __tlb_flush_full(struct mm_struct *mm)\n+static inline void __tlb_flush_mm(struct mm_struct * mm)\n {\n+\t/*\n+\t * If the machine has IDTE we prefer to do a per mm flush\n+\t * on all cpus instead of doing a local flush if the mm\n+\t * only ran on the local cpu.\n+\t */\n \tpreempt_disable();\n \tatomic_add(0x10000, &mm->context.attach_count);\n-\tif (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {\n-\t\t/* Local TLB flush */\n-\t\t__tlb_flush_local();\n+\t/* Reset TLB flush mask */\n+\tif (MACHINE_HAS_TLB_LC)\n+\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n+\tbarrier();\n+\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) {\n+\t\t__tlb_flush_idte(mm->context.asce);\n \t} else {\n \t\t/* Global TLB flush */\n \t\t__tlb_flush_global();\n-\t\t/* Reset TLB flush mask */\n-\t\tif (MACHINE_HAS_TLB_LC)\n-\t\t\tcpumask_copy(mm_cpumask(mm),\n-\t\t\t\t &mm->context.cpu_attach_mask);\n \t}\n \tatomic_sub(0x10000, &mm->context.attach_count);\n \tpreempt_enable();\n }\n \n-/*\n- * Flush TLB entries for a specific ASCE on all CPUs. Should never be used\n- * when more than one asce (e.g. gmap) ran on this mm.\n- */\n-static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)\n-{\n-\tpreempt_disable();\n-\tatomic_add(0x10000, &mm->context.attach_count);\n-\tif (MACHINE_HAS_IDTE)\n-\t\t__tlb_flush_idte(asce);\n-\telse\n-\t\t__tlb_flush_global();\n-\t/* Reset TLB flush mask */\n-\tif (MACHINE_HAS_TLB_LC)\n-\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n-\tatomic_sub(0x10000, &mm->context.attach_count);\n-\tpreempt_enable();\n-}\n-\n static inline void __tlb_flush_kernel(void)\n {\n \tif (MACHINE_HAS_IDTE)\n@@ -97,7 +81,6 @@ static inline void __tlb_flush_kernel(void)\n }\n #else\n #define __tlb_flush_global()\t__tlb_flush_local()\n-#define __tlb_flush_full(mm)\t__tlb_flush_local()\n \n /*\n * Flush TLB entries for a specific ASCE on all CPUs.\n@@ -111,21 +94,14 @@ static inline void __tlb_flush_kernel(void)\n {\n \t__tlb_flush_local();\n }\n-#endif\n \n static inline void __tlb_flush_mm(struct mm_struct * mm)\n {\n-\t/*\n-\t * If the machine has IDTE we prefer to do a per mm flush\n-\t * on all cpus instead of doing a local flush if the mm\n-\t * only ran on the local cpu.\n-\t */\n-\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))\n-\t\t__tlb_flush_asce(mm, mm->context.asce);\n-\telse\n-\t\t__tlb_flush_full(mm);\n+\t__tlb_flush_local();\n }\n \n+#endif\n+\n static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)\n {\n \tif (mm->context.flush_mm) {\n", "prefixes": [ "Xenial", "2/3" ] }