[{"id":1766928,"web_url":"http://patchwork.ozlabs.org/comment/1766928/","msgid":"","list_archive_url":null,"date":"2017-09-12T11:58:20","subject":"Re: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","submitter":{"id":2900,"url":"http://patchwork.ozlabs.org/api/people/2900/","name":"Colin Ian King","email":"colin.king@canonical.com"},"content":"On 12/09/17 10:45, Stefan Bader wrote:\n> From: Martin Schwidefsky \n> \n> BugLink: http://bugs.launchpad.net/bugs/1708399\n> \n> The local TLB flushing code keeps an additional mask in the mm.context,\n> the cpu_attach_mask. At the time a global flush of an address space is\n> done the cpu_attach_mask is copied to the mm_cpumask in order to avoid\n> future global flushes in case the mm is used by a single CPU only after\n> the flush.\n> \n> Trouble is that the reset of the mm_cpumask is racy against the detach\n> of an mm address space by switch_mm. The current order is first the\n> global TLB flush and then the copy of the cpu_attach_mask to the\n> mm_cpumask. The order needs to be the other way around.\n> \n> Cc: \n> Reviewed-by: Heiko Carstens \n> Signed-off-by: Martin Schwidefsky \n> (backported from b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659 linux-next)\n> [merged with \"s390/mm,kvm: flush gmap address space with IDTE\"]\n> Signed-off-by: Stefan Bader \n> ---\n> arch/s390/include/asm/tlbflush.h | 56 ++++++++++++----------------------------\n> 1 file changed, 16 insertions(+), 40 deletions(-)\n> \n> diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h\n> index 80868c84..d54cc83 100644\n> --- a/arch/s390/include/asm/tlbflush.h\n> +++ b/arch/s390/include/asm/tlbflush.h\n> @@ -47,47 +47,31 @@ static inline void __tlb_flush_global(void)\n> }\n> \n> /*\n> - * Flush TLB entries for a specific mm on all CPUs (in case gmap is used\n> - * this implicates multiple ASCEs!).\n> + * Flush TLB entries for a specific ASCE on all CPUs.\n> */\n> -static inline void __tlb_flush_full(struct mm_struct *mm)\n> +static inline void __tlb_flush_mm(struct mm_struct * mm)\n> {\n> +\t/*\n> +\t * If the machine has IDTE we prefer to do a per mm flush\n> +\t * on all cpus instead of doing a local flush if the mm\n> +\t * only ran on the local cpu.\n> +\t */\n> \tpreempt_disable();\n> \tatomic_add(0x10000, &mm->context.attach_count);\n> -\tif (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {\n> -\t\t/* Local TLB flush */\n> -\t\t__tlb_flush_local();\n> +\t/* Reset TLB flush mask */\n> +\tif (MACHINE_HAS_TLB_LC)\n> +\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n> +\tbarrier();\n> +\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) {\n> +\t\t__tlb_flush_idte(mm->context.asce);\n> \t} else {\n> \t\t/* Global TLB flush */\n> \t\t__tlb_flush_global();\n> -\t\t/* Reset TLB flush mask */\n> -\t\tif (MACHINE_HAS_TLB_LC)\n> -\t\t\tcpumask_copy(mm_cpumask(mm),\n> -\t\t\t\t &mm->context.cpu_attach_mask);\n> \t}\n> \tatomic_sub(0x10000, &mm->context.attach_count);\n> \tpreempt_enable();\n> }\n> \n> -/*\n> - * Flush TLB entries for a specific ASCE on all CPUs. Should never be used\n> - * when more than one asce (e.g. gmap) ran on this mm.\n> - */\n> -static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)\n> -{\n> -\tpreempt_disable();\n> -\tatomic_add(0x10000, &mm->context.attach_count);\n> -\tif (MACHINE_HAS_IDTE)\n> -\t\t__tlb_flush_idte(asce);\n> -\telse\n> -\t\t__tlb_flush_global();\n> -\t/* Reset TLB flush mask */\n> -\tif (MACHINE_HAS_TLB_LC)\n> -\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n> -\tatomic_sub(0x10000, &mm->context.attach_count);\n> -\tpreempt_enable();\n> -}\n> -\n> static inline void __tlb_flush_kernel(void)\n> {\n> \tif (MACHINE_HAS_IDTE)\n> @@ -97,7 +81,6 @@ static inline void __tlb_flush_kernel(void)\n> }\n> #else\n> #define __tlb_flush_global()\t__tlb_flush_local()\n> -#define __tlb_flush_full(mm)\t__tlb_flush_local()\n> \n> /*\n> * Flush TLB entries for a specific ASCE on all CPUs.\n> @@ -111,21 +94,14 @@ static inline void __tlb_flush_kernel(void)\n> {\n> \t__tlb_flush_local();\n> }\n> -#endif\n> \n> static inline void __tlb_flush_mm(struct mm_struct * mm)\n> {\n> -\t/*\n> -\t * If the machine has IDTE we prefer to do a per mm flush\n> -\t * on all cpus instead of doing a local flush if the mm\n> -\t * only ran on the local cpu.\n> -\t */\n> -\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))\n> -\t\t__tlb_flush_asce(mm, mm->context.asce);\n> -\telse\n> -\t\t__tlb_flush_full(mm);\n> +\t__tlb_flush_local();\n> }\n> \n> +#endif\n> +\n> static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)\n> {\n> \tif (mm->context.flush_mm) {\n> \n\nMaybe I'm being a bit slow here, but I'm finding this hard to see how\nthis is related to linux-next commit\nb3e5dc45fd1ec2aa1de6b80008f9295eb17e0659\n\nDo you mind explaining this backport?\n\nColin","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com\n\t(client-ip=91.189.94.19; helo=huckleberry.canonical.com;\n\tenvelope-from=kernel-team-bounces@lists.ubuntu.com;\n\treceiver=)","Received":["from huckleberry.canonical.com (huckleberry.canonical.com\n\t[91.189.94.19])\n\tby ozlabs.org (Postfix) with ESMTP id 3xs3GW17SRz9s7f;\n\tTue, 12 Sep 2017 21:58:27 +1000 (AEST)","from localhost ([127.0.0.1] helo=huckleberry.canonical.com)\n\tby huckleberry.canonical.com with esmtp (Exim 4.86_2)\n\t(envelope-from )\n\tid 1drjpf-0001MI-GZ; Tue, 12 Sep 2017 11:58:23 +0000","from youngberry.canonical.com ([91.189.89.112])\n\tby huckleberry.canonical.com with esmtps\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128)\n\t(Exim 4.86_2) (envelope-from )\n\tid 1drjpd-0001Lk-Dg\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 11:58:21 +0000","from 1.general.cking.uk.vpn ([10.172.193.212])\n\tby youngberry.canonical.com with esmtpsa\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.76) (envelope-from )\n\tid 1drjpd-00088j-12; Tue, 12 Sep 2017 11:58:21 +0000"],"Subject":"Re: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","To":"kernel-team@lists.ubuntu.com","References":"<1505209542-17445-1-git-send-email-stefan.bader@canonical.com>\n\t<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>","From":"Colin Ian King ","Message-ID":"","Date":"Tue, 12 Sep 2017 12:58:20 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.8.0","MIME-Version":"1.0","In-Reply-To":"<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>","X-BeenThere":"kernel-team@lists.ubuntu.com","X-Mailman-Version":"2.1.20","Precedence":"list","List-Id":"Kernel team discussions ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"kernel-team-bounces@lists.ubuntu.com","Sender":"\"kernel-team\" "}},{"id":1766939,"web_url":"http://patchwork.ozlabs.org/comment/1766939/","msgid":"<13828233-824a-0cc7-04ce-63be3e657a00@canonical.com>","list_archive_url":null,"date":"2017-09-12T12:18:30","subject":"Re: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","submitter":{"id":2898,"url":"http://patchwork.ozlabs.org/api/people/2898/","name":"Stefan Bader","email":"stefan.bader@canonical.com"},"content":"On 12.09.2017 13:58, Colin Ian King wrote:\n> On 12/09/17 10:45, Stefan Bader wrote:\n>> From: Martin Schwidefsky \n>>\n>> BugLink: http://bugs.launchpad.net/bugs/1708399\n>>\n>> The local TLB flushing code keeps an additional mask in the mm.context,\n>> the cpu_attach_mask. At the time a global flush of an address space is\n>> done the cpu_attach_mask is copied to the mm_cpumask in order to avoid\n>> future global flushes in case the mm is used by a single CPU only after\n>> the flush.\n>>\n>> Trouble is that the reset of the mm_cpumask is racy against the detach\n>> of an mm address space by switch_mm. The current order is first the\n>> global TLB flush and then the copy of the cpu_attach_mask to the\n>> mm_cpumask. The order needs to be the other way around.\n>>\n>> Cc: \n>> Reviewed-by: Heiko Carstens \n>> Signed-off-by: Martin Schwidefsky \n>> (backported from b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659 linux-next)\n>> [merged with \"s390/mm,kvm: flush gmap address space with IDTE\"]\n>> Signed-off-by: Stefan Bader \n>> ---\n>> arch/s390/include/asm/tlbflush.h | 56 ++++++++++++----------------------------\n>> 1 file changed, 16 insertions(+), 40 deletions(-)\n>>\n>> diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h\n>> index 80868c84..d54cc83 100644\n>> --- a/arch/s390/include/asm/tlbflush.h\n>> +++ b/arch/s390/include/asm/tlbflush.h\n>> @@ -47,47 +47,31 @@ static inline void __tlb_flush_global(void)\n>> }\n>> \n>> /*\n>> - * Flush TLB entries for a specific mm on all CPUs (in case gmap is used\n>> - * this implicates multiple ASCEs!).\n>> + * Flush TLB entries for a specific ASCE on all CPUs.\n>> */\n>> -static inline void __tlb_flush_full(struct mm_struct *mm)\n>> +static inline void __tlb_flush_mm(struct mm_struct * mm)\n>> {\n>> +\t/*\n>> +\t * If the machine has IDTE we prefer to do a per mm flush\n>> +\t * on all cpus instead of doing a local flush if the mm\n>> +\t * only ran on the local cpu.\n>> +\t */\n>> \tpreempt_disable();\n>> \tatomic_add(0x10000, &mm->context.attach_count);\n>> -\tif (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {\n>> -\t\t/* Local TLB flush */\n>> -\t\t__tlb_flush_local();\n>> +\t/* Reset TLB flush mask */\n>> +\tif (MACHINE_HAS_TLB_LC)\n>> +\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n>> +\tbarrier();\n>> +\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) {\n>> +\t\t__tlb_flush_idte(mm->context.asce);\n>> \t} else {\n>> \t\t/* Global TLB flush */\n>> \t\t__tlb_flush_global();\n>> -\t\t/* Reset TLB flush mask */\n>> -\t\tif (MACHINE_HAS_TLB_LC)\n>> -\t\t\tcpumask_copy(mm_cpumask(mm),\n>> -\t\t\t\t &mm->context.cpu_attach_mask);\n>> \t}\n>> \tatomic_sub(0x10000, &mm->context.attach_count);\n>> \tpreempt_enable();\n>> }\n>> \n>> -/*\n>> - * Flush TLB entries for a specific ASCE on all CPUs. Should never be used\n>> - * when more than one asce (e.g. gmap) ran on this mm.\n>> - */\n>> -static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)\n>> -{\n>> -\tpreempt_disable();\n>> -\tatomic_add(0x10000, &mm->context.attach_count);\n>> -\tif (MACHINE_HAS_IDTE)\n>> -\t\t__tlb_flush_idte(asce);\n>> -\telse\n>> -\t\t__tlb_flush_global();\n>> -\t/* Reset TLB flush mask */\n>> -\tif (MACHINE_HAS_TLB_LC)\n>> -\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n>> -\tatomic_sub(0x10000, &mm->context.attach_count);\n>> -\tpreempt_enable();\n>> -}\n>> -\n>> static inline void __tlb_flush_kernel(void)\n>> {\n>> \tif (MACHINE_HAS_IDTE)\n>> @@ -97,7 +81,6 @@ static inline void __tlb_flush_kernel(void)\n>> }\n>> #else\n>> #define __tlb_flush_global()\t__tlb_flush_local()\n>> -#define __tlb_flush_full(mm)\t__tlb_flush_local()\n>> \n>> /*\n>> * Flush TLB entries for a specific ASCE on all CPUs.\n>> @@ -111,21 +94,14 @@ static inline void __tlb_flush_kernel(void)\n>> {\n>> \t__tlb_flush_local();\n>> }\n>> -#endif\n>> \n>> static inline void __tlb_flush_mm(struct mm_struct * mm)\n>> {\n>> -\t/*\n>> -\t * If the machine has IDTE we prefer to do a per mm flush\n>> -\t * on all cpus instead of doing a local flush if the mm\n>> -\t * only ran on the local cpu.\n>> -\t */\n>> -\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))\n>> -\t\t__tlb_flush_asce(mm, mm->context.asce);\n>> -\telse\n>> -\t\t__tlb_flush_full(mm);\n>> +\t__tlb_flush_local();\n>> }\n>> \n>> +#endif\n>> +\n>> static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)\n>> {\n>> \tif (mm->context.flush_mm) {\n>>\n> \n> Maybe I'm being a bit slow here, but I'm finding this hard to see how\n> this is related to linux-next commit\n> b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659\n> \n> Do you mind explaining this backport?\n\nIt is a merge with the other commit mentioned above. Not the most obvious but\nsince it comes from the s390x maintainers I crossed my eyes and hope.\n\n-Stefan\n\n> \n> Colin\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com\n\t(client-ip=91.189.94.19; helo=huckleberry.canonical.com;\n\tenvelope-from=kernel-team-bounces@lists.ubuntu.com;\n\treceiver=)","Received":["from huckleberry.canonical.com (huckleberry.canonical.com\n\t[91.189.94.19])\n\tby ozlabs.org (Postfix) with ESMTP id 3xs3jz60MWz9t2f;\n\tTue, 12 Sep 2017 22:18:45 +1000 (AEST)","from localhost ([127.0.0.1] helo=huckleberry.canonical.com)\n\tby huckleberry.canonical.com with esmtp (Exim 4.86_2)\n\t(envelope-from )\n\tid 1drk9I-0008Qh-5Z; Tue, 12 Sep 2017 12:18:40 +0000","from youngberry.canonical.com ([91.189.89.112])\n\tby huckleberry.canonical.com with esmtps\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128)\n\t(Exim 4.86_2) (envelope-from )\n\tid 1drk9H-0008Q7-6h\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 12:18:39 +0000","from 1.general.smb.uk.vpn ([10.172.193.28])\n\tby youngberry.canonical.com with esmtpsa\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.76) (envelope-from )\n\tid 1drk9G-0000lp-UW\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 12:18:38 +0000"],"Subject":"Re: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","To":"kernel-team@lists.ubuntu.com","References":"<1505209542-17445-1-git-send-email-stefan.bader@canonical.com>\n\t<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>\n\t","From":"Stefan Bader ","Message-ID":"<13828233-824a-0cc7-04ce-63be3e657a00@canonical.com>","Date":"Tue, 12 Sep 2017 14:18:30 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"","X-BeenThere":"kernel-team@lists.ubuntu.com","X-Mailman-Version":"2.1.20","Precedence":"list","List-Id":"Kernel team discussions ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"multipart/mixed;\n\tboundary=\"===============8413838868759061350==\"","Errors-To":"kernel-team-bounces@lists.ubuntu.com","Sender":"\"kernel-team\" "}},{"id":1766945,"web_url":"http://patchwork.ozlabs.org/comment/1766945/","msgid":"<79c9391b-78d2-cd99-2d16-c0cd96488f28@canonical.com>","list_archive_url":null,"date":"2017-09-12T12:28:14","subject":"Re: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","submitter":{"id":2900,"url":"http://patchwork.ozlabs.org/api/people/2900/","name":"Colin Ian King","email":"colin.king@canonical.com"},"content":"On 12/09/17 13:18, Stefan Bader wrote:\n> On 12.09.2017 13:58, Colin Ian King wrote:\n>> On 12/09/17 10:45, Stefan Bader wrote:\n>>> From: Martin Schwidefsky \n>>>\n>>> BugLink: http://bugs.launchpad.net/bugs/1708399\n>>>\n>>> The local TLB flushing code keeps an additional mask in the mm.context,\n>>> the cpu_attach_mask. At the time a global flush of an address space is\n>>> done the cpu_attach_mask is copied to the mm_cpumask in order to avoid\n>>> future global flushes in case the mm is used by a single CPU only after\n>>> the flush.\n>>>\n>>> Trouble is that the reset of the mm_cpumask is racy against the detach\n>>> of an mm address space by switch_mm. The current order is first the\n>>> global TLB flush and then the copy of the cpu_attach_mask to the\n>>> mm_cpumask. The order needs to be the other way around.\n>>>\n>>> Cc: \n>>> Reviewed-by: Heiko Carstens \n>>> Signed-off-by: Martin Schwidefsky \n>>> (backported from b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659 linux-next)\n>>> [merged with \"s390/mm,kvm: flush gmap address space with IDTE\"]\n>>> Signed-off-by: Stefan Bader \n>>> ---\n>>> arch/s390/include/asm/tlbflush.h | 56 ++++++++++++----------------------------\n>>> 1 file changed, 16 insertions(+), 40 deletions(-)\n>>>\n>>> diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h\n>>> index 80868c84..d54cc83 100644\n>>> --- a/arch/s390/include/asm/tlbflush.h\n>>> +++ b/arch/s390/include/asm/tlbflush.h\n>>> @@ -47,47 +47,31 @@ static inline void __tlb_flush_global(void)\n>>> }\n>>> \n>>> /*\n>>> - * Flush TLB entries for a specific mm on all CPUs (in case gmap is used\n>>> - * this implicates multiple ASCEs!).\n>>> + * Flush TLB entries for a specific ASCE on all CPUs.\n>>> */\n>>> -static inline void __tlb_flush_full(struct mm_struct *mm)\n>>> +static inline void __tlb_flush_mm(struct mm_struct * mm)\n>>> {\n>>> +\t/*\n>>> +\t * If the machine has IDTE we prefer to do a per mm flush\n>>> +\t * on all cpus instead of doing a local flush if the mm\n>>> +\t * only ran on the local cpu.\n>>> +\t */\n>>> \tpreempt_disable();\n>>> \tatomic_add(0x10000, &mm->context.attach_count);\n>>> -\tif (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {\n>>> -\t\t/* Local TLB flush */\n>>> -\t\t__tlb_flush_local();\n>>> +\t/* Reset TLB flush mask */\n>>> +\tif (MACHINE_HAS_TLB_LC)\n>>> +\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n>>> +\tbarrier();\n>>> +\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) {\n>>> +\t\t__tlb_flush_idte(mm->context.asce);\n>>> \t} else {\n>>> \t\t/* Global TLB flush */\n>>> \t\t__tlb_flush_global();\n>>> -\t\t/* Reset TLB flush mask */\n>>> -\t\tif (MACHINE_HAS_TLB_LC)\n>>> -\t\t\tcpumask_copy(mm_cpumask(mm),\n>>> -\t\t\t\t &mm->context.cpu_attach_mask);\n>>> \t}\n>>> \tatomic_sub(0x10000, &mm->context.attach_count);\n>>> \tpreempt_enable();\n>>> }\n>>> \n>>> -/*\n>>> - * Flush TLB entries for a specific ASCE on all CPUs. Should never be used\n>>> - * when more than one asce (e.g. gmap) ran on this mm.\n>>> - */\n>>> -static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)\n>>> -{\n>>> -\tpreempt_disable();\n>>> -\tatomic_add(0x10000, &mm->context.attach_count);\n>>> -\tif (MACHINE_HAS_IDTE)\n>>> -\t\t__tlb_flush_idte(asce);\n>>> -\telse\n>>> -\t\t__tlb_flush_global();\n>>> -\t/* Reset TLB flush mask */\n>>> -\tif (MACHINE_HAS_TLB_LC)\n>>> -\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n>>> -\tatomic_sub(0x10000, &mm->context.attach_count);\n>>> -\tpreempt_enable();\n>>> -}\n>>> -\n>>> static inline void __tlb_flush_kernel(void)\n>>> {\n>>> \tif (MACHINE_HAS_IDTE)\n>>> @@ -97,7 +81,6 @@ static inline void __tlb_flush_kernel(void)\n>>> }\n>>> #else\n>>> #define __tlb_flush_global()\t__tlb_flush_local()\n>>> -#define __tlb_flush_full(mm)\t__tlb_flush_local()\n>>> \n>>> /*\n>>> * Flush TLB entries for a specific ASCE on all CPUs.\n>>> @@ -111,21 +94,14 @@ static inline void __tlb_flush_kernel(void)\n>>> {\n>>> \t__tlb_flush_local();\n>>> }\n>>> -#endif\n>>> \n>>> static inline void __tlb_flush_mm(struct mm_struct * mm)\n>>> {\n>>> -\t/*\n>>> -\t * If the machine has IDTE we prefer to do a per mm flush\n>>> -\t * on all cpus instead of doing a local flush if the mm\n>>> -\t * only ran on the local cpu.\n>>> -\t */\n>>> -\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))\n>>> -\t\t__tlb_flush_asce(mm, mm->context.asce);\n>>> -\telse\n>>> -\t\t__tlb_flush_full(mm);\n>>> +\t__tlb_flush_local();\n>>> }\n>>> \n>>> +#endif\n>>> +\n>>> static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)\n>>> {\n>>> \tif (mm->context.flush_mm) {\n>>>\n>>\n>> Maybe I'm being a bit slow here, but I'm finding this hard to see how\n>> this is related to linux-next commit\n>> b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659\n>>\n>> Do you mind explaining this backport?\n> \n> It is a merge with the other commit mentioned above. Not the most obvious but\n> since it comes from the s390x maintainers I crossed my eyes and hope.\n\nOK, got it. Thanks for the explanation.\n\nColin\n\n> \n> -Stefan\n> \n>>\n>> Colin\n>>\n> \n> \n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com\n\t(client-ip=91.189.94.19; helo=huckleberry.canonical.com;\n\tenvelope-from=kernel-team-bounces@lists.ubuntu.com;\n\treceiver=)","Received":["from huckleberry.canonical.com (huckleberry.canonical.com\n\t[91.189.94.19])\n\tby ozlabs.org (Postfix) with ESMTP id 3xs3yZ0L84z9rxl;\n\tTue, 12 Sep 2017 22:28:58 +1000 (AEST)","from localhost ([127.0.0.1] helo=huckleberry.canonical.com)\n\tby huckleberry.canonical.com with esmtp (Exim 4.86_2)\n\t(envelope-from )\n\tid 1drkIc-0003NL-9n; Tue, 12 Sep 2017 12:28:18 +0000","from youngberry.canonical.com ([91.189.89.112])\n\tby huckleberry.canonical.com with esmtps\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128)\n\t(Exim 4.86_2) (envelope-from )\n\tid 1drkIa-0003Mj-MT\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 12:28:16 +0000","from 1.general.cking.uk.vpn ([10.172.193.212])\n\tby youngberry.canonical.com with esmtpsa\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.76) (envelope-from )\n\tid 1drkIa-0001DM-6y; Tue, 12 Sep 2017 12:28:16 +0000"],"Subject":"Re: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","To":"Stefan Bader , kernel-team@lists.ubuntu.com","References":"<1505209542-17445-1-git-send-email-stefan.bader@canonical.com>\n\t<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>\n\t\n\t<13828233-824a-0cc7-04ce-63be3e657a00@canonical.com>","From":"Colin Ian King ","Message-ID":"<79c9391b-78d2-cd99-2d16-c0cd96488f28@canonical.com>","Date":"Tue, 12 Sep 2017 13:28:14 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.8.0","MIME-Version":"1.0","In-Reply-To":"<13828233-824a-0cc7-04ce-63be3e657a00@canonical.com>","X-BeenThere":"kernel-team@lists.ubuntu.com","X-Mailman-Version":"2.1.20","Precedence":"list","List-Id":"Kernel team discussions ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"multipart/mixed;\n\tboundary=\"===============7349054781105532741==\"","Errors-To":"kernel-team-bounces@lists.ubuntu.com","Sender":"\"kernel-team\" "}},{"id":1766950,"web_url":"http://patchwork.ozlabs.org/comment/1766950/","msgid":"<21cfc443-e345-dfa5-fc03-4ca275b39f38@canonical.com>","list_archive_url":null,"date":"2017-09-12T12:29:53","subject":"ACK: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","submitter":{"id":2900,"url":"http://patchwork.ozlabs.org/api/people/2900/","name":"Colin Ian King","email":"colin.king@canonical.com"},"content":"On 12/09/17 10:45, Stefan Bader wrote:\n> From: Martin Schwidefsky \n> \n> BugLink: http://bugs.launchpad.net/bugs/1708399\n> \n> The local TLB flushing code keeps an additional mask in the mm.context,\n> the cpu_attach_mask. At the time a global flush of an address space is\n> done the cpu_attach_mask is copied to the mm_cpumask in order to avoid\n> future global flushes in case the mm is used by a single CPU only after\n> the flush.\n> \n> Trouble is that the reset of the mm_cpumask is racy against the detach\n> of an mm address space by switch_mm. The current order is first the\n> global TLB flush and then the copy of the cpu_attach_mask to the\n> mm_cpumask. The order needs to be the other way around.\n> \n> Cc: \n> Reviewed-by: Heiko Carstens \n> Signed-off-by: Martin Schwidefsky \n> (backported from b3e5dc45fd1ec2aa1de6b80008f9295eb17e0659 linux-next)\n> [merged with \"s390/mm,kvm: flush gmap address space with IDTE\"]\n> Signed-off-by: Stefan Bader \n> ---\n> arch/s390/include/asm/tlbflush.h | 56 ++++++++++++----------------------------\n> 1 file changed, 16 insertions(+), 40 deletions(-)\n> \n> diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h\n> index 80868c84..d54cc83 100644\n> --- a/arch/s390/include/asm/tlbflush.h\n> +++ b/arch/s390/include/asm/tlbflush.h\n> @@ -47,47 +47,31 @@ static inline void __tlb_flush_global(void)\n> }\n> \n> /*\n> - * Flush TLB entries for a specific mm on all CPUs (in case gmap is used\n> - * this implicates multiple ASCEs!).\n> + * Flush TLB entries for a specific ASCE on all CPUs.\n> */\n> -static inline void __tlb_flush_full(struct mm_struct *mm)\n> +static inline void __tlb_flush_mm(struct mm_struct * mm)\n> {\n> +\t/*\n> +\t * If the machine has IDTE we prefer to do a per mm flush\n> +\t * on all cpus instead of doing a local flush if the mm\n> +\t * only ran on the local cpu.\n> +\t */\n> \tpreempt_disable();\n> \tatomic_add(0x10000, &mm->context.attach_count);\n> -\tif (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {\n> -\t\t/* Local TLB flush */\n> -\t\t__tlb_flush_local();\n> +\t/* Reset TLB flush mask */\n> +\tif (MACHINE_HAS_TLB_LC)\n> +\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n> +\tbarrier();\n> +\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) {\n> +\t\t__tlb_flush_idte(mm->context.asce);\n> \t} else {\n> \t\t/* Global TLB flush */\n> \t\t__tlb_flush_global();\n> -\t\t/* Reset TLB flush mask */\n> -\t\tif (MACHINE_HAS_TLB_LC)\n> -\t\t\tcpumask_copy(mm_cpumask(mm),\n> -\t\t\t\t &mm->context.cpu_attach_mask);\n> \t}\n> \tatomic_sub(0x10000, &mm->context.attach_count);\n> \tpreempt_enable();\n> }\n> \n> -/*\n> - * Flush TLB entries for a specific ASCE on all CPUs. Should never be used\n> - * when more than one asce (e.g. gmap) ran on this mm.\n> - */\n> -static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)\n> -{\n> -\tpreempt_disable();\n> -\tatomic_add(0x10000, &mm->context.attach_count);\n> -\tif (MACHINE_HAS_IDTE)\n> -\t\t__tlb_flush_idte(asce);\n> -\telse\n> -\t\t__tlb_flush_global();\n> -\t/* Reset TLB flush mask */\n> -\tif (MACHINE_HAS_TLB_LC)\n> -\t\tcpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);\n> -\tatomic_sub(0x10000, &mm->context.attach_count);\n> -\tpreempt_enable();\n> -}\n> -\n> static inline void __tlb_flush_kernel(void)\n> {\n> \tif (MACHINE_HAS_IDTE)\n> @@ -97,7 +81,6 @@ static inline void __tlb_flush_kernel(void)\n> }\n> #else\n> #define __tlb_flush_global()\t__tlb_flush_local()\n> -#define __tlb_flush_full(mm)\t__tlb_flush_local()\n> \n> /*\n> * Flush TLB entries for a specific ASCE on all CPUs.\n> @@ -111,21 +94,14 @@ static inline void __tlb_flush_kernel(void)\n> {\n> \t__tlb_flush_local();\n> }\n> -#endif\n> \n> static inline void __tlb_flush_mm(struct mm_struct * mm)\n> {\n> -\t/*\n> -\t * If the machine has IDTE we prefer to do a per mm flush\n> -\t * on all cpus instead of doing a local flush if the mm\n> -\t * only ran on the local cpu.\n> -\t */\n> -\tif (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))\n> -\t\t__tlb_flush_asce(mm, mm->context.asce);\n> -\telse\n> -\t\t__tlb_flush_full(mm);\n> +\t__tlb_flush_local();\n> }\n> \n> +#endif\n> +\n> static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)\n> {\n> \tif (mm->context.flush_mm) {\n> \n\nAcked-by: Colin Ian King ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com\n\t(client-ip=91.189.94.19; helo=huckleberry.canonical.com;\n\tenvelope-from=kernel-team-bounces@lists.ubuntu.com;\n\treceiver=)","Received":["from huckleberry.canonical.com (huckleberry.canonical.com\n\t[91.189.94.19])\n\tby ozlabs.org (Postfix) with ESMTP id 3xs3z04lcGz9t5h;\n\tTue, 12 Sep 2017 22:30:01 +1000 (AEST)","from localhost ([127.0.0.1] helo=huckleberry.canonical.com)\n\tby huckleberry.canonical.com with esmtp (Exim 4.86_2)\n\t(envelope-from )\n\tid 1drkKC-0003rs-NN; Tue, 12 Sep 2017 12:29:56 +0000","from youngberry.canonical.com ([91.189.89.112])\n\tby huckleberry.canonical.com with esmtps\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128)\n\t(Exim 4.86_2) (envelope-from )\n\tid 1drkKA-0003rD-Lb\n\tfor kernel-team@lists.ubuntu.com; Tue, 12 Sep 2017 12:29:54 +0000","from 1.general.cking.uk.vpn ([10.172.193.212])\n\tby youngberry.canonical.com with esmtpsa\n\t(TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.76) (envelope-from )\n\tid 1drkKA-0001FO-AG; Tue, 12 Sep 2017 12:29:54 +0000"],"Subject":"ACK: [Xenial PATCH 2/3] UBUNTU: SAUCE: s390/mm: fix local TLB\n\tflushing vs. detach of an mm address space","To":"kernel-team@lists.ubuntu.com","References":"<1505209542-17445-1-git-send-email-stefan.bader@canonical.com>\n\t<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>","From":"Colin Ian King ","Message-ID":"<21cfc443-e345-dfa5-fc03-4ca275b39f38@canonical.com>","Date":"Tue, 12 Sep 2017 13:29:53 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.8.0","MIME-Version":"1.0","In-Reply-To":"<1505209542-17445-3-git-send-email-stefan.bader@canonical.com>","X-BeenThere":"kernel-team@lists.ubuntu.com","X-Mailman-Version":"2.1.20","Precedence":"list","List-Id":"Kernel team discussions ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"kernel-team-bounces@lists.ubuntu.com","Sender":"\"kernel-team\" "}}]