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GET /api/patches/812531/?format=api
{ "id": 812531, "url": "http://patchwork.ozlabs.org/api/patches/812531/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911172022.4738-34-eblake@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170911172022.4738-34-eblake@redhat.com>", "list_archive_url": null, "date": "2017-09-11T17:20:17", "name": "[v7,33/38] libqtest: Merge qtest_{in, out}[bwl]() with {in, out}[bwl]()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0937d0702e6f0e93f4d66c0992d50626a24089be", "submitter": { "id": 6591, "url": "http://patchwork.ozlabs.org/api/people/6591/?format=api", "name": "Eric Blake", "email": "eblake@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911172022.4738-34-eblake@redhat.com/mbox/", "series": [ { "id": 2534, "url": "http://patchwork.ozlabs.org/api/series/2534/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2534", "date": "2017-09-11T17:19:47", "name": "Preliminary libqtest cleanups", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/2534/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812531/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812531/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=eblake@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrbQR03rmz9sNV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 04:03:41 +1000 (AEST)", "from localhost ([::1]:59574 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1drT3a-0004d2-TN\n\tfor incoming@patchwork.ozlabs.org; Mon, 11 Sep 2017 14:03:38 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:39151)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <eblake@redhat.com>) id 1drSPO-0008H5-Ap\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:22:09 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <eblake@redhat.com>) id 1drSPL-0001eM-0e\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:22:06 -0400", "from mx1.redhat.com ([209.132.183.28]:53638)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <eblake@redhat.com>)\n\tid 1drSPE-0001at-6L; Mon, 11 Sep 2017 13:21:56 -0400", "from smtp.corp.redhat.com\n\t(int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 4E439CF961;\n\tMon, 11 Sep 2017 17:21:55 +0000 (UTC)", "from red.redhat.com (ovpn-120-44.rdu2.redhat.com [10.10.120.44])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id D93CE5D969;\n\tMon, 11 Sep 2017 17:21:53 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com 4E439CF961", "From": "Eric Blake <eblake@redhat.com>", "To": "qemu-devel@nongnu.org", "Date": "Mon, 11 Sep 2017 12:20:17 -0500", "Message-Id": "<20170911172022.4738-34-eblake@redhat.com>", "In-Reply-To": "<20170911172022.4738-1-eblake@redhat.com>", "References": "<20170911172022.4738-1-eblake@redhat.com>", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.14", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.25]);\n\tMon, 11 Sep 2017 17:21:55 +0000 (UTC)", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v7 33/38] libqtest: Merge qtest_{in,\n\tout}[bwl]() with {in, out}[bwl]()", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "pbonzini@redhat.com, thuth@redhat.com, John Snow <jsnow@redhat.com>,\n\tarmbru@redhat.com, \"open list:Floppy\" <qemu-block@nongnu.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Maintaining two layers of libqtest APIs, one that takes an explicit\nQTestState object, and the other that uses the implicit global_qtest,\nis annoying. In the interest of getting rid of global implicit\nstate and having less code to maintain, merge:\n qtest_outb()\n qtest_outw()\n qtest_outl()\n qtest_inb()\n qtest_inw()\n qtest_inl()\nwith their short counterparts. All callers that previously\nused the short form now make it explicit that they are relying on\nglobal_qtest, and later patches can then clean things up to remove\nthe global variable.\n\nSigned-off-by: Eric Blake <eblake@redhat.com>\n---\n tests/libqtest.h | 99 ++++++-------------------------------------------\n tests/multiboot/libc.h | 2 +-\n tests/libqtest.c | 14 +++----\n tests/boot-order-test.c | 4 +-\n tests/endianness-test.c | 12 +++---\n tests/fdc-test.c | 77 ++++++++++++++++++++------------------\n tests/hd-geo-test.c | 4 +-\n tests/ipmi-bt-test.c | 12 +++---\n tests/ipmi-kcs-test.c | 8 ++--\n tests/libqos/fw_cfg.c | 4 +-\n tests/libqos/pci-pc.c | 44 +++++++++++-----------\n tests/libqos/pci.c | 2 +-\n tests/m48t59-test.c | 8 ++--\n tests/multiboot/libc.c | 2 +-\n tests/pvpanic-test.c | 4 +-\n tests/rtc-test.c | 8 ++--\n tests/wdt_ib700-test.c | 8 ++--\n 17 files changed, 120 insertions(+), 192 deletions(-)", "diff": "diff --git a/tests/libqtest.h b/tests/libqtest.h\nindex 8398c0fd07..520f745e7b 100644\n--- a/tests/libqtest.h\n+++ b/tests/libqtest.h\n@@ -205,61 +205,61 @@ void irq_intercept_in(QTestState *s, const char *string);\n void irq_intercept_out(QTestState *s, const char *string);\n\n /**\n- * qtest_outb:\n+ * outb:\n * @s: #QTestState instance to operate on.\n * @addr: I/O port to write to.\n * @value: Value being written.\n *\n * Write an 8-bit value to an I/O port.\n */\n-void qtest_outb(QTestState *s, uint16_t addr, uint8_t value);\n+void outb(QTestState *s, uint16_t addr, uint8_t value);\n\n /**\n- * qtest_outw:\n+ * outw:\n * @s: #QTestState instance to operate on.\n * @addr: I/O port to write to.\n * @value: Value being written.\n *\n * Write a 16-bit value to an I/O port.\n */\n-void qtest_outw(QTestState *s, uint16_t addr, uint16_t value);\n+void outw(QTestState *s, uint16_t addr, uint16_t value);\n\n /**\n- * qtest_outl:\n+ * outl:\n * @s: #QTestState instance to operate on.\n * @addr: I/O port to write to.\n * @value: Value being written.\n *\n * Write a 32-bit value to an I/O port.\n */\n-void qtest_outl(QTestState *s, uint16_t addr, uint32_t value);\n+void outl(QTestState *s, uint16_t addr, uint32_t value);\n\n /**\n- * qtest_inb:\n+ * inb:\n * @s: #QTestState instance to operate on.\n * @addr: I/O port to read from.\n *\n * Returns an 8-bit value from an I/O port.\n */\n-uint8_t qtest_inb(QTestState *s, uint16_t addr);\n+uint8_t inb(QTestState *s, uint16_t addr);\n\n /**\n- * qtest_inw:\n+ * inw:\n * @s: #QTestState instance to operate on.\n * @addr: I/O port to read from.\n *\n * Returns a 16-bit value from an I/O port.\n */\n-uint16_t qtest_inw(QTestState *s, uint16_t addr);\n+uint16_t inw(QTestState *s, uint16_t addr);\n\n /**\n- * qtest_inl:\n+ * inl:\n * @s: #QTestState instance to operate on.\n * @addr: I/O port to read from.\n *\n * Returns a 32-bit value from an I/O port.\n */\n-uint32_t qtest_inl(QTestState *s, uint16_t addr);\n+uint32_t inl(QTestState *s, uint16_t addr);\n\n /**\n * qtest_writeb:\n@@ -594,81 +594,6 @@ static inline QDict *qmp_eventwait_ref(const char *event)\n char *hmp(const char *fmt, ...) GCC_FMT_ATTR(1, 2);\n\n /**\n- * outb:\n- * @addr: I/O port to write to.\n- * @value: Value being written.\n- *\n- * Write an 8-bit value to an I/O port.\n- */\n-static inline void outb(uint16_t addr, uint8_t value)\n-{\n- qtest_outb(global_qtest, addr, value);\n-}\n-\n-/**\n- * outw:\n- * @addr: I/O port to write to.\n- * @value: Value being written.\n- *\n- * Write a 16-bit value to an I/O port.\n- */\n-static inline void outw(uint16_t addr, uint16_t value)\n-{\n- qtest_outw(global_qtest, addr, value);\n-}\n-\n-/**\n- * outl:\n- * @addr: I/O port to write to.\n- * @value: Value being written.\n- *\n- * Write a 32-bit value to an I/O port.\n- */\n-static inline void outl(uint16_t addr, uint32_t value)\n-{\n- qtest_outl(global_qtest, addr, value);\n-}\n-\n-/**\n- * inb:\n- * @addr: I/O port to read from.\n- *\n- * Reads an 8-bit value from an I/O port.\n- *\n- * Returns: Value read.\n- */\n-static inline uint8_t inb(uint16_t addr)\n-{\n- return qtest_inb(global_qtest, addr);\n-}\n-\n-/**\n- * inw:\n- * @addr: I/O port to read from.\n- *\n- * Reads a 16-bit value from an I/O port.\n- *\n- * Returns: Value read.\n- */\n-static inline uint16_t inw(uint16_t addr)\n-{\n- return qtest_inw(global_qtest, addr);\n-}\n-\n-/**\n- * inl:\n- * @addr: I/O port to read from.\n- *\n- * Reads a 32-bit value from an I/O port.\n- *\n- * Returns: Value read.\n- */\n-static inline uint32_t inl(uint16_t addr)\n-{\n- return qtest_inl(global_qtest, addr);\n-}\n-\n-/**\n * writeb:\n * @addr: Guest address to write to.\n * @value: Value being written.\ndiff --git a/tests/multiboot/libc.h b/tests/multiboot/libc.h\nindex 04c9922c27..05eb7eafd6 100644\n--- a/tests/multiboot/libc.h\n+++ b/tests/multiboot/libc.h\n@@ -48,7 +48,7 @@ typedef __builtin_va_list va_list;\n\n /* Port I/O functions */\n\n-static inline void outb(uint16_t port, uint8_t data)\n+static inline void outb(global_qtest, uint16_t port, uint8_t data)\n {\n asm volatile (\"outb %0, %1\" : : \"a\" (data), \"Nd\" (port));\n }\ndiff --git a/tests/libqtest.c b/tests/libqtest.c\nindex 962432a27a..1db86b39f1 100644\n--- a/tests/libqtest.c\n+++ b/tests/libqtest.c\n@@ -651,7 +651,7 @@ const char *qtest_get_arch(void)\n bool get_irq(QTestState *s, int num)\n {\n /* dummy operation in order to make sure irq is up to date */\n- qtest_inb(s, 0);\n+ inb(s, 0);\n\n return s->irq_level[num];\n }\n@@ -702,17 +702,17 @@ static void qtest_out(QTestState *s, const char *cmd, uint16_t addr, uint32_t va\n qtest_rsp(s, 0);\n }\n\n-void qtest_outb(QTestState *s, uint16_t addr, uint8_t value)\n+void outb(QTestState *s, uint16_t addr, uint8_t value)\n {\n qtest_out(s, \"outb\", addr, value);\n }\n\n-void qtest_outw(QTestState *s, uint16_t addr, uint16_t value)\n+void outw(QTestState *s, uint16_t addr, uint16_t value)\n {\n qtest_out(s, \"outw\", addr, value);\n }\n\n-void qtest_outl(QTestState *s, uint16_t addr, uint32_t value)\n+void outl(QTestState *s, uint16_t addr, uint32_t value)\n {\n qtest_out(s, \"outl\", addr, value);\n }\n@@ -732,17 +732,17 @@ static uint32_t qtest_in(QTestState *s, const char *cmd, uint16_t addr)\n return value;\n }\n\n-uint8_t qtest_inb(QTestState *s, uint16_t addr)\n+uint8_t inb(QTestState *s, uint16_t addr)\n {\n return qtest_in(s, \"inb\", addr);\n }\n\n-uint16_t qtest_inw(QTestState *s, uint16_t addr)\n+uint16_t inw(QTestState *s, uint16_t addr)\n {\n return qtest_in(s, \"inw\", addr);\n }\n\n-uint32_t qtest_inl(QTestState *s, uint16_t addr)\n+uint32_t inl(QTestState *s, uint16_t addr)\n {\n return qtest_in(s, \"inl\", addr);\n }\ndiff --git a/tests/boot-order-test.c b/tests/boot-order-test.c\nindex e70f5dedba..177aac95ad 100644\n--- a/tests/boot-order-test.c\n+++ b/tests/boot-order-test.c\n@@ -63,8 +63,8 @@ static void test_boot_orders(const char *machine,\n\n static uint8_t read_mc146818(uint16_t port, uint8_t reg)\n {\n- outb(port, reg);\n- return inb(port + 1);\n+ outb(global_qtest, port, reg);\n+ return inb(global_qtest, port + 1);\n }\n\n static uint64_t read_boot_order_pc(void)\ndiff --git a/tests/endianness-test.c b/tests/endianness-test.c\nindex 546e0969e4..16b303525e 100644\n--- a/tests/endianness-test.c\n+++ b/tests/endianness-test.c\n@@ -52,7 +52,7 @@ static uint8_t isa_inb(const TestCase *test, uint16_t addr)\n {\n uint8_t value;\n if (test->isa_base == -1) {\n- value = inb(addr);\n+ value = inb(global_qtest, addr);\n } else {\n value = readb(test->isa_base + addr);\n }\n@@ -63,7 +63,7 @@ static uint16_t isa_inw(const TestCase *test, uint16_t addr)\n {\n uint16_t value;\n if (test->isa_base == -1) {\n- value = inw(addr);\n+ value = inw(global_qtest, addr);\n } else {\n value = readw(test->isa_base + addr);\n }\n@@ -74,7 +74,7 @@ static uint32_t isa_inl(const TestCase *test, uint16_t addr)\n {\n uint32_t value;\n if (test->isa_base == -1) {\n- value = inl(addr);\n+ value = inl(global_qtest, addr);\n } else {\n value = readl(test->isa_base + addr);\n }\n@@ -84,7 +84,7 @@ static uint32_t isa_inl(const TestCase *test, uint16_t addr)\n static void isa_outb(const TestCase *test, uint16_t addr, uint8_t value)\n {\n if (test->isa_base == -1) {\n- outb(addr, value);\n+ outb(global_qtest, addr, value);\n } else {\n writeb(test->isa_base + addr, value);\n }\n@@ -94,7 +94,7 @@ static void isa_outw(const TestCase *test, uint16_t addr, uint16_t value)\n {\n value = test->bswap ? bswap16(value) : value;\n if (test->isa_base == -1) {\n- outw(addr, value);\n+ outw(global_qtest, addr, value);\n } else {\n writew(test->isa_base + addr, value);\n }\n@@ -104,7 +104,7 @@ static void isa_outl(const TestCase *test, uint16_t addr, uint32_t value)\n {\n value = test->bswap ? bswap32(value) : value;\n if (test->isa_base == -1) {\n- outl(addr, value);\n+ outl(global_qtest, addr, value);\n } else {\n writel(test->isa_base + addr, value);\n }\ndiff --git a/tests/fdc-test.c b/tests/fdc-test.c\nindex 584ad746ed..7803ff2789 100644\n--- a/tests/fdc-test.c\n+++ b/tests/fdc-test.c\n@@ -77,21 +77,21 @@ static void floppy_send(uint8_t byte)\n {\n uint8_t msr;\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_set(msr, RQM);\n assert_bit_clear(msr, DIO);\n\n- outb(FLOPPY_BASE + reg_fifo, byte);\n+ outb(global_qtest, FLOPPY_BASE + reg_fifo, byte);\n }\n\n static uint8_t floppy_recv(void)\n {\n uint8_t msr;\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_set(msr, RQM | DIO);\n\n- return inb(FLOPPY_BASE + reg_fifo);\n+ return inb(global_qtest, FLOPPY_BASE + reg_fifo);\n }\n\n /* pcn: Present Cylinder Number */\n@@ -141,7 +141,7 @@ static uint8_t send_read_command(uint8_t cmd)\n uint8_t i = 0;\n uint8_t n = 2;\n for (; i < n; i++) {\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n if (msr == 0xd0) {\n break;\n }\n@@ -197,7 +197,7 @@ static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)\n uint16_t i = 0;\n uint8_t n = 2;\n for (; i < n; i++) {\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n if (msr == (BUSY | NONDMA | DIO | RQM)) {\n break;\n }\n@@ -210,12 +210,12 @@ static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)\n\n /* Non-DMA mode */\n for (i = 0; i < 512 * 2 * nb_sect; i++) {\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_set(msr, BUSY | RQM | DIO);\n- inb(FLOPPY_BASE + reg_fifo);\n+ inb(global_qtest, FLOPPY_BASE + reg_fifo);\n }\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_set(msr, BUSY | RQM | DIO);\n g_assert(get_irq(global_qtest, FLOPPY_IRQ));\n\n@@ -233,7 +233,7 @@ static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)\n floppy_recv();\n\n /* Check that we're back in command phase */\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_clear(msr, BUSY | DIO);\n assert_bit_set(msr, RQM);\n g_assert(!get_irq(global_qtest, FLOPPY_IRQ));\n@@ -255,8 +255,8 @@ static void send_seek(int cyl)\n\n static uint8_t cmos_read(uint8_t reg)\n {\n- outb(base + 0, reg);\n- return inb(base + 1);\n+ outb(global_qtest, base + 0, reg);\n+ return inb(global_qtest, base + 1);\n }\n\n static void test_cmos(void)\n@@ -273,14 +273,14 @@ static void test_no_media_on_start(void)\n\n /* Media changed bit must be set all time after start if there is\n * no media in drive. */\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n send_seek(1);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n }\n\n@@ -302,22 +302,22 @@ static void test_media_insert(void)\n \" 'id':'floppy0', 'filename': %s, 'format': 'raw' }}\",\n test_image);\n\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n\n send_seek(0);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n\n /* Step to next track should clear DSKCHG bit. */\n send_seek(1);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_clear(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_clear(dir, DSKCHG);\n }\n\n@@ -332,21 +332,21 @@ static void test_media_change(void)\n qmp_discard_response(\"{'execute':'eject', 'arguments':{\"\n \" 'id':'floppy0' }}\");\n\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n\n send_seek(0);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n\n send_seek(1);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n- dir = inb(FLOPPY_BASE + reg_dir);\n+ dir = inb(global_qtest, FLOPPY_BASE + reg_dir);\n assert_bit_set(dir, DSKCHG);\n }\n\n@@ -416,7 +416,7 @@ static void test_read_id(void)\n g_assert(!get_irq(global_qtest, FLOPPY_IRQ));\n floppy_send(head << 2 | drive);\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n if (!get_irq(global_qtest, FLOPPY_IRQ)) {\n assert_bit_set(msr, BUSY);\n assert_bit_clear(msr, RQM);\n@@ -427,7 +427,7 @@ static void test_read_id(void)\n clock_step(global_qtest, 1000000000LL / 50);\n }\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_set(msr, BUSY | RQM | DIO);\n\n st0 = floppy_recv();\n@@ -459,7 +459,7 @@ static void test_read_id(void)\n g_assert(!get_irq(global_qtest, FLOPPY_IRQ));\n floppy_send(head << 2 | drive);\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n if (!get_irq(global_qtest, FLOPPY_IRQ)) {\n assert_bit_set(msr, BUSY);\n assert_bit_clear(msr, RQM);\n@@ -470,7 +470,7 @@ static void test_read_id(void)\n clock_step(global_qtest, 1000000000LL / 50);\n }\n\n- msr = inb(FLOPPY_BASE + reg_msr);\n+ msr = inb(global_qtest, FLOPPY_BASE + reg_msr);\n assert_bit_set(msr, BUSY | RQM | DIO);\n\n st0 = floppy_recv();\n@@ -492,7 +492,8 @@ static void test_read_no_dma_1(void)\n {\n uint8_t ret;\n\n- outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);\n+ outb(global_qtest, FLOPPY_BASE + reg_dor,\n+ inb(global_qtest, FLOPPY_BASE + reg_dor) & ~0x08);\n send_seek(0);\n ret = send_read_no_dma_command(1, 0x04);\n g_assert(ret == 0);\n@@ -502,7 +503,8 @@ static void test_read_no_dma_18(void)\n {\n uint8_t ret;\n\n- outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);\n+ outb(global_qtest, FLOPPY_BASE + reg_dor,\n+ inb(global_qtest, FLOPPY_BASE + reg_dor) & ~0x08);\n send_seek(0);\n ret = send_read_no_dma_command(18, 0x04);\n g_assert(ret == 0);\n@@ -512,7 +514,8 @@ static void test_read_no_dma_19(void)\n {\n uint8_t ret;\n\n- outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);\n+ outb(global_qtest, FLOPPY_BASE + reg_dor,\n+ inb(global_qtest, FLOPPY_BASE + reg_dor) & ~0x08);\n send_seek(0);\n ret = send_read_no_dma_command(19, 0x20);\n g_assert(ret == 0);\n@@ -537,8 +540,8 @@ static void fuzz_registers(void)\n reg = (uint8_t)g_test_rand_int_range(0, 8);\n val = (uint8_t)g_test_rand_int_range(0, 256);\n\n- outb(FLOPPY_BASE + reg, val);\n- inb(FLOPPY_BASE + reg);\n+ outb(global_qtest, FLOPPY_BASE + reg, val);\n+ inb(global_qtest, FLOPPY_BASE + reg);\n }\n }\n\ndiff --git a/tests/hd-geo-test.c b/tests/hd-geo-test.c\nindex 406eea3c56..98e6621e6c 100644\n--- a/tests/hd-geo-test.c\n+++ b/tests/hd-geo-test.c\n@@ -82,8 +82,8 @@ static void test_cmos_byte(int reg, int expected)\n enum { cmos_base = 0x70 };\n int actual;\n\n- outb(cmos_base + 0, reg);\n- actual = inb(cmos_base + 1);\n+ outb(global_qtest, cmos_base + 0, reg);\n+ actual = inb(global_qtest, cmos_base + 1);\n g_assert(actual == expected);\n }\n\ndiff --git a/tests/ipmi-bt-test.c b/tests/ipmi-bt-test.c\nindex f80a9a83c9..e25819fd4f 100644\n--- a/tests/ipmi-bt-test.c\n+++ b/tests/ipmi-bt-test.c\n@@ -66,32 +66,32 @@ static int bt_ints_enabled;\n\n static uint8_t bt_get_ctrlreg(void)\n {\n- return inb(IPMI_BT_BASE);\n+ return inb(global_qtest, IPMI_BT_BASE);\n }\n\n static void bt_write_ctrlreg(uint8_t val)\n {\n- outb(IPMI_BT_BASE, val);\n+ outb(global_qtest, IPMI_BT_BASE, val);\n }\n\n static uint8_t bt_get_buf(void)\n {\n- return inb(IPMI_BT_BASE + 1);\n+ return inb(global_qtest, IPMI_BT_BASE + 1);\n }\n\n static void bt_write_buf(uint8_t val)\n {\n- outb(IPMI_BT_BASE + 1, val);\n+ outb(global_qtest, IPMI_BT_BASE + 1, val);\n }\n\n static uint8_t bt_get_irqreg(void)\n {\n- return inb(IPMI_BT_BASE + 2);\n+ return inb(global_qtest, IPMI_BT_BASE + 2);\n }\n\n static void bt_write_irqreg(uint8_t val)\n {\n- outb(IPMI_BT_BASE + 2, val);\n+ outb(global_qtest, IPMI_BT_BASE + 2, val);\n }\n\n static void bt_wait_b_busy(void)\ndiff --git a/tests/ipmi-kcs-test.c b/tests/ipmi-kcs-test.c\nindex ddad8dd22f..d27b9de185 100644\n--- a/tests/ipmi-kcs-test.c\n+++ b/tests/ipmi-kcs-test.c\n@@ -52,22 +52,22 @@ static int kcs_ints_enabled;\n\n static uint8_t kcs_get_cmdreg(void)\n {\n- return inb(IPMI_KCS_BASE + 1);\n+ return inb(global_qtest, IPMI_KCS_BASE + 1);\n }\n\n static void kcs_write_cmdreg(uint8_t val)\n {\n- outb(IPMI_KCS_BASE + 1, val);\n+ outb(global_qtest, IPMI_KCS_BASE + 1, val);\n }\n\n static uint8_t kcs_get_datareg(void)\n {\n- return inb(IPMI_KCS_BASE);\n+ return inb(global_qtest, IPMI_KCS_BASE);\n }\n\n static void kcs_write_datareg(uint8_t val)\n {\n- outb(IPMI_KCS_BASE, val);\n+ outb(global_qtest, IPMI_KCS_BASE, val);\n }\n\n static void kcs_wait_ibf(void)\ndiff --git a/tests/libqos/fw_cfg.c b/tests/libqos/fw_cfg.c\nindex d0889d1e22..157d5190c6 100644\n--- a/tests/libqos/fw_cfg.c\n+++ b/tests/libqos/fw_cfg.c\n@@ -83,7 +83,7 @@ QFWCFG *mm_fw_cfg_init(QTestState *qts, uint64_t base)\n\n static void io_fw_cfg_select(QFWCFG *fw_cfg, uint16_t key)\n {\n- qtest_outw(fw_cfg->qts, fw_cfg->base, key);\n+ outw(fw_cfg->qts, fw_cfg->base, key);\n }\n\n static void io_fw_cfg_read(QFWCFG *fw_cfg, void *data, size_t len)\n@@ -92,7 +92,7 @@ static void io_fw_cfg_read(QFWCFG *fw_cfg, void *data, size_t len)\n int i;\n\n for (i = 0; i < len; i++) {\n- ptr[i] = qtest_inb(fw_cfg->qts, fw_cfg->base + 1);\n+ ptr[i] = inb(fw_cfg->qts, fw_cfg->base + 1);\n }\n }\n\ndiff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c\nindex e5af083f0c..4d8329bef0 100644\n--- a/tests/libqos/pci-pc.c\n+++ b/tests/libqos/pci-pc.c\n@@ -26,44 +26,44 @@ typedef struct QPCIBusPC\n\n static uint8_t qpci_pc_pio_readb(QPCIBus *bus, uint32_t addr)\n {\n- return qtest_inb(bus->qts, addr);\n+ return inb(bus->qts, addr);\n }\n\n static void qpci_pc_pio_writeb(QPCIBus *bus, uint32_t addr, uint8_t val)\n {\n- qtest_outb(bus->qts, addr, val);\n+ outb(bus->qts, addr, val);\n }\n\n static uint16_t qpci_pc_pio_readw(QPCIBus *bus, uint32_t addr)\n {\n- return qtest_inw(bus->qts, addr);\n+ return inw(bus->qts, addr);\n }\n\n static void qpci_pc_pio_writew(QPCIBus *bus, uint32_t addr, uint16_t val)\n {\n- qtest_outw(bus->qts, addr, val);\n+ outw(bus->qts, addr, val);\n }\n\n static uint32_t qpci_pc_pio_readl(QPCIBus *bus, uint32_t addr)\n {\n- return qtest_inl(bus->qts, addr);\n+ return inl(bus->qts, addr);\n }\n\n static void qpci_pc_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)\n {\n- qtest_outl(bus->qts, addr, val);\n+ outl(bus->qts, addr, val);\n }\n\n static uint64_t qpci_pc_pio_readq(QPCIBus *bus, uint32_t addr)\n {\n- return (uint64_t)qtest_inl(bus->qts, addr) +\n- ((uint64_t)qtest_inl(bus->qts, addr + 4) << 32);\n+ return (uint64_t)inl(bus->qts, addr) +\n+ ((uint64_t)inl(bus->qts, addr + 4) << 32);\n }\n\n static void qpci_pc_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)\n {\n- qtest_outl(bus->qts, addr, val & 0xffffffff);\n- qtest_outl(bus->qts, addr + 4, val >> 32);\n+ outl(bus->qts, addr, val & 0xffffffff);\n+ outl(bus->qts, addr + 4, val >> 32);\n }\n\n static void qpci_pc_memread(QPCIBus *bus, uint32_t addr, void *buf, size_t len)\n@@ -79,38 +79,38 @@ static void qpci_pc_memwrite(QPCIBus *bus, uint32_t addr,\n\n static uint8_t qpci_pc_config_readb(QPCIBus *bus, int devfn, uint8_t offset)\n {\n- qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n- return qtest_inb(bus->qts, 0xcfc);\n+ outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n+ return inb(bus->qts, 0xcfc);\n }\n\n static uint16_t qpci_pc_config_readw(QPCIBus *bus, int devfn, uint8_t offset)\n {\n- qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n- return qtest_inw(bus->qts, 0xcfc);\n+ outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n+ return inw(bus->qts, 0xcfc);\n }\n\n static uint32_t qpci_pc_config_readl(QPCIBus *bus, int devfn, uint8_t offset)\n {\n- qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n- return qtest_inl(bus->qts, 0xcfc);\n+ outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n+ return inl(bus->qts, 0xcfc);\n }\n\n static void qpci_pc_config_writeb(QPCIBus *bus, int devfn, uint8_t offset, uint8_t value)\n {\n- qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n- qtest_outb(bus->qts, 0xcfc, value);\n+ outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n+ outb(bus->qts, 0xcfc, value);\n }\n\n static void qpci_pc_config_writew(QPCIBus *bus, int devfn, uint8_t offset, uint16_t value)\n {\n- qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n- qtest_outw(bus->qts, 0xcfc, value);\n+ outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n+ outw(bus->qts, 0xcfc, value);\n }\n\n static void qpci_pc_config_writel(QPCIBus *bus, int devfn, uint8_t offset, uint32_t value)\n {\n- qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n- qtest_outl(bus->qts, 0xcfc, value);\n+ outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n+ outl(bus->qts, 0xcfc, value);\n }\n\n QPCIBus *qpci_init_pc(QTestState *qts, QGuestAllocator *alloc)\ndiff --git a/tests/libqos/pci.c b/tests/libqos/pci.c\nindex d3ee21fdfd..aac42dc3d9 100644\n--- a/tests/libqos/pci.c\n+++ b/tests/libqos/pci.c\n@@ -426,7 +426,7 @@ void qpci_unplug_device_test(QTestState *qts, const char *id, uint8_t slot)\n g_assert(!qdict_haskey(response, \"error\"));\n QDECREF(response);\n\n- qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);\n+ outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);\n\n qtest_qmp_eventwait(qts, \"DEVICE_DELETED\");\n }\ndiff --git a/tests/m48t59-test.c b/tests/m48t59-test.c\nindex aadd770f4f..7ef3e2d26a 100644\n--- a/tests/m48t59-test.c\n+++ b/tests/m48t59-test.c\n@@ -44,14 +44,14 @@ static void cmos_write_mmio(uint8_t reg, uint8_t val)\n\n static uint8_t cmos_read_ioio(uint8_t reg)\n {\n- outw(base + 0, reg_base + (uint16_t)reg);\n- return inb(base + 3);\n+ outw(global_qtest, base + 0, reg_base + (uint16_t)reg);\n+ return inb(global_qtest, base + 3);\n }\n\n static void cmos_write_ioio(uint8_t reg, uint8_t val)\n {\n- outw(base + 0, reg_base + (uint16_t)reg);\n- outb(base + 3, val);\n+ outw(global_qtest, base + 0, reg_base + (uint16_t)reg);\n+ outb(global_qtest, base + 3, val);\n }\n\n static uint8_t cmos_read(uint8_t reg)\ndiff --git a/tests/multiboot/libc.c b/tests/multiboot/libc.c\nindex 6df9bda96d..bf02987c5e 100644\n--- a/tests/multiboot/libc.c\n+++ b/tests/multiboot/libc.c\n@@ -36,7 +36,7 @@ void* memcpy(void *dest, const void *src, int n)\n\n static void print_char(char c)\n {\n- outb(0xe9, c);\n+ outb(global_qtest, 0xe9, c);\n }\n\n static void print_str(char *s)\ndiff --git a/tests/pvpanic-test.c b/tests/pvpanic-test.c\nindex c09b3ddac6..6dce9e368a 100644\n--- a/tests/pvpanic-test.c\n+++ b/tests/pvpanic-test.c\n@@ -15,10 +15,10 @@ static void test_panic(void)\n uint8_t val;\n QDict *response, *data;\n\n- val = inb(0x505);\n+ val = inb(global_qtest, 0x505);\n g_assert_cmpuint(val, ==, 1);\n\n- outb(0x505, 0x1);\n+ outb(global_qtest, 0x505, 0x1);\n\n response = qmp_receive();\n g_assert(qdict_haskey(response, \"event\"));\ndiff --git a/tests/rtc-test.c b/tests/rtc-test.c\nindex 8ff201993e..aea7eaec9f 100644\n--- a/tests/rtc-test.c\n+++ b/tests/rtc-test.c\n@@ -28,14 +28,14 @@ static int bcd2dec(int value)\n\n static uint8_t cmos_read(uint8_t reg)\n {\n- outb(base + 0, reg);\n- return inb(base + 1);\n+ outb(global_qtest, base + 0, reg);\n+ return inb(global_qtest, base + 1);\n }\n\n static void cmos_write(uint8_t reg, uint8_t val)\n {\n- outb(base + 0, reg);\n- outb(base + 1, val);\n+ outb(global_qtest, base + 0, reg);\n+ outb(global_qtest, base + 1, val);\n }\n\n static int tm_cmp(struct tm *lhs, struct tm *rhs)\ndiff --git a/tests/wdt_ib700-test.c b/tests/wdt_ib700-test.c\nindex 5ce8f4a08a..b2ff95bfd7 100644\n--- a/tests/wdt_ib700-test.c\n+++ b/tests/wdt_ib700-test.c\n@@ -26,22 +26,22 @@ static QDict *ib700_program_and_wait(QTestState *s)\n qmp_check_no_event(s);\n\n /* 2 second limit */\n- qtest_outb(s, 0x443, 14);\n+ outb(s, 0x443, 14);\n\n /* Ping */\n clock_step(s, NANOSECONDS_PER_SECOND);\n qmp_check_no_event(s);\n- qtest_outb(s, 0x443, 14);\n+ outb(s, 0x443, 14);\n\n /* Disable */\n clock_step(s, NANOSECONDS_PER_SECOND);\n qmp_check_no_event(s);\n- qtest_outb(s, 0x441, 1);\n+ outb(s, 0x441, 1);\n clock_step(s, 3 * NANOSECONDS_PER_SECOND);\n qmp_check_no_event(s);\n\n /* Enable and let it fire */\n- qtest_outb(s, 0x443, 13);\n+ outb(s, 0x443, 13);\n clock_step(s, 3 * NANOSECONDS_PER_SECOND);\n qmp_check_no_event(s);\n clock_step(s, 2 * NANOSECONDS_PER_SECOND);\n", "prefixes": [ "v7", "33/38" ] }