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GET /api/patches/812503/?format=api
{ "id": 812503, "url": "http://patchwork.ozlabs.org/api/patches/812503/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911172022.4738-13-eblake@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170911172022.4738-13-eblake@redhat.com>", "list_archive_url": null, "date": "2017-09-11T17:19:56", "name": "[v7,12/38] libqos: Use explicit QTestState for virtio operations", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7494753297a58eb0dec92c60f22e343fc09c86e2", "submitter": { "id": 6591, "url": "http://patchwork.ozlabs.org/api/people/6591/?format=api", "name": "Eric Blake", "email": "eblake@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911172022.4738-13-eblake@redhat.com/mbox/", "series": [ { "id": 2534, "url": "http://patchwork.ozlabs.org/api/series/2534/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2534", "date": "2017-09-11T17:19:47", "name": "Preliminary libqtest cleanups", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/2534/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812503/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812503/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx06.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx06.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=eblake@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrb5V2dNVz9s83\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 03:49:02 +1000 (AEST)", "from localhost ([::1]:59473 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1drSpQ-00080X-Eg\n\tfor incoming@patchwork.ozlabs.org; Mon, 11 Sep 2017 13:49:00 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:38460)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <eblake@redhat.com>) id 1drSOL-0007IH-Eb\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:21:05 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <eblake@redhat.com>) id 1drSOJ-0001C7-8T\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:21:01 -0400", "from mx1.redhat.com ([209.132.183.28]:57040)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <eblake@redhat.com>)\n\tid 1drSOD-00015w-Fx; Mon, 11 Sep 2017 13:20:53 -0400", "from smtp.corp.redhat.com\n\t(int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id A6B6118423D;\n\tMon, 11 Sep 2017 17:20:52 +0000 (UTC)", "from red.redhat.com (ovpn-120-44.rdu2.redhat.com [10.10.120.44])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id DFF215E241;\n\tMon, 11 Sep 2017 17:20:50 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com A6B6118423D", "From": "Eric Blake <eblake@redhat.com>", "To": "qemu-devel@nongnu.org", "Date": "Mon, 11 Sep 2017 12:19:56 -0500", "Message-Id": "<20170911172022.4738-13-eblake@redhat.com>", "In-Reply-To": "<20170911172022.4738-1-eblake@redhat.com>", "References": "<20170911172022.4738-1-eblake@redhat.com>", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.14", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.30]);\n\tMon, 11 Sep 2017 17:20:52 +0000 (UTC)", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v7 12/38] libqos: Use explicit QTestState for\n\tvirtio operations", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "pbonzini@redhat.com, thuth@redhat.com,\n\t\"open list:virtio-blk\" <qemu-block@nongnu.org>,\n\tarmbru@redhat.com, Stefan Hajnoczi <stefanha@redhat.com>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Now that QVirtioDevice and QVirtQueue point back to QVirtioBus,\nwe can reuse the explicit QTestState stored there rather than\nrelying on implicit global_qtest. We also have to pass QTestState\nthrough a few functions that can't trace back through\nQVirtioDevice, and update those callers.\n\nDrop some useless casts while touching things.\n\nSigned-off-by: Eric Blake <eblake@redhat.com>\n---\n tests/libqos/virtio.h | 6 ++--\n tests/libqos/virtio-mmio.c | 57 ++++++++++++++++++-------------\n tests/libqos/virtio-pci.c | 8 ++---\n tests/libqos/virtio.c | 84 ++++++++++++++++++++++++++--------------------\n tests/virtio-blk-test.c | 11 +++---\n 5 files changed, 94 insertions(+), 72 deletions(-)", "diff": "diff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h\nindex def46ad9bb..cc57b77de8 100644\n--- a/tests/libqos/virtio.h\n+++ b/tests/libqos/virtio.h\n@@ -96,7 +96,7 @@ struct QVirtioBus {\n static inline bool qvirtio_is_big_endian(QVirtioDevice *d)\n {\n /* FIXME: virtio 1.0 is always little-endian */\n- return qtest_big_endian(global_qtest);\n+ return qtest_big_endian(d->bus->qts);\n }\n\n static inline uint32_t qvring_size(uint32_t num, uint32_t align)\n@@ -139,8 +139,8 @@ void qvirtqueue_cleanup(const QVirtioBus *bus, QVirtQueue *vq,\n void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr);\n QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d,\n QGuestAllocator *alloc, uint16_t elem);\n-void qvring_indirect_desc_add(QVRingIndirectDesc *indirect, uint64_t data,\n- uint32_t len, bool write);\n+void qvring_indirect_desc_add(QTestState *qts, QVRingIndirectDesc *indirect,\n+ uint64_t data, uint32_t len, bool write);\n uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write,\n bool next);\n uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect);\ndiff --git a/tests/libqos/virtio-mmio.c b/tests/libqos/virtio-mmio.c\nindex 12770319cd..8d256f6ac9 100644\n--- a/tests/libqos/virtio-mmio.c\n+++ b/tests/libqos/virtio-mmio.c\n@@ -18,40 +18,45 @@\n static uint8_t qvirtio_mmio_config_readb(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readb(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readb(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint16_t qvirtio_mmio_config_readw(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readw(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readw(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint32_t qvirtio_mmio_config_readl(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readl(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readl(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint64_t qvirtio_mmio_config_readq(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readq(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readq(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint32_t qvirtio_mmio_get_features(QVirtioDevice *d)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0);\n- return readl(dev->addr + QVIRTIO_MMIO_HOST_FEATURES);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0);\n+ return qtest_readl(d->bus->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES);\n }\n\n static void qvirtio_mmio_set_features(QVirtioDevice *d, uint32_t features)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n dev->features = features;\n- writel(dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0);\n- writel(dev->addr + QVIRTIO_MMIO_GUEST_FEATURES, features);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES,\n+ features);\n }\n\n static uint32_t qvirtio_mmio_get_guest_features(QVirtioDevice *d)\n@@ -63,13 +68,13 @@ static uint32_t qvirtio_mmio_get_guest_features(QVirtioDevice *d)\n static uint8_t qvirtio_mmio_get_status(QVirtioDevice *d)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return (uint8_t)readl(dev->addr + QVIRTIO_MMIO_DEVICE_STATUS);\n+ return qtest_readl(d->bus->qts, dev->addr + QVIRTIO_MMIO_DEVICE_STATUS);\n }\n\n static void qvirtio_mmio_set_status(QVirtioDevice *d, uint8_t status)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_DEVICE_STATUS, (uint32_t)status);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_DEVICE_STATUS, status);\n }\n\n static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)\n@@ -77,9 +82,10 @@ static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n uint32_t isr;\n\n- isr = readl(dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 1;\n+ isr = qtest_readl(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 1;\n if (isr != 0) {\n- writel(dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1);\n return true;\n }\n\n@@ -91,9 +97,10 @@ static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d)\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n uint32_t isr;\n\n- isr = readl(dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 2;\n+ isr = qtest_readl(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 2;\n if (isr != 0) {\n- writel(dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2);\n return true;\n }\n\n@@ -103,21 +110,22 @@ static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d)\n static void qvirtio_mmio_queue_select(QVirtioDevice *d, uint16_t index)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_SEL, (uint32_t)index);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_QUEUE_SEL, index);\n\n- g_assert_cmphex(readl(dev->addr + QVIRTIO_MMIO_QUEUE_PFN), ==, 0);\n+ g_assert_cmphex(qtest_readl(d->bus->qts,\n+ dev->addr + QVIRTIO_MMIO_QUEUE_PFN), ==, 0);\n }\n\n static uint16_t qvirtio_mmio_get_queue_size(QVirtioDevice *d)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return (uint16_t)readl(dev->addr + QVIRTIO_MMIO_QUEUE_NUM_MAX);\n+ return qtest_readl(d->bus->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NUM_MAX);\n }\n\n static void qvirtio_mmio_set_queue_address(QVirtioDevice *d, uint32_t pfn)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_PFN, pfn);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_QUEUE_PFN, pfn);\n }\n\n static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,\n@@ -129,7 +137,8 @@ static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,\n\n vq = g_malloc0(sizeof(*vq));\n qvirtio_mmio_queue_select(d, index);\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_ALIGN, dev->page_size);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_QUEUE_ALIGN,\n+ dev->page_size);\n\n vq->dev = d;\n vq->index = index;\n@@ -140,7 +149,7 @@ static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,\n vq->indirect = (dev->features & (1u << VIRTIO_RING_F_INDIRECT_DESC)) != 0;\n vq->event = (dev->features & (1u << VIRTIO_RING_F_EVENT_IDX)) != 0;\n\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_NUM, vq->size);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NUM, vq->size);\n\n /* Check different than 0 */\n g_assert_cmpint(vq->size, !=, 0);\n@@ -165,7 +174,7 @@ static void qvirtio_mmio_virtqueue_cleanup(QVirtQueue *vq,\n static void qvirtio_mmio_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_NOTIFY, vq->index);\n+ qtest_writel(d->bus->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NOTIFY, vq->index);\n }\n\n const QVirtioBus qvirtio_mmio = {\n@@ -195,15 +204,15 @@ QVirtioMMIODevice *qvirtio_mmio_init_device(QTestState *qts, uint64_t addr,\n uint32_t magic;\n dev = g_malloc0(sizeof(*dev));\n\n- magic = readl(addr + QVIRTIO_MMIO_MAGIC_VALUE);\n+ magic = qtest_readl(qts, addr + QVIRTIO_MMIO_MAGIC_VALUE);\n g_assert(magic == ('v' | 'i' << 8 | 'r' << 16 | 't' << 24));\n\n dev->addr = addr;\n dev->page_size = page_size;\n- dev->vdev.device_type = readl(addr + QVIRTIO_MMIO_DEVICE_ID);\n+ dev->vdev.device_type = qtest_readl(qts, addr + QVIRTIO_MMIO_DEVICE_ID);\n dev->vdev.bus = qvirtio_init_bus(qts, &qvirtio_mmio);\n\n- writel(addr + QVIRTIO_MMIO_GUEST_PAGE_SIZE, page_size);\n+ qtest_writel(qts, addr + QVIRTIO_MMIO_GUEST_PAGE_SIZE, page_size);\n\n return dev;\n }\ndiff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c\nindex 6225e6df9b..a7b17b3ba2 100644\n--- a/tests/libqos/virtio-pci.c\n+++ b/tests/libqos/virtio-pci.c\n@@ -168,9 +168,9 @@ static bool qvirtio_pci_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)\n /* No ISR checking should be done if masked, but read anyway */\n return qpci_msix_pending(dev->pdev, vqpci->msix_entry);\n } else {\n- data = readl(vqpci->msix_addr);\n+ data = qtest_readl(d->bus->qts, vqpci->msix_addr);\n if (data == vqpci->msix_data) {\n- writel(vqpci->msix_addr, 0);\n+ qtest_writel(d->bus->qts, vqpci->msix_addr, 0);\n return true;\n } else {\n return false;\n@@ -192,9 +192,9 @@ static bool qvirtio_pci_get_config_isr_status(QVirtioDevice *d)\n /* No ISR checking should be done if masked, but read anyway */\n return qpci_msix_pending(dev->pdev, dev->config_msix_entry);\n } else {\n- data = readl(dev->config_msix_addr);\n+ data = qtest_readl(d->bus->qts, dev->config_msix_addr);\n if (data == dev->config_msix_data) {\n- writel(dev->config_msix_addr, 0);\n+ qtest_writel(d->bus->qts, dev->config_msix_addr, 0);\n return true;\n } else {\n return false;\ndiff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c\nindex 2b7d9e62c4..2212830742 100644\n--- a/tests/libqos/virtio.c\n+++ b/tests/libqos/virtio.c\n@@ -97,7 +97,7 @@ void qvirtio_wait_queue_isr(QVirtioDevice *d,\n gint64 start_time = g_get_monotonic_time();\n\n for (;;) {\n- clock_step(100);\n+ qtest_clock_step(d->bus->qts, 100);\n if (d->bus->get_queue_isr_status(d, vq)) {\n return;\n }\n@@ -118,8 +118,8 @@ uint8_t qvirtio_wait_status_byte_no_isr(QVirtioDevice *d,\n gint64 start_time = g_get_monotonic_time();\n uint8_t val;\n\n- while ((val = readb(addr)) == 0xff) {\n- clock_step(100);\n+ while ((val = qtest_readb(d->bus->qts, addr)) == 0xff) {\n+ qtest_clock_step(d->bus->qts, 100);\n g_assert(!d->bus->get_queue_isr_status(d, vq));\n g_assert(g_get_monotonic_time() - start_time <= timeout_us);\n }\n@@ -143,7 +143,7 @@ void qvirtio_wait_used_elem(QVirtioDevice *d,\n for (;;) {\n uint32_t got_desc_idx;\n\n- clock_step(100);\n+ qtest_clock_step(d->bus->qts, 100);\n\n if (d->bus->get_queue_isr_status(d, vq) &&\n qvirtqueue_get_buf(vq, &got_desc_idx)) {\n@@ -160,7 +160,7 @@ void qvirtio_wait_config_isr(QVirtioDevice *d, gint64 timeout_us)\n gint64 start_time = g_get_monotonic_time();\n\n for (;;) {\n- clock_step(100);\n+ qtest_clock_step(d->bus->qts, 100);\n if (d->bus->get_config_isr_status(d)) {\n return;\n }\n@@ -179,22 +179,23 @@ void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr)\n\n for (i = 0; i < vq->size - 1; i++) {\n /* vq->desc[i].addr */\n- writeq(vq->desc + (16 * i), 0);\n+ qtest_writeq(vq->dev->bus->qts, vq->desc + (16 * i), 0);\n /* vq->desc[i].next */\n- writew(vq->desc + (16 * i) + 14, i + 1);\n+ qtest_writew(vq->dev->bus->qts, vq->desc + (16 * i) + 14, i + 1);\n }\n\n /* vq->avail->flags */\n- writew(vq->avail, 0);\n+ qtest_writew(vq->dev->bus->qts, vq->avail, 0);\n /* vq->avail->idx */\n- writew(vq->avail + 2, 0);\n+ qtest_writew(vq->dev->bus->qts, vq->avail + 2, 0);\n /* vq->avail->used_event */\n- writew(vq->avail + 4 + (2 * vq->size), 0);\n+ qtest_writew(vq->dev->bus->qts, vq->avail + 4 + (2 * vq->size), 0);\n\n /* vq->used->flags */\n- writew(vq->used, 0);\n+ qtest_writew(vq->dev->bus->qts, vq->used, 0);\n /* vq->used->avail_event */\n- writew(vq->used + 2 + sizeof(struct vring_used_elem) * vq->size, 0);\n+ qtest_writew(vq->dev->bus->qts,\n+ vq->used + 2 + sizeof(struct vring_used_elem) * vq->size, 0);\n }\n\n QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d,\n@@ -209,35 +210,36 @@ QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d,\n\n for (i = 0; i < elem - 1; ++i) {\n /* indirect->desc[i].addr */\n- writeq(indirect->desc + (16 * i), 0);\n+ qtest_writeq(d->bus->qts, indirect->desc + (16 * i), 0);\n /* indirect->desc[i].flags */\n- writew(indirect->desc + (16 * i) + 12, VRING_DESC_F_NEXT);\n+ qtest_writew(d->bus->qts, indirect->desc + (16 * i) + 12,\n+ VRING_DESC_F_NEXT);\n /* indirect->desc[i].next */\n- writew(indirect->desc + (16 * i) + 14, i + 1);\n+ qtest_writew(d->bus->qts, indirect->desc + (16 * i) + 14, i + 1);\n }\n\n return indirect;\n }\n\n-void qvring_indirect_desc_add(QVRingIndirectDesc *indirect, uint64_t data,\n- uint32_t len, bool write)\n+void qvring_indirect_desc_add(QTestState *qts, QVRingIndirectDesc *indirect,\n+ uint64_t data, uint32_t len, bool write)\n {\n uint16_t flags;\n\n g_assert_cmpint(indirect->index, <, indirect->elem);\n\n- flags = readw(indirect->desc + (16 * indirect->index) + 12);\n+ flags = qtest_readw(qts, indirect->desc + (16 * indirect->index) + 12);\n\n if (write) {\n flags |= VRING_DESC_F_WRITE;\n }\n\n /* indirect->desc[indirect->index].addr */\n- writeq(indirect->desc + (16 * indirect->index), data);\n+ qtest_writeq(qts, indirect->desc + (16 * indirect->index), data);\n /* indirect->desc[indirect->index].len */\n- writel(indirect->desc + (16 * indirect->index) + 8, len);\n+ qtest_writel(qts, indirect->desc + (16 * indirect->index) + 8, len);\n /* indirect->desc[indirect->index].flags */\n- writew(indirect->desc + (16 * indirect->index) + 12, flags);\n+ qtest_writew(qts, indirect->desc + (16 * indirect->index) + 12, flags);\n\n indirect->index++;\n }\n@@ -257,11 +259,12 @@ uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write,\n }\n\n /* vq->desc[vq->free_head].addr */\n- writeq(vq->desc + (16 * vq->free_head), data);\n+ qtest_writeq(vq->dev->bus->qts, vq->desc + (16 * vq->free_head), data);\n /* vq->desc[vq->free_head].len */\n- writel(vq->desc + (16 * vq->free_head) + 8, len);\n+ qtest_writel(vq->dev->bus->qts, vq->desc + (16 * vq->free_head) + 8, len);\n /* vq->desc[vq->free_head].flags */\n- writew(vq->desc + (16 * vq->free_head) + 12, flags);\n+ qtest_writew(vq->dev->bus->qts, vq->desc + (16 * vq->free_head) + 12,\n+ flags);\n\n return vq->free_head++; /* Return and increase, in this order */\n }\n@@ -275,12 +278,14 @@ uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect)\n vq->num_free--;\n\n /* vq->desc[vq->free_head].addr */\n- writeq(vq->desc + (16 * vq->free_head), indirect->desc);\n+ qtest_writeq(vq->dev->bus->qts, vq->desc + (16 * vq->free_head),\n+ indirect->desc);\n /* vq->desc[vq->free_head].len */\n- writel(vq->desc + (16 * vq->free_head) + 8,\n- sizeof(struct vring_desc) * indirect->elem);\n+ qtest_writel(vq->dev->bus->qts, vq->desc + (16 * vq->free_head) + 8,\n+ sizeof(struct vring_desc) * indirect->elem);\n /* vq->desc[vq->free_head].flags */\n- writew(vq->desc + (16 * vq->free_head) + 12, VRING_DESC_F_INDIRECT);\n+ qtest_writew(vq->dev->bus->qts,\n+ vq->desc + (16 * vq->free_head) + 12, VRING_DESC_F_INDIRECT);\n\n return vq->free_head++; /* Return and increase, in this order */\n }\n@@ -288,21 +293,24 @@ uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect)\n void qvirtqueue_kick(QVirtioDevice *d, QVirtQueue *vq, uint32_t free_head)\n {\n /* vq->avail->idx */\n- uint16_t idx = readw(vq->avail + 2);\n+ uint16_t idx = qtest_readw(d->bus->qts, vq->avail + 2);\n /* vq->used->flags */\n uint16_t flags;\n /* vq->used->avail_event */\n uint16_t avail_event;\n\n+ assert(vq->dev == d);\n+\n /* vq->avail->ring[idx % vq->size] */\n- writew(vq->avail + 4 + (2 * (idx % vq->size)), free_head);\n+ qtest_writew(d->bus->qts, vq->avail + 4 + (2 * (idx % vq->size)),\n+ free_head);\n /* vq->avail->idx */\n- writew(vq->avail + 2, idx + 1);\n+ qtest_writew(d->bus->qts, vq->avail + 2, idx + 1);\n\n /* Must read after idx is updated */\n- flags = readw(vq->avail);\n- avail_event = readw(vq->used + 4 +\n- sizeof(struct vring_used_elem) * vq->size);\n+ flags = qtest_readw(d->bus->qts, vq->avail);\n+ avail_event = qtest_readw(d->bus->qts, vq->used + 4 +\n+ sizeof(struct vring_used_elem) * vq->size);\n\n /* < 1 because we add elements to avail queue one by one */\n if ((flags & VRING_USED_F_NO_NOTIFY) == 0 &&\n@@ -323,7 +331,8 @@ bool qvirtqueue_get_buf(QVirtQueue *vq, uint32_t *desc_idx)\n {\n uint16_t idx;\n\n- idx = readw(vq->used + offsetof(struct vring_used, idx));\n+ idx = qtest_readw(vq->dev->bus->qts,\n+ vq->used + offsetof(struct vring_used, idx));\n if (idx == vq->last_used_idx) {\n return false;\n }\n@@ -335,7 +344,8 @@ bool qvirtqueue_get_buf(QVirtQueue *vq, uint32_t *desc_idx)\n offsetof(struct vring_used, ring) +\n (vq->last_used_idx % vq->size) *\n sizeof(struct vring_used_elem);\n- *desc_idx = readl(elem_addr + offsetof(struct vring_used_elem, id));\n+ *desc_idx = qtest_readl(vq->dev->bus->qts, elem_addr +\n+ offsetof(struct vring_used_elem, id));\n }\n\n vq->last_used_idx++;\n@@ -347,5 +357,5 @@ void qvirtqueue_set_used_event(QVirtQueue *vq, uint16_t idx)\n g_assert(vq->event);\n\n /* vq->avail->used_event */\n- writew(vq->avail + 4 + (2 * vq->size), idx);\n+ qtest_writew(vq->dev->bus->qts, vq->avail + 4 + (2 * vq->size), idx);\n }\ndiff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c\nindex 2d38c49bfe..99bb6f26cd 100644\n--- a/tests/virtio-blk-test.c\n+++ b/tests/virtio-blk-test.c\n@@ -343,8 +343,10 @@ static void pci_indirect(void)\n g_free(req.data);\n\n indirect = qvring_indirect_desc_setup(&dev->vdev, qs->alloc, 2);\n- qvring_indirect_desc_add(indirect, req_addr, 528, false);\n- qvring_indirect_desc_add(indirect, req_addr + 528, 1, true);\n+ qvring_indirect_desc_add(dev->vdev.bus->qts, indirect, req_addr, 528,\n+ false);\n+ qvring_indirect_desc_add(dev->vdev.bus->qts, indirect, req_addr + 528, 1,\n+ true);\n free_head = qvirtqueue_add_indirect(&vqpci->vq, indirect);\n qvirtqueue_kick(&dev->vdev, &vqpci->vq, free_head);\n\n@@ -368,8 +370,9 @@ static void pci_indirect(void)\n g_free(req.data);\n\n indirect = qvring_indirect_desc_setup(&dev->vdev, qs->alloc, 2);\n- qvring_indirect_desc_add(indirect, req_addr, 16, false);\n- qvring_indirect_desc_add(indirect, req_addr + 16, 513, true);\n+ qvring_indirect_desc_add(dev->vdev.bus->qts, indirect, req_addr, 16, false);\n+ qvring_indirect_desc_add(dev->vdev.bus->qts, indirect, req_addr + 16, 513,\n+ true);\n free_head = qvirtqueue_add_indirect(&vqpci->vq, indirect);\n qvirtqueue_kick(&dev->vdev, &vqpci->vq, free_head);\n\n", "prefixes": [ "v7", "12/38" ] }