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GET /api/patches/811858/?format=api
{ "id": 811858, "url": "http://patchwork.ozlabs.org/api/patches/811858/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1504910713-7094-3-git-send-email-linuxram@us.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1504910713-7094-3-git-send-email-linuxram@us.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1504910713-7094-3-git-send-email-linuxram@us.ibm.com/", "date": "2017-09-08T22:44:42", "name": "[2/7] powerpc: introduce pte_get_hash_gslot() helper", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "2de0b85e72e2db4dae91b21889de333ba1928d8a", "submitter": { "id": 2667, "url": "http://patchwork.ozlabs.org/api/people/2667/?format=api", "name": "Ram Pai", "email": "linuxram@us.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1504910713-7094-3-git-send-email-linuxram@us.ibm.com/mbox/", "series": [ { "id": 2303, "url": "http://patchwork.ozlabs.org/api/series/2303/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2303", "date": "2017-09-08T22:44:40", "name": "powerpc: Free up RPAGE_RSV bits", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2303/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811858/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811858/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpsyD5yxhz9s7v\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Sep 2017 08:51:48 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpsyD3CWNzDrk2\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Sep 2017 08:51:48 +1000 (AEST)", "from mail-qt0-x242.google.com (mail-qt0-x242.google.com\n\t[IPv6:2607:f8b0:400d:c0d::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpsr81lRWzDrWB\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Sep 2017 08:46:32 +1000 (AEST)", "by mail-qt0-x242.google.com with SMTP id b1so14326qtc.0\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Sep 2017 15:46:32 -0700 (PDT)", "from localhost.localdomain (50-39-103-96.bvtn.or.frontiernet.net.\n\t[50.39.103.96]) by smtp.gmail.com with ESMTPSA id\n\tx124sm2033726qka.85.2017.09.08.15.46.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 08 Sep 2017 15:46:30 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"GNmYjPMp\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"GNmYjPMp\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400d:c0d::242; helo=mail-qt0-x242.google.com;\n\tenvelope-from=ram.n.pai@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"GNmYjPMp\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=4TAVtwdeLv2ykiP6jvOlwh1tLklo61BUsCBP9UoJsTA=;\n\tb=GNmYjPMpgEzU5tkGEjAxIgQK+3G243Ow55mxbEmRD6MmDLj8hxZ8p/dZJX5bwl2RZe\n\tTxM7oi9rdzG7w0dBs0cBD8VyQQeTwd4ZQvsmSoNPok7ooT9T4+s9uETAy9wSsDlhsuI1\n\tGt3CXOx3FmURarFX6wKosGf1IHD33FOlpRCiF6rnsqBEXR5eLXzXBKysbk/porQlBiBj\n\tzaAS0vqS3mAD+KEPgW90PytMpH7SFvobhL5XyTERpoP5vfteuOvO467zrHzGWbjE9efr\n\t3vNdjC8FZ/Of32imgnJT5QBaCPBRPKP+90msitve5S7uIXvyCQP4TX5lXvTx+hNJDQey\n\tXK8A==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=4TAVtwdeLv2ykiP6jvOlwh1tLklo61BUsCBP9UoJsTA=;\n\tb=Fcdwa1Qa7Zv7Hxxq2vjLseqELMcdWfgFxc4YAR0OXohdUEex+rxS9jXug649cSkQE/\n\tpL59kSy2Cav0JdLx0mrdnTt2qrLRrfcgyZjccpmE7PCfMD6obbMKLgZZpnsAKqL10rJa\n\tUc6aeos0nQveuoSyFDXL9fGEyepdKEe7huGj8nDGy90rlkX6XMgz1akXHOEswvsbx0yA\n\tUge2XEnR2c4rVhhm+/PXvIF1LDmIKsnj/JTgspEBC481cGRGZv/C71RtVCydfQzqGq79\n\t51T3Se1xKaD8uSNZIzBMClxHQ34rcAXkcjRvgX0GgVhnAEGrYP8NpFFdSy1F53BiG3Oq\n\tazMw==", "X-Gm-Message-State": "AHPjjUhph5Jz3IpWWocVwjjuOIMp309pkL/eTbtqK7SyGQMqttr5Jsth\n\tHCUsWCtus+SBZQ==", "X-Google-Smtp-Source": "AOwi7QCA0e06O0svR7rVkcLfSICZ06s4+w5qxvBgWZj68iZXg7nrmZEKe2EVOL8T+X4td0TZEnCN7w==", "X-Received": "by 10.200.26.176 with SMTP id x45mr6938239qtj.181.1504910790365; \n\tFri, 08 Sep 2017 15:46:30 -0700 (PDT)", "From": "Ram Pai <linuxram@us.ibm.com>", "To": "mpe@ellerman.id.au,\n\tlinuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 2/7] powerpc: introduce pte_get_hash_gslot() helper", "Date": "Fri, 8 Sep 2017 15:44:42 -0700", "Message-Id": "<1504910713-7094-3-git-send-email-linuxram@us.ibm.com>", "X-Mailer": "git-send-email 1.7.1", "In-Reply-To": "<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>", "References": "<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "ebiederm@xmission.com, linuxram@us.ibm.com, mhocko@kernel.org,\n\tpaulus@samba.org, aneesh.kumar@linux.vnet.ibm.com,\n\tbauerman@linux.vnet.ibm.com, khandual@linux.vnet.ibm.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Introduce pte_get_hash_gslot()() which returns the slot number of the\nHPTE in the global hash table.\n\nThis function will come in handy as we work towards re-arranging the\nPTE bits in the later patches.\n\nReviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\nSigned-off-by: Ram Pai <linuxram@us.ibm.com>\n---\n arch/powerpc/include/asm/book3s/64/hash.h | 3 +++\n arch/powerpc/mm/hash_utils_64.c | 18 ++++++++++++++++++\n 2 files changed, 21 insertions(+), 0 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h\nindex f884520..060c059 100644\n--- a/arch/powerpc/include/asm/book3s/64/hash.h\n+++ b/arch/powerpc/include/asm/book3s/64/hash.h\n@@ -166,6 +166,9 @@ static inline int hash__pte_none(pte_t pte)\n \treturn (pte_val(pte) & ~H_PTE_NONE_MASK) == 0;\n }\n \n+unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,\n+\t\tint ssize, real_pte_t rpte, unsigned int subpg_index);\n+\n /* This low level function performs the actual PTE insertion\n * Setting the PTE depends on the MMU type and other factors. It's\n * an horrible mess that I'm not going to try to clean up now but\ndiff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c\nindex 67ec2e9..e68f053 100644\n--- a/arch/powerpc/mm/hash_utils_64.c\n+++ b/arch/powerpc/mm/hash_utils_64.c\n@@ -1591,6 +1591,24 @@ static inline void tm_flush_hash_page(int local)\n }\n #endif\n \n+/*\n+ * return the global hash slot, corresponding to the given\n+ * pte, which contains the hpte.\n+ */\n+unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,\n+\t\tint ssize, real_pte_t rpte, unsigned int subpg_index)\n+{\n+\tunsigned long hash, slot, hidx;\n+\n+\thash = hpt_hash(vpn, shift, ssize);\n+\thidx = __rpte_to_hidx(rpte, subpg_index);\n+\tif (hidx & _PTEIDX_SECONDARY)\n+\t\thash = ~hash;\n+\tslot = (hash & htab_hash_mask) * HPTES_PER_GROUP;\n+\tslot += hidx & _PTEIDX_GROUP_IX;\n+\treturn slot;\n+}\n+\n /* WARNING: This is called from hash_low_64.S, if you change this prototype,\n * do not forget to update the assembly call site !\n */\n", "prefixes": [ "2/7" ] }