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GET /api/patches/811361/?format=api
{ "id": 811361, "url": "http://patchwork.ozlabs.org/api/patches/811361/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-4-clabbe.montjoie@gmail.com/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170908071156.5115-4-clabbe.montjoie@gmail.com>", "list_archive_url": null, "date": "2017-09-08T07:11:49", "name": "[v5,03/10] arm: dts: sunxi: Restore EMAC changes", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "5cffb388c7c0cfb06ee60b341f3da93cd1ad9b18", "submitter": { "id": 64152, "url": "http://patchwork.ozlabs.org/api/people/64152/?format=api", "name": "Corentin Labbe", "email": "clabbe.montjoie@gmail.com" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-4-clabbe.montjoie@gmail.com/mbox/", "series": [ { "id": 2114, "url": "http://patchwork.ozlabs.org/api/series/2114/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=2114", "date": "2017-09-08T07:11:56", "name": "net: stmmac: dwmac-sun8i: Handle integrated PHY", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/2114/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811361/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811361/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"A/AoMMuu\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpTDN5GNrz9sBd\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 8 Sep 2017 17:17:40 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S932464AbdIHHRi (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tFri, 8 Sep 2017 03:17:38 -0400", "from mail-wr0-f195.google.com ([209.85.128.195]:34172 \"EHLO\n\tmail-wr0-f195.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1754997AbdIHHOM (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Fri, 8 Sep 2017 03:14:12 -0400", "by mail-wr0-f195.google.com with SMTP id k20so828451wre.1;\n\tFri, 08 Sep 2017 00:14:11 -0700 (PDT)", "from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr.\n\t[90.118.159.96]) by smtp.googlemail.com with ESMTPSA id\n\tl19sm684566wrl.47.2017.09.08.00.14.09\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tFri, 08 Sep 2017 00:14:10 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=jjow1PiJRghfIdXg0T9kG+hE68uHysVJ6Loe8SEP3js=;\n\tb=A/AoMMuuoFQQ7mPJasfarUP0BTcpPeuPMCwbdD45Xgu7JNdIpFJEeIkvRza4dRqyGI\n\tEskRZxkkwB3J21njWJnaKxq6EV+LESzTCYZ0JJ6QTf7BGEyNtdxHUgqGHDyBVFSZ/Lcy\n\tyJUoyW7Jnx+l/ONdbniCP7i05rVS07e0U9gS55dV0T1YGpkroUpCYeiVaT64bPhOgW54\n\tfZKg0D9V9PBUzxcLeR0nnDqaAwwvdchMAiYVGnjbcFuJPtysYZKlfUQsMxUwCN50oxCF\n\t3fG24dIj2UWd60eeBexqfpf7bxDWkO3LeGh5fvQ4/pyiUZZnAHt60I4nHQKdYNY/ZKJB\n\t3NRg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=jjow1PiJRghfIdXg0T9kG+hE68uHysVJ6Loe8SEP3js=;\n\tb=P6yl0ePH/XDQaAXkA8Sx0/CojpkMuIGqCy44LhdTJTeHcbfE3o1Lh6V6bg7CVenG/T\n\tLHgKxa93a+j/pcVI8X4XjkJ0K/gRoC8v10DQlZ8//iVNEktxW7Ym3x+X1JkTZ5rKW72x\n\tgpHXRdGzz/H/8rFbTPB3YNNFyIiq/L9udbr3ymtSh80TquKpGik4BM6ilMxNgK5rHsjg\n\tGEVkILym/wxVhczDeJfn/PUBRak8IKSBmpzMGifjyIu6sEcPhbxk7fWWxfjZDTg3lVxv\n\tDe+A3FFRFNtuIFge/2uYMke0VbHs9Q610ZZdpJ7Y4MRfOjO+0yB7tlmAwGgVA1mdACjA\n\toeZQ==", "X-Gm-Message-State": "AHPjjUhpXklF5xtAznRe3FRlkaHKv6VyAWfn4YIXJ68gOOpf0qkOxkaN\n\t8dmzSnTH5mvXiw==", "X-Google-Smtp-Source": "ADKCNb6lR/lFhLzyBsM4J+RocbeJD+U72ezIo0oie12B85/T4qcgckYpXga8XRShI5aKKso79FNM2w==", "X-Received": "by 10.223.139.200 with SMTP id w8mr1317502wra.172.1504854850981; \n\tFri, 08 Sep 2017 00:14:10 -0700 (PDT)", "From": "Corentin Labbe <clabbe.montjoie@gmail.com>", "To": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com", "Cc": "netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>", "Subject": "[PATCH v5 03/10] arm: dts: sunxi: Restore EMAC changes", "Date": "Fri, 8 Sep 2017 09:11:49 +0200", "Message-Id": "<20170908071156.5115-4-clabbe.montjoie@gmail.com>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>", "References": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "This patch restore arm DT about dwmac-sun8i\nThis reverts commit fe45174b72ae (\"arm: dts: sunxi: Revert EMAC changes\")\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\n---\n arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 ++++++++\n arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++++++++++++++++\n arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 ++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++\n arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 +++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++++++++++++++++++\n arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++++++++++++++\n arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 +++++++++++++++++++++++\n 10 files changed, 128 insertions(+)", "diff": "diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts\nindex b1502df7b509..6713d0f2b3f4 100644\n--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts\n+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts\n@@ -56,6 +56,8 @@\n \n \taliases {\n \t\tserial0 = &uart0;\n+\t\t/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */\n+\t\tethernet0 = &emac;\n \t\tethernet1 = &xr819;\n \t};\n \n@@ -102,6 +104,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &mmc0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc0_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts\nindex a337af1de322..d756ff825116 100644\n--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts\n@@ -52,6 +52,7 @@\n \tcompatible = \"sinovoip,bpi-m2-plus\", \"allwinner,sun8i-h3\";\n \n \taliases {\n+\t\tethernet0 = &emac;\n \t\tserial0 = &uart0;\n \t\tserial1 = &uart1;\n \t};\n@@ -114,12 +115,30 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <®_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\n \tstatus = \"okay\";\n };\n \n+&mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <0>;\n+\t};\n+};\n+\n &mmc0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts\nindex 8d2cc6e9a03f..78f6c24952dd 100644\n--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts\n@@ -46,3 +46,10 @@\n \tmodel = \"FriendlyARM NanoPi NEO\";\n \tcompatible = \"friendlyarm,nanopi-neo\", \"allwinner,sun8i-h3\";\n };\n+\n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts\nindex 8ff71b1bb45b..17cdeae19c6f 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts\n@@ -54,6 +54,7 @@\n \taliases {\n \t\tserial0 = &uart0;\n \t\t/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */\n+\t\tethernet0 = &emac;\n \t\tethernet1 = &rtl8189;\n \t};\n \n@@ -117,6 +118,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts\nindex 5fea430e0eb1..6880268e8b87 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts\n@@ -52,6 +52,7 @@\n \tcompatible = \"xunlong,orangepi-one\", \"allwinner,sun8i-h3\";\n \n \taliases {\n+\t\tethernet0 = &emac;\n \t\tserial0 = &uart0;\n \t};\n \n@@ -97,6 +98,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &mmc0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts\nindex 8b93f5c781a7..a10281b455f5 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts\n@@ -53,6 +53,11 @@\n \t};\n };\n \n+&emac {\n+\t/* LEDs changed to active high on the plus */\n+\t/delete-property/ allwinner,leds-active-low;\n+};\n+\n &mmc1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc1_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts\nindex c88518b3f538..f5f0f15a2088 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts\n@@ -52,6 +52,7 @@\n \tcompatible = \"xunlong,orangepi-pc\", \"allwinner,sun8i-h3\";\n \n \taliases {\n+\t\tethernet0 = &emac;\n \t\tserial0 = &uart0;\n \t};\n \n@@ -117,6 +118,13 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n &ir {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&ir_pins_a>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts\nindex 828ae7a526d9..331ed683ac62 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts\n@@ -47,6 +47,10 @@\n \tmodel = \"Xunlong Orange Pi Plus / Plus 2\";\n \tcompatible = \"xunlong,orangepi-plus\", \"allwinner,sun8i-h3\";\n \n+\taliases {\n+\t\tethernet0 = &emac;\n+\t};\n+\n \treg_gmac_3v3: gmac-3v3 {\n \t\tcompatible = \"regulator-fixed\";\n \t\tregulator-name = \"gmac-3v3\";\n@@ -74,6 +78,24 @@\n \tstatus = \"okay\";\n };\n \n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <®_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n+\tallwinner,leds-active-low;\n+\tstatus = \"okay\";\n+};\n+\n+&mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <0>;\n+\t};\n+};\n+\n &mmc2 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&mmc2_8bit_pins>;\ndiff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts\nindex 97920b12a944..80026f3caafc 100644\n--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts\n+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts\n@@ -61,3 +61,19 @@\n \t\tgpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */\n \t};\n };\n+\n+&emac {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&emac_rgmii_pins>;\n+\tphy-supply = <®_gmac_3v3>;\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\tstatus = \"okay\";\n+};\n+\n+&mdio {\n+\text_rgmii_phy: ethernet-phy@1 {\n+\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\treg = <1>;\n+\t};\n+};\ndiff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi\nindex 34fe2b8b3f33..4b599b5d26f6 100644\n--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n@@ -403,6 +403,32 @@\n \t\t\tclocks = <&osc24M>;\n \t\t};\n \n+\t\temac: ethernet@1c30000 {\n+\t\t\tcompatible = \"allwinner,sun8i-h3-emac\";\n+\t\t\tsyscon = <&syscon>;\n+\t\t\treg = <0x01c30000 0x10000>;\n+\t\t\tinterrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"macirq\";\n+\t\t\tresets = <&ccu RST_BUS_EMAC>;\n+\t\t\treset-names = \"stmmaceth\";\n+\t\t\tclocks = <&ccu CLK_BUS_EMAC>;\n+\t\t\tclock-names = \"stmmaceth\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\tmdio: mdio {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n+\t\t\t\t\treg = <1>;\n+\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\n \t\tspi0: spi@01c68000 {\n \t\t\tcompatible = \"allwinner,sun8i-h3-spi\";\n \t\t\treg = <0x01c68000 0x1000>;\n", "prefixes": [ "v5", "03/10" ] }