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GET /api/patches/811359/?format=api
HTTP 200 OK
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{
    "id": 811359,
    "url": "http://patchwork.ozlabs.org/api/patches/811359/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-3-clabbe.montjoie@gmail.com/",
    "project": {
        "id": 7,
        "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api",
        "name": "Linux network development",
        "link_name": "netdev",
        "list_id": "netdev.vger.kernel.org",
        "list_email": "netdev@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170908071156.5115-3-clabbe.montjoie@gmail.com>",
    "list_archive_url": null,
    "date": "2017-09-08T07:11:48",
    "name": "[v5,02/10] dt-bindings: net: Restore sun8i dwmac binding",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "ff5ea580bd745e6cdec8ba64d3e5da1a42d2e7dd",
    "submitter": {
        "id": 64152,
        "url": "http://patchwork.ozlabs.org/api/people/64152/?format=api",
        "name": "Corentin Labbe",
        "email": "clabbe.montjoie@gmail.com"
    },
    "delegate": {
        "id": 34,
        "url": "http://patchwork.ozlabs.org/api/users/34/?format=api",
        "username": "davem",
        "first_name": "David",
        "last_name": "Miller",
        "email": "davem@davemloft.net"
    },
    "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-3-clabbe.montjoie@gmail.com/mbox/",
    "series": [
        {
            "id": 2114,
            "url": "http://patchwork.ozlabs.org/api/series/2114/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=2114",
            "date": "2017-09-08T07:11:56",
            "name": "net: stmmac: dwmac-sun8i: Handle integrated PHY",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/2114/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/811359/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/811359/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<netdev-owner@vger.kernel.org>",
        "X-Original-To": "patchwork-incoming@ozlabs.org",
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            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpTCd5LYTz9sBd\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri,  8 Sep 2017 17:17:01 +1000 (AEST)",
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        ],
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        "X-Gm-Message-State": "AHPjjUgYwV4+96saqyY+sr4FI2VhDoSMdBLAXXPzH5ZDr5jLcaLCgU35\n\tyh4/E0a6mw/vqQ==",
        "X-Google-Smtp-Source": "AOwi7QBXt5bf5YE4/4hFL84eX8QGBUnNlXxFDegej3LUYgffETHKuNNrsaO+xxOPVnJNEnRlHctoiA==",
        "X-Received": "by 10.28.8.21 with SMTP id 21mr842903wmi.23.1504854849881;\n\tFri, 08 Sep 2017 00:14:09 -0700 (PDT)",
        "From": "Corentin Labbe <clabbe.montjoie@gmail.com>",
        "To": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com",
        "Cc": "netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>",
        "Subject": "[PATCH v5 02/10] dt-bindings: net: Restore sun8i dwmac binding",
        "Date": "Fri,  8 Sep 2017 09:11:48 +0200",
        "Message-Id": "<20170908071156.5115-3-clabbe.montjoie@gmail.com>",
        "X-Mailer": "git-send-email 2.13.5",
        "In-Reply-To": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>",
        "References": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>",
        "Sender": "netdev-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<netdev.vger.kernel.org>",
        "X-Mailing-List": "netdev@vger.kernel.org"
    },
    "content": "This patch restore dt-bindings documentation about dwmac-sun8i\nThis reverts commit 8aa33ec2f481 (\"dt-bindings: net: Revert sun8i dwmac binding\")\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\n---\n .../devicetree/bindings/net/dwmac-sun8i.txt        | 84 ++++++++++++++++++++++\n 1 file changed, 84 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt",
    "diff": "diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\nnew file mode 100644\nindex 000000000000..725f3b187886\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n@@ -0,0 +1,84 @@\n+* Allwinner sun8i GMAC ethernet controller\n+\n+This device is a platform glue layer for stmmac.\n+Please see stmmac.txt for the other unchanged properties.\n+\n+Required properties:\n+- compatible: should be one of the following string:\n+\t\t\"allwinner,sun8i-a83t-emac\"\n+\t\t\"allwinner,sun8i-h3-emac\"\n+\t\t\"allwinner,sun8i-v3s-emac\"\n+\t\t\"allwinner,sun50i-a64-emac\"\n+- reg: address and length of the register for the device.\n+- interrupts: interrupt for the device\n+- interrupt-names: should be \"macirq\"\n+- clocks: A phandle to the reference clock for this device\n+- clock-names: should be \"stmmaceth\"\n+- resets: A phandle to the reset control for this device\n+- reset-names: should be \"stmmaceth\"\n+- phy-mode: See ethernet.txt\n+- phy-handle: See ethernet.txt\n+- #address-cells: shall be 1\n+- #size-cells: shall be 0\n+- syscon: A phandle to the syscon of the SoC with one of the following\n+ compatible string:\n+  - allwinner,sun8i-h3-system-controller\n+  - allwinner,sun8i-v3s-system-controller\n+  - allwinner,sun50i-a64-system-controller\n+  - allwinner,sun8i-a83t-system-controller\n+\n+Optional properties:\n+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)\n+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)\n+Both delay properties need to be a multiple of 100. They control the delay for\n+external PHY.\n+\n+Optional properties for the following compatibles:\n+  - \"allwinner,sun8i-h3-emac\",\n+  - \"allwinner,sun8i-v3s-emac\":\n+- allwinner,leds-active-low: EPHY LEDs are active low\n+\n+Required child node of emac:\n+- mdio bus node: should be named mdio\n+\n+Required properties of the mdio node:\n+- #address-cells: shall be 1\n+- #size-cells: shall be 0\n+\n+The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n+of the mdio node. See phy.txt for the generic PHY bindings.\n+\n+Required properties of the phy node with the following compatibles:\n+  - \"allwinner,sun8i-h3-emac\",\n+  - \"allwinner,sun8i-v3s-emac\":\n+- clocks: a phandle to the reference clock for the EPHY\n+- resets: a phandle to the reset control for the EPHY\n+\n+Example:\n+\n+emac: ethernet@1c0b000 {\n+\tcompatible = \"allwinner,sun8i-h3-emac\";\n+\tsyscon = <&syscon>;\n+\treg = <0x01c0b000 0x104>;\n+\tinterrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;\n+\tinterrupt-names = \"macirq\";\n+\tresets = <&ccu RST_BUS_EMAC>;\n+\treset-names = \"stmmaceth\";\n+\tclocks = <&ccu CLK_BUS_EMAC>;\n+\tclock-names = \"stmmaceth\";\n+\t#address-cells = <1>;\n+\t#size-cells = <0>;\n+\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tmdio: mdio {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\treg = <1>;\n+\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t};\n+\t};\n+};\n",
    "prefixes": [
        "v5",
        "02/10"
    ]
}