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GET /api/patches/811350/?format=api
{ "id": 811350, "url": "http://patchwork.ozlabs.org/api/patches/811350/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-11-clabbe.montjoie@gmail.com/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170908071156.5115-11-clabbe.montjoie@gmail.com>", "list_archive_url": null, "date": "2017-09-08T07:11:56", "name": "[v5,10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "85b4e3e8e78f91ba5cf63dc60cc6fb4036ba447b", "submitter": { "id": 64152, "url": "http://patchwork.ozlabs.org/api/people/64152/?format=api", "name": "Corentin Labbe", "email": "clabbe.montjoie@gmail.com" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-11-clabbe.montjoie@gmail.com/mbox/", "series": [ { "id": 2114, "url": "http://patchwork.ozlabs.org/api/series/2114/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=2114", "date": "2017-09-08T07:11:56", "name": "net: stmmac: dwmac-sun8i: Handle integrated PHY", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/2114/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811350/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811350/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"TbnzA1YB\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpT8t3gbYz9s83\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 8 Sep 2017 17:14:38 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1755215AbdIHHOY (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tFri, 8 Sep 2017 03:14:24 -0400", "from mail-wr0-f193.google.com ([209.85.128.193]:36546 \"EHLO\n\tmail-wr0-f193.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1755141AbdIHHOU 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s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=4u7/ZPCRQyQggk4YAw5FLvttfswqgq4S5B8xflhFWNU=;\n\tb=TbnzA1YBJmhfeNmFz3jMQU2FhBJyOWZhUt66zPXSG8BM4sjGnVFwZmnSTgh9gh+Ye3\n\t2cFVK4mqRtthjgcIFylI9KvUIkiAQLun7xwVPULDKYLuoKd985FNB8bh1LfY7Qdahast\n\tPma0hVkRFF8zWFuCU8xKT/9XBz9Zl5Jawwgm/K9Li2kf5qYLoJXmm9fjObNq1ipQ/K3M\n\tSh9pVhK/jS0KEaDRUrodgMd6g6+xW3qyBw4Q+U1T7VH8EggzxUZaOK1LaC4P1OePMwz0\n\tgWhKhRXBX2uoUhpMxlxTG2g0lvZLeV+SNLyxGWhoBpPcTUtrnNQmMC/nLrf+mE9uZEJ8\n\tfyFA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=4u7/ZPCRQyQggk4YAw5FLvttfswqgq4S5B8xflhFWNU=;\n\tb=kutf909E5fdUS/RWfSNiyQpT54v/Wrf7lFTip9oAHfx+AJLEqvPW9obDgkGDpa7eym\n\tR8JlYHkjiDPrl/bWt27JfAVFcVw0ObJ57V/e1RAjy5G/rH4/5rC0v72TfLMN4V9DxkfT\n\tYTP3E7RaVJntbdmH7WxhiL6VT9Oe1pZvy4OShDssZXB71vzpsfNmRc+4HSF8NYHqMYwF\n\tYkBgKAu11bjF2GZFHtVud1xfnw+JhprEUHSqwP5BL9PANIKYCGOIxFA4UCqQfMm0WcUY\n\t1cmEuGb0pPJ9niMSBVPu97A5p56QsCtKCUQpf+TluR7Nb5Mw0e50wvabyeya2Hq0TIsJ\n\t/Qtg==", "X-Gm-Message-State": "AHPjjUirTJkb+YSGf3xLKnIi00JcaAem+EqVbqRQnemWtGROBlIWH8j0\n\teMymdfFuzkibng==", "X-Google-Smtp-Source": "ADKCNb6yIr6cma8rD8L5+mR976UIqUrYDQ4gn7uIaQu71IyyPXROkjOyNty6xMo1/P9Vr8p59YD1wg==", "X-Received": "by 10.223.164.150 with SMTP id g22mr1421730wrb.331.1504854858825;\n\tFri, 08 Sep 2017 00:14:18 -0700 (PDT)", "From": "Corentin Labbe <clabbe.montjoie@gmail.com>", "To": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com", "Cc": "netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>", "Subject": "[PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs", "Date": "Fri, 8 Sep 2017 09:11:56 +0200", "Message-Id": "<20170908071156.5115-11-clabbe.montjoie@gmail.com>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>", "References": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "The Allwinner H3 SoC have two distinct MDIO bus, only one could be\nactive at the same time.\nThe selection of the active MDIO bus are done via some bits in the EMAC\nregister of the system controller.\n\nThis patch implement this MDIO switch via a custom MDIO-mux.\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\n---\n drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +\n drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 116 +++++++++++++++++++---\n 2 files changed, 104 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig\nindex 97035766c291..e28c0d2c58e9 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig\n+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig\n@@ -159,6 +159,7 @@ config DWMAC_SUN8I\n \ttristate \"Allwinner sun8i GMAC support\"\n \tdefault ARCH_SUNXI\n \tdepends on OF && (ARCH_SUNXI || COMPILE_TEST)\n+\tselect MDIO_BUS_MUX\n \t---help---\n \t Support for Allwinner H3 A83T A64 EMAC ethernet controllers.\n \ndiff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c\nindex 672553b652bd..ddd5695886ac 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c\n@@ -17,6 +17,7 @@\n #include <linux/clk.h>\n #include <linux/io.h>\n #include <linux/iopoll.h>\n+#include <linux/mdio-mux.h>\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of_device.h>\n@@ -71,6 +72,7 @@ struct sunxi_priv_data {\n \tconst struct emac_variant *variant;\n \tstruct regmap *regmap;\n \tbool use_internal_phy;\n+\tvoid *mux_handle;\n };\n \n static const struct emac_variant emac_variant_h3 = {\n@@ -195,6 +197,9 @@ static const struct emac_variant emac_variant_a64 = {\n #define H3_EPHY_LED_POL\t\tBIT(17) /* 1: active low, 0: active high */\n #define H3_EPHY_SHUTDOWN\tBIT(16) /* 1: shutdown, 0: power up */\n #define H3_EPHY_SELECT\t\tBIT(15) /* 1: internal PHY, 0: external PHY */\n+#define H3_EPHY_MUX_MASK\t(H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)\n+#define DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID\t0\n+#define DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID\t1\n \n /* H3/A64 specific bits */\n #define SYSCON_RMII_EN\t\tBIT(13) /* 1: enable RMII (overrides EPIT) */\n@@ -634,6 +639,76 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)\n \treturn 0;\n }\n \n+/* MDIO multiplexing switch function\n+ * This function is called by the mdio-mux layer when it thinks the mdio bus\n+ * multiplexer needs to switch.\n+ * 'current_child' is the current value of the mux register\n+ * 'desired_child' is the value of the 'reg' property of the target child MDIO\n+ * node.\n+ * The first time this function is called, current_child == -1.\n+ * If current_child == desired_child, then the mux is already set to the\n+ * correct bus.\n+ *\n+ * Note that we do not use reg/mask like mdio-mux-mmioreg because we need to\n+ * know easily which bus is used (reset must be done only for desired bus).\n+ */\n+static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,\n+\t\t\t\t void *data)\n+{\n+\tstruct stmmac_priv *priv = data;\n+\tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n+\tu32 reg, val;\n+\tint ret = 0;\n+\tbool need_reset = false;\n+\n+\tif (current_child ^ desired_child) {\n+\t\tregmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);\n+\t\tswitch (desired_child) {\n+\t\tcase DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:\n+\t\t\tdev_info(priv->device, \"Switch mux to internal PHY\");\n+\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;\n+\t\t\tif (gmac->use_internal_phy)\n+\t\t\t\tneed_reset = true;\n+\t\t\tbreak;\n+\t\tcase DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID:\n+\t\t\tdev_info(priv->device, \"Switch mux to external PHY\");\n+\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;\n+\t\t\tif (!gmac->use_internal_phy)\n+\t\t\t\tneed_reset = true;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tdev_err(priv->device, \"Invalid child id %x\\n\", desired_child);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tregmap_write(gmac->regmap, SYSCON_EMAC_REG, val);\n+\t\t/* After changing syscon value, the MAC need reset or it will use\n+\t\t * the last value (and so the last PHY set).\n+\t\t * Reset is necessary only when we reach the needed MDIO,\n+\t\t * it timeout in other case.\n+\t\t */\n+\t\tif (need_reset)\n+\t\t\tret = sun8i_dwmac_reset(priv);\n+\t\telse\n+\t\t\tdev_dbg(priv->device, \"skipped reset\\n\");\n+\t}\n+\treturn ret;\n+}\n+\n+static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)\n+{\n+\tint ret;\n+\tstruct device_node *mdio_mux;\n+\tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n+\n+\tmdio_mux = of_get_child_by_name(priv->device->of_node, \"mdio-mux\");\n+\tif (!mdio_mux)\n+\t\treturn -ENODEV;\n+\n+\tret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,\n+\t\t\t &gmac->mux_handle, priv, priv->mii);\n+\treturn ret;\n+}\n+\n static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)\n {\n \tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n@@ -649,12 +724,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)\n \t\t\t val, reg);\n \n \tif (gmac->variant->soc_has_internal_phy) {\n-\t\tif (!gmac->use_internal_phy) {\n-\t\t\t/* switch to external PHY interface */\n-\t\t\treg &= ~H3_EPHY_SELECT;\n-\t\t} else {\n-\t\t\treg |= H3_EPHY_SELECT;\n-\t\t\treg &= ~H3_EPHY_SHUTDOWN;\n+\t\tif (gmac->use_internal_phy) {\n \t\t\tdev_dbg(priv->device, \"Select internal_phy %x\\n\", reg);\n \n \t\t\tif (of_property_read_bool(priv->plat->phy_node,\n@@ -743,6 +813,8 @@ static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac)\n {\n \tu32 reg = gmac->variant->default_syscon_value;\n \n+\tif (gmac->variant->soc_has_internal_phy)\n+\t\tmdio_mux_uninit(gmac->mux_handle);\n \tregmap_write(gmac->regmap, SYSCON_EMAC_REG, reg);\n }\n \n@@ -801,12 +873,6 @@ static int sun8i_power_phy(struct stmmac_priv *priv)\n \tif (ret)\n \t\treturn ret;\n \n-\t/* After changing syscon value, the MAC need reset or it will use\n-\t * the last value (and so the last PHY set.\n-\t */\n-\tret = sun8i_dwmac_reset(priv);\n-\tif (ret)\n-\t\treturn ret;\n \treturn 0;\n }\n \n@@ -889,6 +955,8 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)\n \tstruct sunxi_priv_data *gmac;\n \tstruct device *dev = &pdev->dev;\n \tint ret;\n+\tstruct stmmac_priv *priv;\n+\tstruct net_device *ndev;\n \n \tret = stmmac_get_platform_resources(pdev, &stmmac_res);\n \tif (ret)\n@@ -973,9 +1041,31 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)\n \n \tret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);\n \tif (ret)\n-\t\tsun8i_dwmac_exit(pdev, plat_dat->bsp_priv);\n+\t\tgoto dwmac_exit;\n+\n+\tndev = dev_get_drvdata(&pdev->dev);\n+\tpriv = netdev_priv(ndev);\n+\t/* The mux must be registered after parent MDIO\n+\t * so after stmmac_dvr_probe()\n+\t */\n+\tif (gmac->variant->soc_has_internal_phy) {\n+\t\tret = sun8i_dwmac_register_mdio_mux(priv);\n+\t\tif (ret) {\n+\t\t\tdev_err(&pdev->dev, \"Failed to register mux\\n\");\n+\t\t\tgoto dwmac_mux;\n+\t\t}\n+\t} else {\n+\t\tret = sun8i_dwmac_reset(priv);\n+\t\tif (ret)\n+\t\t\tgoto dwmac_exit;\n+\t}\n \n \treturn ret;\n+dwmac_mux:\n+\tsun8i_dwmac_unset_syscon(gmac);\n+dwmac_exit:\n+\tsun8i_dwmac_exit(pdev, plat_dat->bsp_priv);\n+return ret;\n }\n \n static const struct of_device_id sun8i_dwmac_match[] = {\n", "prefixes": [ "v5", "10/10" ] }