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GET /api/patches/810428/?format=api
{ "id": 810428, "url": "http://patchwork.ozlabs.org/api/patches/810428/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/patch/20170906080751.6773-2-brendanhiggins@google.com/", "project": { "id": 56, "url": "http://patchwork.ozlabs.org/api/projects/56/?format=api", "name": "OpenBMC development", "link_name": "openbmc", "list_id": "openbmc.lists.ozlabs.org", "list_email": "openbmc@lists.ozlabs.org", "web_url": "http://github.com/openbmc/", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170906080751.6773-2-brendanhiggins@google.com>", "list_archive_url": null, "date": "2017-09-06T08:07:49", "name": "[v4,1/3] arm: npcm: add basic support for Nuvoton BMCs", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "8068c0fee38cec1e0006a06a1e4bf1d443916fb3", "submitter": { "id": 69647, "url": "http://patchwork.ozlabs.org/api/people/69647/?format=api", "name": "Brendan Higgins", "email": "brendanhiggins@google.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openbmc/patch/20170906080751.6773-2-brendanhiggins@google.com/mbox/", "series": [ { "id": 1714, "url": "http://patchwork.ozlabs.org/api/series/1714/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/list/?series=1714", "date": "2017-09-06T08:07:48", "name": "arm: npcm: add basic support for Nuvoton BMCs", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/1714/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810428/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810428/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Received": [ 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linux@armlinux.org.uk,\n\tavifishman70@gmail.com, tmaimon77@gmail.com, raltherr@google.com,\n\tf.fainelli@gmail.com, joel@jms.id.au", "Subject": "[PATCH v4 1/3] arm: npcm: add basic support for Nuvoton BMCs", "Date": "Wed, 6 Sep 2017 01:07:49 -0700", "Message-Id": "<20170906080751.6773-2-brendanhiggins@google.com>", "X-Mailer": "git-send-email 2.14.1.581.gf28d330327-goog", "In-Reply-To": "<20170906080751.6773-1-brendanhiggins@google.com>", "References": "<20170906080751.6773-1-brendanhiggins@google.com>", "X-BeenThere": "openbmc@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Development list for OpenBMC <openbmc.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/openbmc/>", "List-Post": "<mailto:openbmc@lists.ozlabs.org>", "List-Help": "<mailto:openbmc-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=subscribe>", "Cc": "devicetree@vger.kernel.org, openbmc@lists.ozlabs.org,\n\tBrendan Higgins <brendanhiggins@google.com>,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org", "Errors-To": "openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"openbmc\"\n\t<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "Adds basic support for the Nuvoton NPCM750 BMC.\n\nSigned-off-by: Brendan Higgins <brendanhiggins@google.com>\n---\n arch/arm/Kconfig | 2 +\n arch/arm/Makefile | 1 +\n arch/arm/mach-npcm/Kconfig | 50 +++++++++++++++++++++++++\n arch/arm/mach-npcm/Makefile | 3 ++\n arch/arm/mach-npcm/headsmp.S | 17 +++++++++\n arch/arm/mach-npcm/npcm7xx.c | 34 +++++++++++++++++\n arch/arm/mach-npcm/platsmp.c | 89 ++++++++++++++++++++++++++++++++++++++++++++\n 7 files changed, 196 insertions(+)\n create mode 100644 arch/arm/mach-npcm/Kconfig\n create mode 100644 arch/arm/mach-npcm/Makefile\n create mode 100644 arch/arm/mach-npcm/headsmp.S\n create mode 100644 arch/arm/mach-npcm/npcm7xx.c\n create mode 100644 arch/arm/mach-npcm/platsmp.c", "diff": "diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\nindex 61a0cb15067e..05543f1cfbde 100644\n--- a/arch/arm/Kconfig\n+++ b/arch/arm/Kconfig\n@@ -782,6 +782,8 @@ source \"arch/arm/mach-netx/Kconfig\"\n \n source \"arch/arm/mach-nomadik/Kconfig\"\n \n+source \"arch/arm/mach-npcm/Kconfig\"\n+\n source \"arch/arm/mach-nspire/Kconfig\"\n \n source \"arch/arm/plat-omap/Kconfig\"\ndiff --git a/arch/arm/Makefile b/arch/arm/Makefile\nindex 47d3a1ab08d2..60ca50c7d762 100644\n--- a/arch/arm/Makefile\n+++ b/arch/arm/Makefile\n@@ -191,6 +191,7 @@ machine-$(CONFIG_ARCH_MEDIATEK)\t\t+= mediatek\n machine-$(CONFIG_ARCH_MXS)\t\t+= mxs\n machine-$(CONFIG_ARCH_NETX)\t\t+= netx\n machine-$(CONFIG_ARCH_NOMADIK)\t\t+= nomadik\n+machine-$(CONFIG_ARCH_NPCM)\t\t+= npcm\n machine-$(CONFIG_ARCH_NSPIRE)\t\t+= nspire\n machine-$(CONFIG_ARCH_OXNAS)\t\t+= oxnas\n machine-$(CONFIG_ARCH_OMAP1)\t\t+= omap1\ndiff --git a/arch/arm/mach-npcm/Kconfig b/arch/arm/mach-npcm/Kconfig\nnew file mode 100644\nindex 000000000000..d47061855439\n--- /dev/null\n+++ b/arch/arm/mach-npcm/Kconfig\n@@ -0,0 +1,50 @@\n+menuconfig ARCH_NPCM\n+\tbool \"Nuvoton NPCM Architecture\"\n+\tselect ARCH_REQUIRE_GPIOLIB\n+\tselect USE_OF\n+\tselect PINCTRL\n+\tselect PINCTRL_NPCM7XX\n+\n+if ARCH_NPCM\n+\n+comment \"NPCMX50 CPU type\"\n+\n+config CPU_NPCM750\n+\tdepends on ARCH_NPCM && ARCH_MULTI_V7\n+\tbool \"Support for NPCM750 BMC CPU (Poleg)\"\n+\tselect CACHE_L2X0\n+\tselect CPU_V7\n+\tselect ARM_GIC\n+\tselect HAVE_SMP\n+\tselect SMP\n+\tselect SMP_ON_UP\n+\tselect HAVE_ARM_SCU\n+\tselect HAVE_ARM_TWD if SMP\n+\tselect ARM_ERRATA_458693\n+\tselect ARM_ERRATA_720789\n+\tselect ARM_ERRATA_742231\n+\tselect ARM_ERRATA_754322\n+\tselect ARM_ERRATA_764369\n+\tselect ARM_ERRATA_794072\n+\tselect PL310_ERRATA_588369\n+\tselect PL310_ERRATA_727915\n+\tselect USB_EHCI_ROOT_HUB_TT\n+\tselect USB_ARCH_HAS_HCD\n+\tselect USB_ARCH_HAS_EHCI\n+\tselect USB_EHCI_HCD\n+\tselect USB_ARCH_HAS_OHCI\n+\tselect USB_OHCI_HCD\n+\tselect USB\n+\tselect FIQ\n+\tselect CPU_USE_DOMAINS\n+\tselect GENERIC_CLOCKEVENTS\n+\tselect CLKDEV_LOOKUP\n+\tselect COMMON_CLK if OF\n+\tselect NPCM750_TIMER\n+\tselect MFD_SYSCON\n+\thelp\n+\t Support for NPCM750 BMC CPU (Poleg).\n+\n+\t Nuvoton NPCM750 BMC based on the Cortex A9.\n+\n+endif\ndiff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile\nnew file mode 100644\nindex 000000000000..78416055b854\n--- /dev/null\n+++ b/arch/arm/mach-npcm/Makefile\n@@ -0,0 +1,3 @@\n+AFLAGS_headsmp.o\t\t+= -march=armv7-a\n+\n+obj-$(CONFIG_CPU_NPCM750)\t+= npcm7xx.o platsmp.o headsmp.o\ndiff --git a/arch/arm/mach-npcm/headsmp.S b/arch/arm/mach-npcm/headsmp.S\nnew file mode 100644\nindex 000000000000..9fccbbd49ed4\n--- /dev/null\n+++ b/arch/arm/mach-npcm/headsmp.S\n@@ -0,0 +1,17 @@\n+/*\n+ * Copyright 2017 Google, Inc.\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+#include <linux/linkage.h>\n+#include <linux/init.h>\n+#include <asm/assembler.h>\n+\n+ENTRY(npcm7xx_secondary_startup)\n+\tsafe_svcmode_maskall r0\n+\n+\tb\tsecondary_startup\n+ENDPROC(npcm7xx_secondary_startup)\ndiff --git a/arch/arm/mach-npcm/npcm7xx.c b/arch/arm/mach-npcm/npcm7xx.c\nnew file mode 100644\nindex 000000000000..132e9d587857\n--- /dev/null\n+++ b/arch/arm/mach-npcm/npcm7xx.c\n@@ -0,0 +1,34 @@\n+/*\n+ * Copyright (c) 2017 Nuvoton Technology corporation.\n+ * Copyright 2017 Google, Inc.\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+#include <linux/kernel.h>\n+#include <linux/types.h>\n+#include <asm/mach/arch.h>\n+#include <asm/mach-types.h>\n+#include <asm/mach/map.h>\n+#include <asm/hardware/cache-l2x0.h>\n+\n+#define NPCM7XX_AUX_VAL (L310_AUX_CTRL_INSTR_PREFETCH |\t\t\t \\\n+\t\t\t L310_AUX_CTRL_DATA_PREFETCH |\t\t\t \\\n+\t\t\t L310_AUX_CTRL_NS_LOCKDOWN |\t\t\t \\\n+\t\t\t L310_AUX_CTRL_CACHE_REPLACE_RR |\t\t \\\n+\t\t\t L2C_AUX_CTRL_SHARED_OVERRIDE |\t\t\t \\\n+\t\t\t L310_AUX_CTRL_FULL_LINE_ZERO)\n+\n+static const char *const npcm7xx_dt_match[] = {\n+\t\"nuvoton,npcm750\",\n+\tNULL\n+};\n+\n+DT_MACHINE_START(NPCM7XX_DT, \"NPCMX50 Chip family\")\n+\t.atag_offset\t= 0x100,\n+\t.dt_compat\t= npcm7xx_dt_match,\n+\t.l2c_aux_val\t= NPCM7XX_AUX_VAL,\n+\t.l2c_aux_mask\t= ~NPCM7XX_AUX_VAL,\n+MACHINE_END\ndiff --git a/arch/arm/mach-npcm/platsmp.c b/arch/arm/mach-npcm/platsmp.c\nnew file mode 100644\nindex 000000000000..144e3e7ec7e6\n--- /dev/null\n+++ b/arch/arm/mach-npcm/platsmp.c\n@@ -0,0 +1,89 @@\n+/*\n+ * Copyright 2017 Google, Inc.\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+#define pr_fmt(fmt) \"PLATSMP: \" fmt\n+\n+#include <linux/delay.h>\n+#include <linux/device.h>\n+#include <linux/smp.h>\n+#include <linux/io.h>\n+#include <linux/of.h>\n+#include <linux/of_device.h>\n+#include <linux/of_platform.h>\n+#include <linux/of_address.h>\n+#include <asm/cacheflush.h>\n+#include <asm/smp.h>\n+#include <asm/smp_plat.h>\n+#include <asm/smp_scu.h>\n+\n+#define NPCM7XX_SCRPAD_REG 0x13c\n+\n+extern void npcm7xx_secondary_startup(void);\n+\n+static int npcm7xx_smp_boot_secondary(unsigned int cpu,\n+\t\t\t\t struct task_struct *idle)\n+{\n+\tstruct device_node *gcr_np;\n+\tvoid __iomem *gcr_base;\n+\tint ret = 0;\n+\n+\tgcr_np = of_find_compatible_node(NULL, NULL, \"nuvoton,npcm750-gcr\");\n+\tif (!gcr_np) {\n+\t\tpr_err(\"no gcr device node\\n\");\n+\t\tret = -EFAULT;\n+\t\tgoto out;\n+\t}\n+\tgcr_base = of_iomap(gcr_np, 0);\n+\tif (!gcr_base) {\n+\t\tpr_err(\"could not iomap gcr at: 0x%llx\\n\", gcr_base);\n+\t\tret = -EFAULT;\n+\t\tgoto out;\n+\t}\n+\n+\t/* give boot ROM kernel start address. */\n+\tiowrite32(__pa_symbol(npcm7xx_secondary_startup), gcr_base +\n+\t\t NPCM7XX_SCRPAD_REG);\n+\t/* make sure npcm7xx_secondary_startup is seen by all observers. */\n+\tsmp_wmb();\n+\tdsb_sev();\n+\t/* make sure write buffer is drained */\n+\tmb();\n+\n+out:\n+\tiounmap(gcr_base);\n+\treturn ret;\n+}\n+\n+static void __init npcm7xx_smp_prepare_cpus(unsigned int max_cpus)\n+{\n+\tstruct device_node *scu_np;\n+\tvoid __iomem *scu_base;\n+\n+\tscu_np = of_find_compatible_node(NULL, NULL, \"arm,cortex-a9-scu\");\n+\tif (!scu_np) {\n+\t\tpr_err(\"no scu device node\\n\");\n+\t\treturn;\n+\t}\n+\tscu_base = of_iomap(scu_np, 0);\n+\tif (!scu_base) {\n+\t\tpr_err(\"could not iomap scu at: 0x%llx\\n\", scu_base);\n+\t\treturn;\n+\t}\n+\n+\tscu_enable(scu_base);\n+\n+out:\n+\tiounmap(scu_base);\n+}\n+\n+static struct smp_operations npcm7xx_smp_ops __initdata = {\n+\t.smp_prepare_cpus = npcm7xx_smp_prepare_cpus,\n+\t.smp_boot_secondary = npcm7xx_smp_boot_secondary,\n+};\n+\n+CPU_METHOD_OF_DECLARE(npcm7xx_smp, \"nuvoton,npcm7xx-smp\", &npcm7xx_smp_ops);\n", "prefixes": [ "v4", "1/3" ] }