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GET /api/patches/809611/?format=api
{ "id": 809611, "url": "http://patchwork.ozlabs.org/api/patches/809611/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/878thuitk6.fsf@linaro.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<878thuitk6.fsf@linaro.org>", "list_archive_url": null, "date": "2017-09-04T11:36:57", "name": "[5/9] Add mode_for_int_vector helper functions", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8e745162bf88728d508b7247fadef521ef451a22", "submitter": { "id": 5450, "url": "http://patchwork.ozlabs.org/api/people/5450/?format=api", "name": "Richard Sandiford", "email": "richard.sandiford@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/878thuitk6.fsf@linaro.org/mbox/", "series": [ { "id": 1357, "url": "http://patchwork.ozlabs.org/api/series/1357/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=1357", "date": "2017-09-04T11:24:26", "name": "Make more use of opt_mode", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1357/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809611/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809611/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-return-461408-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461408-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"kd9in1/h\"; dkim-atps=neutral", "sourceware.org; auth=none" ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm79r5lVNz9s8J\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 4 Sep 2017 21:37:18 +1000 (AEST)", "(qmail 99394 invoked by alias); 4 Sep 2017 11:37:09 -0000", "(qmail 99381 invoked by uid 89); 4 Sep 2017 11:37:08 -0000", "from mail-wm0-f48.google.com (HELO mail-wm0-f48.google.com)\n\t(74.125.82.48) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tMon, 04 Sep 2017 11:37:03 +0000", "by mail-wm0-f48.google.com with SMTP id u26so1752670wma.0 for\n\t<gcc-patches@gcc.gnu.org>; Mon, 04 Sep 2017 04:37:02 -0700 (PDT)", "from localhost (94.197.120.41.threembb.co.uk. [94.197.120.41]) by\n\tsmtp.gmail.com with ESMTPSA id\n\tr92sm1132234wrb.37.2017.09.04.04.36.59 for\n\t<gcc-patches@gcc.gnu.org> (version=TLS1_2\n\tcipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tMon, 04 Sep 2017 04:37:00 -0700 (PDT)" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:subject:references:date:in-reply-to:message-id:mime-version\n\t:content-type; q=dns; s=default; b=kZPW468/mMd22+GrwssrnQLmX9kud\n\tSX3kZwgIVXTPnANjQolW5YhEpsVYM9b2W+td7lATgClfOAtltw7jtx2buPHn2TqM\n\tUrRGPqva9DbnmE+X60z1kDkHGKxf25skdDwRcvgGpphhpgJUavMphacJYEF7q0kd\n\tubY/SfktN89t4I=", "DKIM-Signature": "v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:subject:references:date:in-reply-to:message-id:mime-version\n\t:content-type; s=default; bh=qlvu87wq3CHWf9v3fC+djt0VZIc=; b=kd9\n\tin1/hR1VaDcIoupaDM7sFY6N0ku5PD5vzrDPPydqnKlrAA5ICVEdJC0N6+ktUeVK\n\takVGbNnTnCIVepiYjegFhIk5RvVJ4KrjPk9AyW5L2oTAewgX3fKT8j1azOO3mFvn\n\tWPQ7TTIJee5GJ0ShFmUDRf8XTKA0tKl4rhWxIOBQ=", "Mailing-List": "contact gcc-patches-help@gcc.gnu.org; run by ezmlm", "Precedence": "bulk", "List-Id": "<gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "List-Archive": "<http://gcc.gnu.org/ml/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-help@gcc.gnu.org>", "Sender": "gcc-patches-owner@gcc.gnu.org", "X-Virus-Found": "No", "X-Spam-SWARE-Status": "No, score=-10.6 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=", "X-HELO": "mail-wm0-f48.google.com", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net;\n\ts=20161025;\n\th=x-gm-message-state:from:to:mail-followup-to:subject:references:date\n\t:in-reply-to:message-id:user-agent:mime-version;\n\tbh=4NJc84hv5/lW5M+SJ/34CxEqJzbU4BWm8XxHGXdxBWM=;\n\tb=OQGrc9G9yif0IhhbyKG/jVkv5NJRituB82x20PTYHQR3FK9QYN/b6uBymneW6kE4NK\n\t40KhVPFmRVdBdg+JHHSmfnkaDRCAyLLjqf8yJuMoUIqIbnfjs6tpzbsN2GJpcfECWV1z\n\tAsXU73hq/NrjQ4XInZYdbM39EYCu77tZ/QE0HjGp3kIZi9H78Q9vIVXzx6W/tKNMRZZK\n\t5MjreDNnclka5yMyV6Te8HrFDXjbspd2918lvHvjP9u/08FK/VFnvR3NPMgfJ3iJCGrv\n\ttjIjsndKWbEb5UwUG0Jph33lPaEjjBZjUmULt0x+FdVheMwPA3ypTEjDmkZMpc5xvFcl\n\tWBtA==", "X-Gm-Message-State": "AHPjjUhbfBSRos0qJh1KMYIBA+im9UsnrbwTAGB7voamWHvliiPzjJYX\tzZqqH/pZjxu341DJV/lLGw==", "X-Google-Smtp-Source": "ADKCNb6bToIWUArWBHKUE8rjKlfdksi73HSDxBzsN7QW5ocLVsnDLB1Iya090gMS2kjEHAy8Itba+g==", "X-Received": "by 10.28.157.81 with SMTP id g78mr418028wme.102.1504525020983;\n\tMon, 04 Sep 2017 04:37:00 -0700 (PDT)", "From": "Richard Sandiford <richard.sandiford@linaro.org>", "To": "gcc-patches@gcc.gnu.org", "Mail-Followup-To": "gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org", "Subject": "[5/9] Add mode_for_int_vector helper functions", "References": "<87tw0iiu51.fsf@linaro.org>", "Date": "Mon, 04 Sep 2017 12:36:57 +0100", "In-Reply-To": "<87tw0iiu51.fsf@linaro.org> (Richard Sandiford's message of\n\t\"Mon, 04 Sep 2017 12:24:26 +0100\")", "Message-ID": "<878thuitk6.fsf@linaro.org>", "User-Agent": "Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux)", "MIME-Version": "1.0", "Content-Type": "text/plain" }, "content": "There are at least a few places that want to create an integer vector\nwith a specified element size and element count, or to create the\ninteger equivalent of an existing mode. This patch adds helpers\nfor doing that.\n\nThe require ()s are all used in functions that go on to emit\ninstructions that use the result as a vector mode.\n\n2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>\n\ngcc/\n\t* machmode.h (mode_for_int_vector): New function.\n\t* stor-layout.c (mode_for_int_vector): Likewise.\n\t* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use it.\n\t* config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Likewise.\n\t* config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.\n\t* config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.\n\t(s390_expand_vcond): Likewise.", "diff": "Index: gcc/machmode.h\n===================================================================\n--- gcc/machmode.h\t2017-09-04 12:18:50.674859598 +0100\n+++ gcc/machmode.h\t2017-09-04 12:18:53.153306182 +0100\n@@ -706,6 +706,21 @@ extern machine_mode bitwise_mode_for_mod\n \n extern machine_mode mode_for_vector (scalar_mode, unsigned);\n \n+extern opt_machine_mode mode_for_int_vector (unsigned int, unsigned int);\n+\n+/* Return the integer vector equivalent of MODE, if one exists. In other\n+ words, return the mode for an integer vector that has the same number\n+ of bits as MODE and the same number of elements as MODE, with the\n+ latter being 1 if MODE is scalar. The returned mode can be either\n+ an integer mode or a vector mode. */\n+\n+inline opt_machine_mode\n+mode_for_int_vector (machine_mode mode)\n+{\n+ return mode_for_int_vector (GET_MODE_UNIT_BITSIZE (mode),\n+\t\t\t GET_MODE_NUNITS (mode));\n+}\n+\n /* A class for iterating through possible bitfield modes. */\n class bit_field_mode_iterator\n {\nIndex: gcc/stor-layout.c\n===================================================================\n--- gcc/stor-layout.c\t2017-09-04 12:18:50.675762071 +0100\n+++ gcc/stor-layout.c\t2017-09-04 12:18:53.153306182 +0100\n@@ -517,6 +517,23 @@ mode_for_vector (scalar_mode innermode,\n return mode;\n }\n \n+/* Return the mode for a vector that has NUNITS integer elements of\n+ INT_BITS bits each, if such a mode exists. The mode can be either\n+ an integer mode or a vector mode. */\n+\n+opt_machine_mode\n+mode_for_int_vector (unsigned int int_bits, unsigned int nunits)\n+{\n+ scalar_int_mode int_mode;\n+ if (int_mode_for_size (int_bits, 0).exists (&int_mode))\n+ {\n+ machine_mode vec_mode = mode_for_vector (int_mode, nunits);\n+ if (vec_mode != BLKmode)\n+\treturn vec_mode;\n+ }\n+ return opt_machine_mode ();\n+}\n+\n /* Return the alignment of MODE. This will be bounded by 1 and\n BIGGEST_ALIGNMENT. */\n \nIndex: gcc/config/aarch64/aarch64.c\n===================================================================\n--- gcc/config/aarch64/aarch64.c\t2017-09-04 12:18:44.874165502 +0100\n+++ gcc/config/aarch64/aarch64.c\t2017-09-04 12:18:53.144272229 +0100\n@@ -8282,9 +8282,6 @@ aarch64_emit_approx_sqrt (rtx dst, rtx s\n return false;\n }\n \n- machine_mode mmsk\n- = mode_for_vector (int_mode_for_mode (GET_MODE_INNER (mode)).require (),\n-\t\t GET_MODE_NUNITS (mode));\n if (!recp)\n {\n if (!(flag_mlow_precision_sqrt\n@@ -8302,7 +8299,7 @@ aarch64_emit_approx_sqrt (rtx dst, rtx s\n /* Caller assumes we cannot fail. */\n gcc_assert (use_rsqrt_p (mode));\n \n-\n+ machine_mode mmsk = mode_for_int_vector (mode).require ();\n rtx xmsk = gen_reg_rtx (mmsk);\n if (!recp)\n /* When calculating the approximate square root, compare the\nIndex: gcc/config/powerpcspe/powerpcspe.c\n===================================================================\n--- gcc/config/powerpcspe/powerpcspe.c\t2017-09-04 12:18:44.919414816 +0100\n+++ gcc/config/powerpcspe/powerpcspe.c\t2017-09-04 12:18:53.148287319 +0100\n@@ -38739,8 +38739,7 @@ rs6000_do_expand_vec_perm (rtx target, r\n \n imode = vmode;\n if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)\n- imode = mode_for_vector\n- (int_mode_for_mode (GET_MODE_INNER (vmode)).require (), nelt);\n+ imode = mode_for_int_vector (vmode).require ();\n \n x = gen_rtx_CONST_VECTOR (imode, gen_rtvec_v (nelt, perm));\n x = expand_vec_perm (vmode, op0, op1, x, target);\nIndex: gcc/config/rs6000/rs6000.c\n===================================================================\n--- gcc/config/rs6000/rs6000.c\t2017-09-04 12:18:44.929470219 +0100\n+++ gcc/config/rs6000/rs6000.c\t2017-09-04 12:18:53.151298637 +0100\n@@ -35584,8 +35584,7 @@ rs6000_do_expand_vec_perm (rtx target, r\n \n imode = vmode;\n if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)\n- imode = mode_for_vector\n- (int_mode_for_mode (GET_MODE_INNER (vmode)).require (), nelt);\n+ imode = mode_for_int_vector (vmode).require ();\n \n x = gen_rtx_CONST_VECTOR (imode, gen_rtvec_v (nelt, perm));\n x = expand_vec_perm (vmode, op0, op1, x, target);\nIndex: gcc/config/s390/s390.c\n===================================================================\n--- gcc/config/s390/s390.c\t2017-09-04 11:50:24.561571751 +0100\n+++ gcc/config/s390/s390.c\t2017-09-04 12:18:53.153306182 +0100\n@@ -6472,10 +6472,7 @@ s390_expand_vec_compare_cc (rtx target,\n \tcase LE: cc_producer_mode = CCVFHEmode; code = GE; swap_p = true; break;\n \tdefault: gcc_unreachable ();\n \t}\n- scratch_mode = mode_for_vector\n-\t(int_mode_for_mode (GET_MODE_INNER (GET_MODE (cmp1))).require (),\n-\t GET_MODE_NUNITS (GET_MODE (cmp1)));\n- gcc_assert (scratch_mode != BLKmode);\n+ scratch_mode = mode_for_int_vector (GET_MODE (cmp1)).require ();\n \n if (inv_p)\n \tall_p = !all_p;\n@@ -6581,9 +6578,7 @@ s390_expand_vcond (rtx target, rtx then,\n \n /* We always use an integral type vector to hold the comparison\n result. */\n- result_mode = mode_for_vector\n- (int_mode_for_mode (GET_MODE_INNER (cmp_mode)).require (),\n- GET_MODE_NUNITS (cmp_mode));\n+ result_mode = mode_for_int_vector (cmp_mode).require ();\n result_target = gen_reg_rtx (result_mode);\n \n /* We allow vector immediates as comparison operands that\n", "prefixes": [ "5/9" ] }