[{"id":1763252,"web_url":"http://patchwork.ozlabs.org/comment/1763252/","msgid":"","list_archive_url":null,"date":"2017-09-05T11:35:09","subject":"Re: [5/9] Add mode_for_int_vector helper functions","submitter":{"id":1765,"url":"http://patchwork.ozlabs.org/api/people/1765/","name":"Richard Biener","email":"richard.guenther@gmail.com"},"content":"On Mon, Sep 4, 2017 at 1:36 PM, Richard Sandiford\n wrote:\n> There are at least a few places that want to create an integer vector\n> with a specified element size and element count, or to create the\n> integer equivalent of an existing mode. This patch adds helpers\n> for doing that.\n>\n> The require ()s are all used in functions that go on to emit\n> instructions that use the result as a vector mode.\n>\n> 2017-09-04 Richard Sandiford \n>\n> gcc/\n> * machmode.h (mode_for_int_vector): New function.\n> * stor-layout.c (mode_for_int_vector): Likewise.\n> * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use it.\n> * config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Likewise.\n> * config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.\n> * config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.\n> (s390_expand_vcond): Likewise.\n>\n> Index: gcc/machmode.h\n> ===================================================================\n> --- gcc/machmode.h 2017-09-04 12:18:50.674859598 +0100\n> +++ gcc/machmode.h 2017-09-04 12:18:53.153306182 +0100\n> @@ -706,6 +706,21 @@ extern machine_mode bitwise_mode_for_mod\n>\n> extern machine_mode mode_for_vector (scalar_mode, unsigned);\n>\n> +extern opt_machine_mode mode_for_int_vector (unsigned int, unsigned int);\n> +\n> +/* Return the integer vector equivalent of MODE, if one exists. In other\n> + words, return the mode for an integer vector that has the same number\n> + of bits as MODE and the same number of elements as MODE, with the\n> + latter being 1 if MODE is scalar. The returned mode can be either\n> + an integer mode or a vector mode. */\n> +\n> +inline opt_machine_mode\n> +mode_for_int_vector (machine_mode mode)\n\nSo this is similar to int_mode_for_mode which means...\n\nint_vector_mode_for_vector_mode?\n\n> +{\n\nNothing prevents use with non-vector MODE here, can we place an assert here?\n\n> + return mode_for_int_vector (GET_MODE_UNIT_BITSIZE (mode),\n> + GET_MODE_NUNITS (mode));\n> +}\n> +\n> /* A class for iterating through possible bitfield modes. */\n> class bit_field_mode_iterator\n> {\n> Index: gcc/stor-layout.c\n> ===================================================================\n> --- gcc/stor-layout.c 2017-09-04 12:18:50.675762071 +0100\n> +++ gcc/stor-layout.c 2017-09-04 12:18:53.153306182 +0100\n> @@ -517,6 +517,23 @@ mode_for_vector (scalar_mode innermode,\n> return mode;\n> }\n>\n> +/* Return the mode for a vector that has NUNITS integer elements of\n> + INT_BITS bits each, if such a mode exists. The mode can be either\n> + an integer mode or a vector mode. */\n> +\n> +opt_machine_mode\n> +mode_for_int_vector (unsigned int int_bits, unsigned int nunits)\n\nThat's more vector_int_mode_for_size (...), no? Similar to int_mode_for_size\nor mode_for_size.\n\nOk with those renamings. I wonder if int_vector_mode_for_vector_mode\nis necessary -- is calling vector_int_mode_for_size\n(GET_MODE_UNIT_BITSIZE (mode),\nGET_MODE_NUNITS (mode)) too cumbersome?\n\n> +{\n> + scalar_int_mode int_mode;\n> + if (int_mode_for_size (int_bits, 0).exists (&int_mode))\n> + {\n> + machine_mode vec_mode = mode_for_vector (int_mode, nunits);\n\nUh, so we _do_ have an existing badly named 'mode_for_vector' ...\n\n> + if (vec_mode != BLKmode)\n> + return vec_mode;\n> + }\n> + return opt_machine_mode ();\n> +}\n> +\n> /* Return the alignment of MODE. This will be bounded by 1 and\n> BIGGEST_ALIGNMENT. */\n>\n> Index: gcc/config/aarch64/aarch64.c\n> ===================================================================\n> --- gcc/config/aarch64/aarch64.c 2017-09-04 12:18:44.874165502 +0100\n> +++ gcc/config/aarch64/aarch64.c 2017-09-04 12:18:53.144272229 +0100\n> @@ -8282,9 +8282,6 @@ aarch64_emit_approx_sqrt (rtx dst, rtx s\n> return false;\n> }\n>\n> - machine_mode mmsk\n> - = mode_for_vector (int_mode_for_mode (GET_MODE_INNER (mode)).require (),\n> - GET_MODE_NUNITS (mode));\n> if (!recp)\n> {\n> if (!(flag_mlow_precision_sqrt\n> @@ -8302,7 +8299,7 @@ aarch64_emit_approx_sqrt (rtx dst, rtx s\n> /* Caller assumes we cannot fail. */\n> gcc_assert (use_rsqrt_p (mode));\n>\n> -\n> + machine_mode mmsk = mode_for_int_vector (mode).require ();\n> rtx xmsk = gen_reg_rtx (mmsk);\n> if (!recp)\n> /* When calculating the approximate square root, compare the\n> Index: gcc/config/powerpcspe/powerpcspe.c\n> ===================================================================\n> --- gcc/config/powerpcspe/powerpcspe.c 2017-09-04 12:18:44.919414816 +0100\n> +++ gcc/config/powerpcspe/powerpcspe.c 2017-09-04 12:18:53.148287319 +0100\n> @@ -38739,8 +38739,7 @@ rs6000_do_expand_vec_perm (rtx target, r\n>\n> imode = vmode;\n> if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)\n> - imode = mode_for_vector\n> - (int_mode_for_mode (GET_MODE_INNER (vmode)).require (), nelt);\n> + imode = mode_for_int_vector (vmode).require ();\n>\n> x = gen_rtx_CONST_VECTOR (imode, gen_rtvec_v (nelt, perm));\n> x = expand_vec_perm (vmode, op0, op1, x, target);\n> Index: gcc/config/rs6000/rs6000.c\n> ===================================================================\n> --- gcc/config/rs6000/rs6000.c 2017-09-04 12:18:44.929470219 +0100\n> +++ gcc/config/rs6000/rs6000.c 2017-09-04 12:18:53.151298637 +0100\n> @@ -35584,8 +35584,7 @@ rs6000_do_expand_vec_perm (rtx target, r\n>\n> imode = vmode;\n> if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)\n> - imode = mode_for_vector\n> - (int_mode_for_mode (GET_MODE_INNER (vmode)).require (), nelt);\n> + imode = mode_for_int_vector (vmode).require ();\n>\n> x = gen_rtx_CONST_VECTOR (imode, gen_rtvec_v (nelt, perm));\n> x = expand_vec_perm (vmode, op0, op1, x, target);\n> Index: gcc/config/s390/s390.c\n> ===================================================================\n> --- gcc/config/s390/s390.c 2017-09-04 11:50:24.561571751 +0100\n> +++ gcc/config/s390/s390.c 2017-09-04 12:18:53.153306182 +0100\n> @@ -6472,10 +6472,7 @@ s390_expand_vec_compare_cc (rtx target,\n> case LE: cc_producer_mode = CCVFHEmode; code = GE; swap_p = true; break;\n> default: gcc_unreachable ();\n> }\n> - scratch_mode = mode_for_vector\n> - (int_mode_for_mode (GET_MODE_INNER (GET_MODE (cmp1))).require (),\n> - GET_MODE_NUNITS (GET_MODE (cmp1)));\n> - gcc_assert (scratch_mode != BLKmode);\n> + scratch_mode = mode_for_int_vector (GET_MODE (cmp1)).require ();\n>\n> if (inv_p)\n> all_p = !all_p;\n> @@ -6581,9 +6578,7 @@ s390_expand_vcond (rtx target, rtx then,\n>\n> /* We always use an integral type vector to hold the comparison\n> result. */\n> - result_mode = mode_for_vector\n> - (int_mode_for_mode (GET_MODE_INNER (cmp_mode)).require (),\n> - GET_MODE_NUNITS (cmp_mode));\n> + result_mode = mode_for_int_vector (cmp_mode).require ();\n> result_target = gen_reg_rtx (result_mode);\n>\n> /* We allow vector immediates as comparison operands that","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; 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charset=\"UTF-8\"","X-IsSubscribed":"yes"}},{"id":1763296,"web_url":"http://patchwork.ozlabs.org/comment/1763296/","msgid":"<87shg1z5oa.fsf@linaro.org>","list_archive_url":null,"date":"2017-09-05T12:33:09","subject":"Re: [5/9] Add mode_for_int_vector helper functions","submitter":{"id":5450,"url":"http://patchwork.ozlabs.org/api/people/5450/","name":"Richard Sandiford","email":"richard.sandiford@linaro.org"},"content":"Richard Biener writes:\n> On Mon, Sep 4, 2017 at 1:36 PM, Richard Sandiford\n> wrote:\n>> There are at least a few places that want to create an integer vector\n>> with a specified element size and element count, or to create the\n>> integer equivalent of an existing mode. This patch adds helpers\n>> for doing that.\n>>\n>> The require ()s are all used in functions that go on to emit\n>> instructions that use the result as a vector mode.\n>>\n>> 2017-09-04 Richard Sandiford \n>>\n>> gcc/\n>> * machmode.h (mode_for_int_vector): New function.\n>> * stor-layout.c (mode_for_int_vector): Likewise.\n>> * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use it.\n>> * config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Likewise.\n>> * config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.\n>> * config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.\n>> (s390_expand_vcond): Likewise.\n>>\n>> Index: gcc/machmode.h\n>> ===================================================================\n>> --- gcc/machmode.h 2017-09-04 12:18:50.674859598 +0100\n>> +++ gcc/machmode.h 2017-09-04 12:18:53.153306182 +0100\n>> @@ -706,6 +706,21 @@ extern machine_mode bitwise_mode_for_mod\n>>\n>> extern machine_mode mode_for_vector (scalar_mode, unsigned);\n>>\n>> +extern opt_machine_mode mode_for_int_vector (unsigned int, unsigned int);\n>> +\n>> +/* Return the integer vector equivalent of MODE, if one exists. In other\n>> + words, return the mode for an integer vector that has the same number\n>> + of bits as MODE and the same number of elements as MODE, with the\n>> + latter being 1 if MODE is scalar. The returned mode can be either\n>> + an integer mode or a vector mode. */\n>> +\n>> +inline opt_machine_mode\n>> +mode_for_int_vector (machine_mode mode)\n>\n> So this is similar to int_mode_for_mode which means...\n>\n> int_vector_mode_for_vector_mode?\n\nI'd used that style of name originally, but didn't like it because\nit gave the impression that the result would be a VECTOR_MODE_P.\n\nmode_for_int_vector was supposed to be consistent with mode_for_vector.\n\n>> +{\n>\n> Nothing prevents use with non-vector MODE here, can we place an assert here?\n\nThat was deliberate. I wanted it to work with scalars too, returning\na V1xx in that case.\n\n>> + return mode_for_int_vector (GET_MODE_UNIT_BITSIZE (mode),\n>> + GET_MODE_NUNITS (mode));\n>> +}\n>> +\n>> /* A class for iterating through possible bitfield modes. */\n>> class bit_field_mode_iterator\n>> {\n>> Index: gcc/stor-layout.c\n>> ===================================================================\n>> --- gcc/stor-layout.c 2017-09-04 12:18:50.675762071 +0100\n>> +++ gcc/stor-layout.c 2017-09-04 12:18:53.153306182 +0100\n>> @@ -517,6 +517,23 @@ mode_for_vector (scalar_mode innermode,\n>> return mode;\n>> }\n>>\n>> +/* Return the mode for a vector that has NUNITS integer elements of\n>> + INT_BITS bits each, if such a mode exists. The mode can be either\n>> + an integer mode or a vector mode. */\n>> +\n>> +opt_machine_mode\n>> +mode_for_int_vector (unsigned int int_bits, unsigned int nunits)\n>\n> That's more vector_int_mode_for_size (...), no? Similar to int_mode_for_size\n> or mode_for_size.\n>\n> Ok with those renamings. I wonder if int_vector_mode_for_vector_mode\n> is necessary -- is calling vector_int_mode_for_size\n> (GET_MODE_UNIT_BITSIZE (mode),\n> GET_MODE_NUNITS (mode)) too cumbersome?\n\nIMO yes :-) It's certainly longer than the equivalent int_mode_for_mode\nexpansion.\n\nThanks,\nRichard","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461500-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"vCVpTSSM\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmmNJ565Nz9sRV\n\tfor ;\n\tTue, 5 Sep 2017 22:33:35 +1000 (AEST)","(qmail 127133 invoked by alias); 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This patch adds helpers\n>>> for doing that.\n>>>\n>>> The require ()s are all used in functions that go on to emit\n>>> instructions that use the result as a vector mode.\n>>>\n>>> 2017-09-04 Richard Sandiford \n>>>\n>>> gcc/\n>>> * machmode.h (mode_for_int_vector): New function.\n>>> * stor-layout.c (mode_for_int_vector): Likewise.\n>>> * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use it.\n>>> * config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Likewise.\n>>> * config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.\n>>> * config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.\n>>> (s390_expand_vcond): Likewise.\n>>>\n>>> Index: gcc/machmode.h\n>>> ===================================================================\n>>> --- gcc/machmode.h 2017-09-04 12:18:50.674859598 +0100\n>>> +++ gcc/machmode.h 2017-09-04 12:18:53.153306182 +0100\n>>> @@ -706,6 +706,21 @@ extern machine_mode bitwise_mode_for_mod\n>>>\n>>> extern machine_mode mode_for_vector (scalar_mode, unsigned);\n>>>\n>>> +extern opt_machine_mode mode_for_int_vector (unsigned int, unsigned int);\n>>> +\n>>> +/* Return the integer vector equivalent of MODE, if one exists. In other\n>>> + words, return the mode for an integer vector that has the same number\n>>> + of bits as MODE and the same number of elements as MODE, with the\n>>> + latter being 1 if MODE is scalar. The returned mode can be either\n>>> + an integer mode or a vector mode. */\n>>> +\n>>> +inline opt_machine_mode\n>>> +mode_for_int_vector (machine_mode mode)\n>>\n>> So this is similar to int_mode_for_mode which means...\n>>\n>> int_vector_mode_for_vector_mode?\n>\n> I'd used that style of name originally, but didn't like it because\n> it gave the impression that the result would be a VECTOR_MODE_P.\n\nOh, it isn't? Ah, yes, it can be an integer mode...\n\n> mode_for_int_vector was supposed to be consistent with mode_for_vector.\n>\n>>> +{\n>>\n>> Nothing prevents use with non-vector MODE here, can we place an assert here?\n>\n> That was deliberate. I wanted it to work with scalars too, returning\n> a V1xx in that case.\n\nOk.\n\n>>> + return mode_for_int_vector (GET_MODE_UNIT_BITSIZE (mode),\n>>> + GET_MODE_NUNITS (mode));\n>>> +}\n>>> +\n>>> /* A class for iterating through possible bitfield modes. */\n>>> class bit_field_mode_iterator\n>>> {\n>>> Index: gcc/stor-layout.c\n>>> ===================================================================\n>>> --- gcc/stor-layout.c 2017-09-04 12:18:50.675762071 +0100\n>>> +++ gcc/stor-layout.c 2017-09-04 12:18:53.153306182 +0100\n>>> @@ -517,6 +517,23 @@ mode_for_vector (scalar_mode innermode,\n>>> return mode;\n>>> }\n>>>\n>>> +/* Return the mode for a vector that has NUNITS integer elements of\n>>> + INT_BITS bits each, if such a mode exists. The mode can be either\n>>> + an integer mode or a vector mode. */\n>>> +\n>>> +opt_machine_mode\n>>> +mode_for_int_vector (unsigned int int_bits, unsigned int nunits)\n>>\n>> That's more vector_int_mode_for_size (...), no? Similar to int_mode_for_size\n>> or mode_for_size.\n>>\n>> Ok with those renamings. I wonder if int_vector_mode_for_vector_mode\n>> is necessary -- is calling vector_int_mode_for_size\n>> (GET_MODE_UNIT_BITSIZE (mode),\n>> GET_MODE_NUNITS (mode)) too cumbersome?\n>\n> IMO yes :-) It's certainly longer than the equivalent int_mode_for_mode\n> expansion.\n\nI see.\n\nPatch is ok as-is then.\n\nThanks,\nRichard.\n\n> Thanks,\n> Richard","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461504-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"Tqffh2VF\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmmxl1jS0z9t1t\n\tfor ;\n\tTue, 5 Sep 2017 22:59:05 +1000 (AEST)","(qmail 35569 invoked by alias); 5 Sep 2017 12:58:51 -0000","(qmail 23668 invoked by uid 89); 5 Sep 2017 12:58:49 -0000","from mail-wm0-f54.google.com (HELO mail-wm0-f54.google.com)\n\t(74.125.82.54) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 05 Sep 2017 12:58:43 +0000","by mail-wm0-f54.google.com with SMTP id f145so11043778wme.0 for\n\t; Tue, 05 Sep 2017 05:58:43 -0700 (PDT)","by 10.80.180.205 with HTTP; Tue, 5 Sep 2017 05:58:40 -0700 (PDT)"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:mime-version:in-reply-to:references:from:date:message-id\n\t:subject:to:content-type; q=dns; s=default; b=Q5HmmRiUQ/FnXksxIt\n\tJMYBzjCIgP2YeA8J7Wui0YDOej6u7sU5JT1lkq6xo/WMZaIb3PAbvpQCFuKsvI4P\n\tGMveRWfUpZ2abmdHqEcgp3gzh/ShZ/V2wIOuF5WVWrZ/WGAoHV8l/CsfDD3bHMp1\n\tJ4DVwn+zX8cQeSaf0z9Nqz6vg=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:mime-version:in-reply-to:references:from:date:message-id\n\t:subject:to:content-type; s=default; bh=iZgCu0hpNA47xJFqVj79bkpz\n\tmEA=; b=Tqffh2VF/A3AS1aVJXsw+nH5YUQSqnc0u7vwNKVeMELU9NByixImIX1g\n\twT8fJQQeIRov4qBCNIeuTEFeizcvYEhLiOFfaaGsp42lN0Nx0BWSKYvc7a+j58in\n\tXeai6hoe7bqUNfY0NQ/+7LzPrdy6WVbrBuO15z9Fe29tMZeVftk=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-10.2 required=5.0 tests=AWL, BAYES_00,\n\tFREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tRCVD_IN_DNSWL_NONE,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=","X-HELO":"mail-wm0-f54.google.com","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net;\n\ts=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to;\n\tbh=Ud/GtVIZ/4Pbn9qd4G+i0HpZBdmL0XEbbuAKKA/dHSE=;\n\tb=mf1f/YqmN/IKjFZchuzckjmT6MEtdOXKqOvwW+V7iwZYccv0NN0uE2I1ifE/uHUtVD\n\tmjgfGClL2uFBG4ohOMpeg3TunaAH+rbny6CjjBBrtqTirlazhYeGrdOjddVg1PTB7SPx\n\tyEShUThDkbK4u/d4uZ0U70JyXhr070QZMMZrzLA/wopg+EQZKwFeRYsFz9mK7LnMp2Bq\n\t0rgsOu/WhRZM7O616ub0IizZv+G9Ac77aIBHukIPobALLAj936unYRuxloeVJYqbDYnX\n\tuSyRWYO0KPUsdUWxl36MJO6h0+moZZCPKxhLL7D3fJb0SPCcptvvVBVi5nUyro375boS\n\tA+YA==","X-Gm-Message-State":"AHPjjUgbJOiq3cEnqq+5DkZrLZGBMYNv6BHd7/BmBbMhH0MtNGlzpICq\tgmwnzlGmJVIpEURbcY+5Rk0tKX89IA==","X-Google-Smtp-Source":"ADKCNb7dKj6jWNN27nvFZ6hixvulqYbUAiCEs5lrLNLnh7CGO7o2dEGQhy441gssOz4Z9eoI2IwRfEOoSXSGHPYHrV0=","X-Received":"by 10.80.136.24 with SMTP id b24mr3227446edb.246.1504616321479;\n\tTue, 05 Sep 2017 05:58:41 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<87shg1z5oa.fsf@linaro.org>","References":"<87tw0iiu51.fsf@linaro.org> <878thuitk6.fsf@linaro.org>\n\t\n\t<87shg1z5oa.fsf@linaro.org>","From":"Richard Biener ","Date":"Tue, 5 Sep 2017 14:58:40 +0200","Message-ID":"","Subject":"Re: [5/9] Add mode_for_int_vector helper functions","To":"Richard Biener ,\n\tGCC Patches ,\n\tRichard Sandiford ","Content-Type":"text/plain; charset=\"UTF-8\"","X-IsSubscribed":"yes"}}]