Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/809424/?format=api
{ "id": 809424, "url": "http://patchwork.ozlabs.org/api/patches/809424/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170903224100.17893-2-stefan.bruens@rwth-aachen.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170903224100.17893-2-stefan.bruens@rwth-aachen.de>", "list_archive_url": null, "date": "2017-09-03T22:40:52", "name": "[01/10] dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "ce80414b19115db0615ac9dadfa9d5d03e53256f", "submitter": { "id": 67055, "url": "http://patchwork.ozlabs.org/api/people/67055/?format=api", "name": "Stefan Brüns", "email": "stefan.bruens@rwth-aachen.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170903224100.17893-2-stefan.bruens@rwth-aachen.de/mbox/", "series": [ { "id": 1284, "url": "http://patchwork.ozlabs.org/api/series/1284/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=1284", "date": "2017-09-03T22:40:55", "name": "dmaengine: sun6i: Fixes for H3/A83T, enable A64", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1284/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809424/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809424/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"Qt8B6Jxk\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xlnzL3MQ6z9s06\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tMon, 4 Sep 2017 08:42:06 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dodab-0007Km-B5; Sun, 03 Sep 2017 22:42:01 +0000", "from mail-out-1.itc.rwth-aachen.de ([134.130.5.46])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dodaF-0006vc-FD for linux-arm-kernel@lists.infradead.org;\n\tSun, 03 Sep 2017 22:41:42 +0000", "from rwthex-w2-b.rwth-ad.de ([134.130.26.159])\n\tby mail-in-1.itc.rwth-aachen.de with ESMTP; 04 Sep 2017 00:41:08 +0200", "from pebbles.fritz.box (92.225.242.208) by rwthex-w2-b.rwth-ad.de\n\t(2002:8682:1a9f::8682:1a9f) with Microsoft SMTP Server (TLS) id\n\t15.0.1320.4; Mon, 4 Sep 2017 00:41:06 +0200" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=h+J8qOt0jkpO8uiE4U3d+/jGkSTwHv5zdk0d85XokCc=;\n\tb=Qt8B6JxkpYG0yF\n\tfhlCgYu6R1TMM95LD4wYJrC8wSvHcTKnf+ybSPt7ONlrqwSzRij0EfuYI4PANHRNYM5o3KnRCklHx\n\to+Drxsq/NTZqxW+ZlYlYhSd4dQ+pW56pmSLyqpwUtkfusKWXpPSz+dgXhZO0JCrgTuzdKtKXleXYJ\n\tEiFeDqmruZO0MXB1hzr95AL1QvqG7cuXTA2SCpy/FTyqJOr1DMHiT0FSojq4ciWhmSdI8+OYrDnep\n\t0dcZ2qAfLvsUHS6nCvPMvkKH6yC1F0OvmektChI1TH+j97wP2J864B9tqmCZi9M6UUt1tJMWfn2dV\n\tWfcJBYgSJI7GUNlxckFA==;", "X-IronPort-AV": "E=Sophos;i=\"5.41,472,1498514400\"; d=\"scan'208\";a=\"11604240\"", "From": "=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>", "To": "<linux-sunxi@googlegroups.com>", "Subject": "[PATCH 01/10] dmaengine: sun6i: Correct setting of clock autogating\n\tregister for A83T/H3", "Date": "Mon, 4 Sep 2017 00:40:52 +0200", "Message-ID": "<20170903224100.17893-2-stefan.bruens@rwth-aachen.de>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170903224100.17893-1-stefan.bruens@rwth-aachen.de>", "References": "<20170903224100.17893-1-stefan.bruens@rwth-aachen.de>", "MIME-Version": "1.0", "X-Originating-IP": "[92.225.242.208]", "X-ClientProxiedBy": "rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f)", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170903_154139_896782_342EF3D1 ", "X-CRM114-Status": "GOOD ( 11.27 )", "X-Spam-Score": "-4.2 (----)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [134.130.5.46 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "devicetree@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,\n\tAndre Przywara <andre.przywara@arm.com>, linux-kernel@vger.kernel.org,\n\tCode Kipper <codekipper@gmail.com>, Chen-Yu Tsai <wens@csie.org>,\n\tRob Herring <robh+dt@kernel.org>, dmaengine@vger.kernel.org,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "The H83T uses a compatible string different from the A23, but requires\nthe same clock autogating register setting.\n\nThe H3 also requires setting the clock autogating register, but has\nthe register at a different offset.\n\nSome currently available SoCs not yet supported by the sun6i-dma driver\nwill require new compatible strings. These SoCs either follow the A23\nregister model (e.g. V3s) or the H3 register model (A64, R40), so a new\nvariable is added to the config struct to group SoCs with common register\nmodels.\n\nSigned-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>\n---\n drivers/dma/sun6i-dma.c | 34 +++++++++++++++++++++++++++++++---\n 1 file changed, 31 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\nindex a2358780ab2c..1d9b3be30d22 100644\n--- a/drivers/dma/sun6i-dma.c\n+++ b/drivers/dma/sun6i-dma.c\n@@ -48,6 +48,9 @@\n #define SUN8I_DMA_GATE\t\t0x20\n #define SUN8I_DMA_GATE_ENABLE\t0x4\n \n+#define SUNXI_H3_SECURITE_REG\t\t0x20\n+#define SUNXI_H3_DMA_GATE\t\t0x28\n+#define SUNXI_H3_DMA_GATE_ENABLE\t0x4\n /*\n * Channels specific registers\n */\n@@ -90,6 +93,21 @@\n #define NORMAL_WAIT\t8\n #define DRQ_SDRAM\t1\n \n+/*\n+ * DMA Controller generations\n+ *\n+ * Newer SoC generations changed or added some register definitions:\n+ * - A23 added a clock gate register\n+ * - H3 has a different offset for the clock gating register,\n+ * the burst length field has a different offset in the channel\n+ * configuration register, also additional burst lengths/widths.\n+ */\n+enum dmac_variant {\n+\tDMAC_VARIANT_A31,\n+\tDMAC_VARIANT_A23,\n+\tDMAC_VARIANT_H3,\n+};\n+\n /*\n * Hardware channels / ports representation\n *\n@@ -101,6 +119,7 @@ struct sun6i_dma_config {\n \tu32 nr_max_channels;\n \tu32 nr_max_requests;\n \tu32 nr_max_vchans;\n+\tenum dmac_variant dmac_variant;\n };\n \n /*\n@@ -998,6 +1017,7 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = {\n \t.nr_max_channels = 16,\n \t.nr_max_requests = 30,\n \t.nr_max_vchans = 53,\n+\t.dmac_variant = DMAC_VARIANT_A31,\n };\n \n /*\n@@ -1009,23 +1029,29 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {\n \t.nr_max_channels = 8,\n \t.nr_max_requests = 24,\n \t.nr_max_vchans = 37,\n+\t.dmac_variant = DMAC_VARIANT_A23,\n };\n \n static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n \t.nr_max_channels = 8,\n \t.nr_max_requests = 28,\n \t.nr_max_vchans = 39,\n+\t.dmac_variant = DMAC_VARIANT_A23,\n };\n \n /*\n * The H3 has 12 physical channels, a maximum DRQ port id of 27,\n * and a total of 34 usable source and destination endpoints.\n+ * It also supports additional burst lengths and bus widths,\n+ * and the burst length fields have different offsets.\n */\n \n static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n \t.nr_max_channels = 12,\n \t.nr_max_requests = 27,\n \t.nr_max_vchans = 34,\n+\t.dmac_variant = DMAC_VARIANT_H3,\n+};\n };\n \n static const struct of_device_id sun6i_dma_match[] = {\n@@ -1177,11 +1203,13 @@ static int sun6i_dma_probe(struct platform_device *pdev)\n \t/*\n \t * sun8i variant requires us to toggle a dma gating register,\n \t * as seen in Allwinner's SDK. This register is not documented\n-\t * in the A23 user manual.\n+\t * in the A23 user manual, but appears in e.g. the H83T manual.\n+\t * For the H3, H5 and A64, the register has a different location\n \t */\n-\tif (of_device_is_compatible(pdev->dev.of_node,\n-\t\t\t\t \"allwinner,sun8i-a23-dma\"))\n+\tif (sdc->cfg->dmac_variant == DMAC_VARIANT_A23)\n \t\twritel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);\n+\telse if (sdc->cfg->dmac_variant == DMAC_VARIANT_H3)\n+\t\twritel(SUNXI_H3_DMA_GATE_ENABLE, sdc->base + SUNXI_H3_DMA_GATE);\n \n \treturn 0;\n \n", "prefixes": [ "01/10" ] }