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GET /api/patches/807949/?format=api
{ "id": 807949, "url": "http://patchwork.ozlabs.org/api/patches/807949/?format=api", "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/1504132534.3182.4.camel@cavium.com/", "project": { "id": 41, "url": "http://patchwork.ozlabs.org/api/projects/41/?format=api", "name": "GNU C Library", "link_name": "glibc", "list_id": "libc-alpha.sourceware.org", "list_email": "libc-alpha@sourceware.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504132534.3182.4.camel@cavium.com>", "list_archive_url": null, "date": "2017-08-30T22:35:34", "name": "[aarch64] Fix hpwcap argument passed to ifunc resolvers", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9b14cb48360e85e76df163dcdf9080ca5f35a1b7", "submitter": { "id": 70332, "url": "http://patchwork.ozlabs.org/api/people/70332/?format=api", "name": "Steve Ellcey", "email": "sellcey@cavium.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/1504132534.3182.4.camel@cavium.com/mbox/", "series": [ { "id": 710, "url": "http://patchwork.ozlabs.org/api/series/710/?format=api", "web_url": "http://patchwork.ozlabs.org/project/glibc/list/?series=710", "date": "2017-08-30T22:35:34", "name": "[aarch64] Fix hpwcap argument passed to ifunc resolvers", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/710/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807949/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807949/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<libc-alpha-return-83894-incoming=patchwork.ozlabs.org@sourceware.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list libc-alpha@sourceware.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-83894-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"XBl/43xb\"; dkim-atps=neutral", "sourceware.org; auth=none", "spf=none (sender IP is )\n\tsmtp.mailfrom=Steve.Ellcey@cavium.com; " ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjL27106Dz9s7G\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 31 Aug 2017 08:35:58 +1000 (AEST)", "(qmail 124361 invoked by alias); 30 Aug 2017 22:35:49 -0000", "(qmail 124352 invoked by uid 89); 30 Aug 2017 22:35:49 -0000" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:message-id:subject:from:reply-to:to:date\n\t:content-type:mime-version; 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PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(102415395)(6040450)(601004)(2401047)(8121501046)(5005006)(100000703101)(100105400095)(10201501046)(93006095)(93001095)(3002001)(6041248)(20161123555025)(20161123560025)(20161123558100)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123562025)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:DM5PR07MB3546; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:DM5PR07MB3546; ", "X-Forefront-PRVS": "041517DFAB", "X-Forefront-Antispam-Report": "SFV:NSPM;\n\tSFS:(10009020)(6009001)(189002)(377424004)(199003)(106356001)(966005)(25786009)(50226002)(105586002)(8676002)(2906002)(103116003)(5660300001)(81166006)(81156014)(8936002)(3450700001)(189998001)(568964002)(305945005)(6116002)(33646002)(512874002)(2476003)(3846002)(110136004)(50986999)(478600001)(43066003)(4610100001)(84326002)(7736002)(36756003)(101416001)(72206003)(5890100001)(6916009)(69596002)(6506006)(97736004)(68736007)(53416004)(6306002)(66066001)(53936002)(6512007)(42186005)(6486002)(99106002);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR07MB3546;\n\tH:sellcey-dt.caveonetworks.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ", "Received-SPF": "None (protection.outlook.com: cavium.com does not designate\n\tpermitted sender hosts)", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "cavium.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Aug 2017 22:35:36.4600\n\t(UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM5PR07MB3546" }, "content": "I submitted a patch to gcc to use IFUNCs in libatomic.\n\nhttps://gcc.gnu.org/ml/gcc-patches/2017-08/msg00545.html\n\nWhile addressing some of the comments to that patch I\nrealized I needed some changes to glibc in order to\nenable the functionality correctly. This patch has\nthose changes. In elf_ifunc_invoke I changed the\nargument type passed to the ifunc resolver function\nfrom 'unsigned long int' to 'uint64_t'. This doesn't\nmatter until we do ILP32 but I would like to change\nit now so that I can check in the gcc patch with a \nmatching type and not have to change it later. The\nother change here is to use hwcap_mask to mask out\nthe hwcap value passed to the resolver function. This\nmeans that ifunc resolvers that use the hwcap argument\nto check for hardware capabilities will be affected\nby LD_HWCAP_MASK in the same way that glibc resolver\nfunctions are.\n\nFinally, I updated HWCAP_IMPORTANT to be all the\nknown HWCAP_* values or'ed together so that nothing\nwas masked out by default. This was set to just\nHWCAP_CPUID before and if you did not set LD_HWCAP_MASK\nbut tried to check HWCAP_ATOMICS in a ifunc resolver\nyou would get 0 because the default value of hwcap_mask\nwould not have that bit set and it would get masked out by\nthe AND operation I added to elf_ifunc_invoke. I don't\nthink we want any of the hardware capabilities masked out\nby default, but only if the user sets LD_HWCAP_MASK.\n\nTested on aarch64 with a modified GCC libatomic patch\nand with the glibc testsuite.\n\nSteve Ellcey\nsellcey@cavium.com\n\n\n2017-08-30 Steve Ellcey <sellcey@cavium.com>\n\n\t* sysdeps/aarch64/dl-irel.h: Include elf/dl-hwcaps.h\n\tfor GET_HWCAP_MASK.\n\t(elf_ifunc_invoke): Change argument type and use\n\tGET_HWCAP_MASK to mask out bits in dl_hwcap.\n\t* sysdeps/unix/sysv/linux/aarch64/dl-procinfo.h (HWCAP_IMPORTANT):\n\tUse bitwise or of all defined HWCAP values as default value.", "diff": "diff --git a/sysdeps/aarch64/dl-irel.h b/sysdeps/aarch64/dl-irel.h\nindex 4a80275..3ef8497 100644\n--- a/sysdeps/aarch64/dl-irel.h\n+++ b/sysdeps/aarch64/dl-irel.h\n@@ -24,6 +24,7 @@\n #include <unistd.h>\n #include <ldsodefs.h>\n #include <sysdep.h>\n+#include <elf/dl-hwcaps.h>\n \n #define ELF_MACHINE_IRELA\t1\n \n@@ -31,7 +32,8 @@ static inline ElfW(Addr)\n __attribute ((always_inline))\n elf_ifunc_invoke (ElfW(Addr) addr)\n {\n- return ((ElfW(Addr) (*) (unsigned long int)) (addr)) (GLRO(dl_hwcap));\n+ return ((ElfW(Addr) (*) (uint64_t)) (addr))\n+\t (GLRO(dl_hwcap) & GET_HWCAP_MASK());\n }\n \n static inline void\ndiff --git a/sysdeps/unix/sysv/linux/aarch64/dl-procinfo.h b/sysdeps/unix/sysv/linux/aarch64/dl-procinfo.h\nindex 0333a18..19637f6 100644\n--- a/sysdeps/unix/sysv/linux/aarch64/dl-procinfo.h\n+++ b/sysdeps/unix/sysv/linux/aarch64/dl-procinfo.h\n@@ -33,9 +33,15 @@\n /* Offset of the last bit allocated in HWCAP. */\n #define _DL_HWCAP_LAST 15\n \n-/* HWCAP_CPUID should be available by default to influence IFUNC as well as\n- library search. */\n-#define HWCAP_IMPORTANT HWCAP_CPUID\n+/* HWCAP_IMPORTANT is used to set the default value of hwcap_mask, we do not\n+ want to mask out any HWCAP values because then we could not use them in\n+ an IFUNC selector. */\n+#define HWCAP_IMPORTANT (HWCAP_FP | HWCAP_ASIMD | HWCAP_EVTSTRM | HWCAP_AES \\\n+\t\t\t | HWCAP_PMULL | HWCAP_SHA1 | HWCAP_SHA2 | HWCAP_CRC32 \\\n+\t\t\t | HWCAP_ATOMICS | HWCAP_FPHP | HWCAP_ASIMDHP \\\n+\t\t | HWCAP_CPUID | HWCAP_ASIMDRDM | HWCAP_JSCVT \\\n+\t\t\t | HWCAP_FCMA | HWCAP_LRCPC)\n+\n \n static inline const char *\n __attribute__ ((unused))\n", "prefixes": [ "aarch64" ] }