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{
    "id": 807657,
    "url": "http://patchwork.ozlabs.org/api/patches/807657/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170830142454.10971-4-jglauber@cavium.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170830142454.10971-4-jglauber@cavium.com>",
    "list_archive_url": null,
    "date": "2017-08-30T14:24:54",
    "name": "[v3,3/3] PCI: Avoid slot reset for Cavium cn8xxx root ports",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "6e7aaa188485bcdc5d2f78eec0ee7042b22ae249",
    "submitter": {
        "id": 68350,
        "url": "http://patchwork.ozlabs.org/api/people/68350/?format=api",
        "name": "Jan Glauber",
        "email": "jglauber@cavium.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170830142454.10971-4-jglauber@cavium.com/mbox/",
    "series": [
        {
            "id": 624,
            "url": "http://patchwork.ozlabs.org/api/series/624/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=624",
            "date": "2017-08-30T14:24:51",
            "name": "Workaround for bus/slot reset on Cavium cn8xxx root ports",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/624/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/807657/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/807657/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-pci-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
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            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751805AbdH3OZj (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 30 Aug 2017 10:25:39 -0400",
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        ],
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=6g0lkFSiY9+qwTZSmr4T+XOmcNxS9eDdmyr5PhhfFK0=;\n\tb=E5WNH+qjaFjqSlPz1Wg4t2wusFxiYHkuBCHDnuV2PBfkx30yFxnP6Ij0ibjq84RjkW\n\tCabwjmTVBrVZGxtkBOcZOowHMxAnybG0TvTPEJb1psw+bQJT5TtNbIUp2Ou+/EvBfZIx\n\tcayq+s/U3LW96n+WwvboI7op+T+zxGU2ucXX0wECM8OTrADfJLBTz7GfOFaPsGoy7bhU\n\tF+aCCF0FJiaHUTCP7cJHfkHjbPxsrpyf7afzDTRrZrxdUKMAtAGAdLrkUJvwqRa5OLEB\n\tagLU61OrKJVNmIBgFBwtSH72ZsvMMtpxMfs6qwJk4q0lgRCm8IHvP0/QQoIjxE+8ryNv\n\tSLng==",
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        "X-Received": "by 10.28.92.203 with SMTP id q194mr1636271wmb.165.1504103111476; \n\tWed, 30 Aug 2017 07:25:11 -0700 (PDT)",
        "From": "Jan Glauber <jglauber@cavium.com>",
        "To": "Bjorn Helgaas <bhelgaas@google.com>",
        "Cc": "linux-pci@vger.kernel.org, Alex Williamson <alex.williamson@redhat.com>,\n\tlinux-kernel@vger.kernel.org, david.daney@cavium.com,\n\tJon Masters <jcm@redhat.com>, Robert Richter <robert.richter@cavium.com>,\n\tlinux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,\n\tJan Glauber <jglauber@cavium.com>",
        "Subject": "[PATCH v3 3/3] PCI: Avoid slot reset for Cavium cn8xxx root ports",
        "Date": "Wed, 30 Aug 2017 16:24:54 +0200",
        "Message-Id": "<20170830142454.10971-4-jglauber@cavium.com>",
        "X-Mailer": "git-send-email 2.9.0.rc0.21.g7777322",
        "In-Reply-To": "<20170830142454.10971-1-jglauber@cavium.com>",
        "References": "<20170830142454.10971-1-jglauber@cavium.com>",
        "Sender": "linux-pci-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-pci.vger.kernel.org>",
        "X-Mailing-List": "linux-pci@vger.kernel.org"
    },
    "content": "Root ports of cn8xxx do not function after a slot reset when used with\nsome e1000e and LSI HBA devices. Add a quirk to prevent slot reset on\nthese root ports.\n\nSigned-off-by: Jan Glauber <jglauber@cavium.com>\n---\n drivers/pci/quirks.c | 16 ++++++++++++++++\n 1 file changed, 16 insertions(+)",
    "diff": "diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c\nindex 85191b8..6679971 100644\n--- a/drivers/pci/quirks.c\n+++ b/drivers/pci/quirks.c\n@@ -845,6 +845,22 @@ static void quirk_cavium_sriov_rnm_link(struct pci_dev *dev)\n DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa018, quirk_cavium_sriov_rnm_link);\n #endif\n \n+/*\n+ * Root port on some Cavium CN8xxx chips do not successfully complete\n+ * a bus reset when used with certain types of child devices. Config\n+ * space access to the child may quit responding. Flag all devices under\n+ * the secondary bus as non-resettable.\n+ */\n+static void quirk_CN8xxx_secondary_bus(struct pci_dev *dev)\n+{\n+\tstruct pci_dev *pdev;\n+\n+\tdev_warn(&dev->dev, \"Cavium CN8xxx quirk detected; reset for devices on secondary bus disabled\\n\");\n+\tlist_for_each_entry(pdev, &dev->subordinate->devices, bus_list)\n+\t\tpdev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;\n+}\n+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_CN8xxx_secondary_bus);\n+\n /*\n  * Some settings of MMRBC can lead to data corruption so block changes.\n  * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide\n",
    "prefixes": [
        "v3",
        "3/3"
    ]
}