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GET /api/patches/807632/?format=api
{ "id": 807632, "url": "http://patchwork.ozlabs.org/api/patches/807632/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1504099475-241036-4-git-send-email-imammedo@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504099475-241036-4-git-send-email-imammedo@redhat.com>", "list_archive_url": null, "date": "2017-08-30T13:24:30", "name": "[v2,3/8] ppc: make cpu_model translation to type consistent", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6c64339dcbce894684efa2f1d35a2fd61cb5089d", "submitter": { "id": 11305, "url": "http://patchwork.ozlabs.org/api/people/11305/?format=api", "name": "Igor Mammedov", "email": "imammedo@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1504099475-241036-4-git-send-email-imammedo@redhat.com/mbox/", "series": [ { "id": 612, "url": "http://patchwork.ozlabs.org/api/series/612/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=612", "date": "2017-08-30T13:24:29", "name": "ppc: cpu_model handling cleanups", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/612/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807632/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807632/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx03.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx03.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=imammedo@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xj5qY0DWcz9sN7\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 23:26:01 +1000 (AEST)", "from localhost ([::1]:50571 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dn30I-0002K6-NA\n\tfor incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:25:58 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:50979)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <imammedo@redhat.com>) id 1dn2zA-0001ox-BU\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:56 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <imammedo@redhat.com>) id 1dn2z5-0003Wg-FW\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:48 -0400", "from mx1.redhat.com ([209.132.183.28]:22520)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <imammedo@redhat.com>)\n\tid 1dn2z4-0003WC-UU; Wed, 30 Aug 2017 09:24:43 -0400", "from smtp.corp.redhat.com\n\t(int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id E2ACB7E449;\n\tWed, 30 Aug 2017 13:24:41 +0000 (UTC)", "from dell-r430-03.lab.eng.brq.redhat.com\n\t(dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 976659B507;\n\tWed, 30 Aug 2017 13:24:40 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com E2ACB7E449", "From": "Igor Mammedov <imammedo@redhat.com>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 30 Aug 2017 15:24:30 +0200", "Message-Id": "<1504099475-241036-4-git-send-email-imammedo@redhat.com>", "In-Reply-To": "<1504099475-241036-1-git-send-email-imammedo@redhat.com>", "References": "<1504099475-241036-1-git-send-email-imammedo@redhat.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.12", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.27]);\n\tWed, 30 Aug 2017 13:24:42 +0000 (UTC)", "Content-Transfer-Encoding": "quoted-printable", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v2 3/8] ppc: make cpu_model translation to type\n\tconsistent", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "qemu-ppc@nongnu.org, Alexander Graf <agraf@suse.de>,\n\tDavid Gibson <david@gibson.dropbear.id.au>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "PPC handles -cpu FOO rather incosistently,\ni.e. it does case-insensitive matching of FOO to\na CPU type (see: ppc_cpu_compare_class_name) but\nhandles alias names as case-sensitive, as result:\n\n # qemu-system-ppc64 -M mac99 -cpu g3\n qemu-system-ppc64: unable to find CPU model ' kN�U'\n\n # qemu-system-ppc64 -cpu 970MP_V1.1\n qemu-system-ppc64: Unable to find sPAPR CPU Core definition\n\nwhile\n\n # qemu-system-ppc64 -M mac99 -cpu G3\n # qemu-system-ppc64 -cpu 970MP_v1.1\n\nstart up just fine.\n\nConsidering we can't take case-insensitive matching away,\nmake it case-insensitive for all alias/type/core_type\nlookups.\n\nAs side effect it allows to remove duplicate core types\nwhich are the same except of using different cased letters in name.\n\nSigned-off-by: Igor Mammedov <imammedo@redhat.com>\n---\nv2:\n * make all typenames lower-cased instead on upper-cased (David)\n\nPS:\n consistent naming will be used by follow up patch to\n simplify cpu_model translation code and drop ~50LOC.\n---\n hw/ppc/spapr_cpu_core.c | 24 +-\n target/ppc/cpu-models.c | 752 ++++++++++++++++++++++----------------------\n target/ppc/kvm.c | 2 +-\n target/ppc/translate_init.c | 2 +-\n 4 files changed, 390 insertions(+), 390 deletions(-)", "diff": "diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c\nindex ea278ce..1a47c6b 100644\n--- a/hw/ppc/spapr_cpu_core.c\n+++ b/hw/ppc/spapr_cpu_core.c\n@@ -130,8 +130,10 @@ char *spapr_get_cpu_core_type(const char *model)\n {\n char *core_type;\n gchar **model_pieces = g_strsplit(model, \",\", 2);\n+ gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1);\n+ g_strfreev(model_pieces);\n \n- core_type = g_strdup_printf(\"%s-%s\", model_pieces[0], TYPE_SPAPR_CPU_CORE);\n+ core_type = g_strdup_printf(\"%s-\" TYPE_SPAPR_CPU_CORE, cpu_model);\n \n /* Check whether it exists or whether we have to look up an alias name */\n if (!object_class_by_name(core_type)) {\n@@ -139,13 +141,13 @@ char *spapr_get_cpu_core_type(const char *model)\n \n g_free(core_type);\n core_type = NULL;\n- realmodel = ppc_cpu_lookup_alias(model_pieces[0]);\n+ realmodel = ppc_cpu_lookup_alias(cpu_model);\n if (realmodel) {\n core_type = spapr_get_cpu_core_type(realmodel);\n }\n }\n+ g_free(cpu_model);\n \n- g_strfreev(model_pieces);\n return core_type;\n }\n \n@@ -268,31 +270,29 @@ static const char *spapr_core_models[] = {\n \"970_v2.2\",\n \n /* 970MP variants */\n- \"970MP_v1.0\",\n \"970mp_v1.0\",\n- \"970MP_v1.1\",\n \"970mp_v1.1\",\n \n /* POWER5+ */\n- \"POWER5+_v2.1\",\n+ \"power5+_v2.1\",\n \n /* POWER7 */\n- \"POWER7_v2.3\",\n+ \"power7_v2.3\",\n \n /* POWER7+ */\n- \"POWER7+_v2.1\",\n+ \"power7+_v2.1\",\n \n /* POWER8 */\n- \"POWER8_v2.0\",\n+ \"power8_v2.0\",\n \n /* POWER8E */\n- \"POWER8E_v2.1\",\n+ \"power8e_v2.1\",\n \n /* POWER8NVL */\n- \"POWER8NVL_v1.0\",\n+ \"power8nvl_v1.0\",\n \n /* POWER9 */\n- \"POWER9_v1.0\",\n+ \"power9_v1.0\",\n };\n \n static Property spapr_cpu_core_properties[] = {\ndiff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c\nindex 8b27962..6721c3e 100644\n--- a/target/ppc/cpu-models.c\n+++ b/target/ppc/cpu-models.c\n@@ -75,206 +75,206 @@\n POWERPC_DEF(\"401\", CPU_POWERPC_401, 401,\n \"Generic PowerPC 401\")\n /* PowerPC 401 cores */\n- POWERPC_DEF(\"401A1\", CPU_POWERPC_401A1, 401,\n+ POWERPC_DEF(\"401a1\", CPU_POWERPC_401A1, 401,\n \"PowerPC 401A1\")\n- POWERPC_DEF(\"401B2\", CPU_POWERPC_401B2, 401x2,\n+ POWERPC_DEF(\"401b2\", CPU_POWERPC_401B2, 401x2,\n \"PowerPC 401B2\")\n #if defined(TODO)\n- POWERPC_DEF(\"401B3\", CPU_POWERPC_401B3, 401x3,\n+ POWERPC_DEF(\"401b3\", CPU_POWERPC_401B3, 401x3,\n \"PowerPC 401B3\")\n #endif\n- POWERPC_DEF(\"401C2\", CPU_POWERPC_401C2, 401x2,\n+ POWERPC_DEF(\"401c2\", CPU_POWERPC_401C2, 401x2,\n \"PowerPC 401C2\")\n- POWERPC_DEF(\"401D2\", CPU_POWERPC_401D2, 401x2,\n+ POWERPC_DEF(\"401d2\", CPU_POWERPC_401D2, 401x2,\n \"PowerPC 401D2\")\n- POWERPC_DEF(\"401E2\", CPU_POWERPC_401E2, 401x2,\n+ POWERPC_DEF(\"401e2\", CPU_POWERPC_401E2, 401x2,\n \"PowerPC 401E2\")\n- POWERPC_DEF(\"401F2\", CPU_POWERPC_401F2, 401x2,\n+ POWERPC_DEF(\"401f2\", CPU_POWERPC_401F2, 401x2,\n \"PowerPC 401F2\")\n /* XXX: to be checked */\n- POWERPC_DEF(\"401G2\", CPU_POWERPC_401G2, 401x2,\n+ POWERPC_DEF(\"401g2\", CPU_POWERPC_401G2, 401x2,\n \"PowerPC 401G2\")\n /* PowerPC 401 microcontrollers */\n #if defined(TODO)\n- POWERPC_DEF(\"401GF\", CPU_POWERPC_401GF, 401,\n+ POWERPC_DEF(\"401gf\", CPU_POWERPC_401GF, 401,\n \"PowerPC 401GF\")\n #endif\n- POWERPC_DEF(\"IOP480\", CPU_POWERPC_IOP480, IOP480,\n+ POWERPC_DEF(\"iop480\", CPU_POWERPC_IOP480, IOP480,\n \"IOP480 (401 microcontroller)\")\n- POWERPC_DEF(\"Cobra\", CPU_POWERPC_COBRA, 401,\n+ POWERPC_DEF(\"cobra\", CPU_POWERPC_COBRA, 401,\n \"IBM Processor for Network Resources\")\n #if defined(TODO)\n- POWERPC_DEF(\"Xipchip\", CPU_POWERPC_XIPCHIP, 401,\n+ POWERPC_DEF(\"xipchip\", CPU_POWERPC_XIPCHIP, 401,\n NULL)\n #endif\n /* PowerPC 403 family */\n /* PowerPC 403 microcontrollers */\n- POWERPC_DEF(\"403GA\", CPU_POWERPC_403GA, 403,\n+ POWERPC_DEF(\"403ga\", CPU_POWERPC_403GA, 403,\n \"PowerPC 403 GA\")\n- POWERPC_DEF(\"403GB\", CPU_POWERPC_403GB, 403,\n+ POWERPC_DEF(\"403gb\", CPU_POWERPC_403GB, 403,\n \"PowerPC 403 GB\")\n- POWERPC_DEF(\"403GC\", CPU_POWERPC_403GC, 403,\n+ POWERPC_DEF(\"403gc\", CPU_POWERPC_403GC, 403,\n \"PowerPC 403 GC\")\n- POWERPC_DEF(\"403GCX\", CPU_POWERPC_403GCX, 403GCX,\n+ POWERPC_DEF(\"403gcx\", CPU_POWERPC_403GCX, 403GCX,\n \"PowerPC 403 GCX\")\n #if defined(TODO)\n- POWERPC_DEF(\"403GP\", CPU_POWERPC_403GP, 403,\n+ POWERPC_DEF(\"403gp\", CPU_POWERPC_403GP, 403,\n \"PowerPC 403 GP\")\n #endif\n /* PowerPC 405 family */\n /* PowerPC 405 cores */\n #if defined(TODO)\n- POWERPC_DEF(\"405A3\", CPU_POWERPC_405A3, 405,\n+ POWERPC_DEF(\"405a3\", CPU_POWERPC_405A3, 405,\n \"PowerPC 405 A3\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405A4\", CPU_POWERPC_405A4, 405,\n+ POWERPC_DEF(\"405a4\", CPU_POWERPC_405A4, 405,\n \"PowerPC 405 A4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405B3\", CPU_POWERPC_405B3, 405,\n+ POWERPC_DEF(\"405b3\", CPU_POWERPC_405B3, 405,\n \"PowerPC 405 B3\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405B4\", CPU_POWERPC_405B4, 405,\n+ POWERPC_DEF(\"405b4\", CPU_POWERPC_405B4, 405,\n \"PowerPC 405 B4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405C3\", CPU_POWERPC_405C3, 405,\n+ POWERPC_DEF(\"405c3\", CPU_POWERPC_405C3, 405,\n \"PowerPC 405 C3\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405C4\", CPU_POWERPC_405C4, 405,\n+ POWERPC_DEF(\"405c4\", CPU_POWERPC_405C4, 405,\n \"PowerPC 405 C4\")\n #endif\n- POWERPC_DEF(\"405D2\", CPU_POWERPC_405D2, 405,\n+ POWERPC_DEF(\"405d2\", CPU_POWERPC_405D2, 405,\n \"PowerPC 405 D2\")\n #if defined(TODO)\n- POWERPC_DEF(\"405D3\", CPU_POWERPC_405D3, 405,\n+ POWERPC_DEF(\"405d3\", CPU_POWERPC_405D3, 405,\n \"PowerPC 405 D3\")\n #endif\n- POWERPC_DEF(\"405D4\", CPU_POWERPC_405D4, 405,\n+ POWERPC_DEF(\"405d4\", CPU_POWERPC_405D4, 405,\n \"PowerPC 405 D4\")\n #if defined(TODO)\n- POWERPC_DEF(\"405D5\", CPU_POWERPC_405D5, 405,\n+ POWERPC_DEF(\"405d5\", CPU_POWERPC_405D5, 405,\n \"PowerPC 405 D5\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405E4\", CPU_POWERPC_405E4, 405,\n+ POWERPC_DEF(\"405e4\", CPU_POWERPC_405E4, 405,\n \"PowerPC 405 E4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405F4\", CPU_POWERPC_405F4, 405,\n+ POWERPC_DEF(\"405f4\", CPU_POWERPC_405F4, 405,\n \"PowerPC 405 F4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405F5\", CPU_POWERPC_405F5, 405,\n+ POWERPC_DEF(\"405f5\", CPU_POWERPC_405F5, 405,\n \"PowerPC 405 F5\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405F6\", CPU_POWERPC_405F6, 405,\n+ POWERPC_DEF(\"405f6\", CPU_POWERPC_405F6, 405,\n \"PowerPC 405 F6\")\n #endif\n /* PowerPC 405 microcontrollers */\n- POWERPC_DEF(\"405CRa\", CPU_POWERPC_405CRa, 405,\n+ POWERPC_DEF(\"405cra\", CPU_POWERPC_405CRa, 405,\n \"PowerPC 405 CRa\")\n- POWERPC_DEF(\"405CRb\", CPU_POWERPC_405CRb, 405,\n+ POWERPC_DEF(\"405crb\", CPU_POWERPC_405CRb, 405,\n \"PowerPC 405 CRb\")\n- POWERPC_DEF(\"405CRc\", CPU_POWERPC_405CRc, 405,\n+ POWERPC_DEF(\"405crc\", CPU_POWERPC_405CRc, 405,\n \"PowerPC 405 CRc\")\n- POWERPC_DEF(\"405EP\", CPU_POWERPC_405EP, 405,\n+ POWERPC_DEF(\"405ep\", CPU_POWERPC_405EP, 405,\n \"PowerPC 405 EP\")\n #if defined(TODO)\n- POWERPC_DEF(\"405EXr\", CPU_POWERPC_405EXr, 405,\n+ POWERPC_DEF(\"405exr\", CPU_POWERPC_405EXr, 405,\n \"PowerPC 405 EXr\")\n #endif\n- POWERPC_DEF(\"405EZ\", CPU_POWERPC_405EZ, 405,\n+ POWERPC_DEF(\"405ez\", CPU_POWERPC_405EZ, 405,\n \"PowerPC 405 EZ\")\n #if defined(TODO)\n- POWERPC_DEF(\"405FX\", CPU_POWERPC_405FX, 405,\n+ POWERPC_DEF(\"405fx\", CPU_POWERPC_405FX, 405,\n \"PowerPC 405 FX\")\n #endif\n- POWERPC_DEF(\"405GPa\", CPU_POWERPC_405GPa, 405,\n+ POWERPC_DEF(\"405gpa\", CPU_POWERPC_405GPa, 405,\n \"PowerPC 405 GPa\")\n- POWERPC_DEF(\"405GPb\", CPU_POWERPC_405GPb, 405,\n+ POWERPC_DEF(\"405gpb\", CPU_POWERPC_405GPb, 405,\n \"PowerPC 405 GPb\")\n- POWERPC_DEF(\"405GPc\", CPU_POWERPC_405GPc, 405,\n+ POWERPC_DEF(\"405gpc\", CPU_POWERPC_405GPc, 405,\n \"PowerPC 405 GPc\")\n- POWERPC_DEF(\"405GPd\", CPU_POWERPC_405GPd, 405,\n+ POWERPC_DEF(\"405gpd\", CPU_POWERPC_405GPd, 405,\n \"PowerPC 405 GPd\")\n- POWERPC_DEF(\"405GPR\", CPU_POWERPC_405GPR, 405,\n+ POWERPC_DEF(\"405gpr\", CPU_POWERPC_405GPR, 405,\n \"PowerPC 405 GPR\")\n #if defined(TODO)\n- POWERPC_DEF(\"405H\", CPU_POWERPC_405H, 405,\n+ POWERPC_DEF(\"405h\", CPU_POWERPC_405H, 405,\n \"PowerPC 405 H\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405L\", CPU_POWERPC_405L, 405,\n+ POWERPC_DEF(\"405l\", CPU_POWERPC_405L, 405,\n \"PowerPC 405 L\")\n #endif\n- POWERPC_DEF(\"405LP\", CPU_POWERPC_405LP, 405,\n+ POWERPC_DEF(\"405lp\", CPU_POWERPC_405LP, 405,\n \"PowerPC 405 LP\")\n #if defined(TODO)\n- POWERPC_DEF(\"405PM\", CPU_POWERPC_405PM, 405,\n+ POWERPC_DEF(\"405pm\", CPU_POWERPC_405PM, 405,\n \"PowerPC 405 PM\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405PS\", CPU_POWERPC_405PS, 405,\n+ POWERPC_DEF(\"405ps\", CPU_POWERPC_405PS, 405,\n \"PowerPC 405 PS\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"405S\", CPU_POWERPC_405S, 405,\n+ POWERPC_DEF(\"405s\", CPU_POWERPC_405S, 405,\n \"PowerPC 405 S\")\n #endif\n- POWERPC_DEF(\"Npe405H\", CPU_POWERPC_NPE405H, 405,\n+ POWERPC_DEF(\"npe405h\", CPU_POWERPC_NPE405H, 405,\n \"Npe405 H\")\n- POWERPC_DEF(\"Npe405H2\", CPU_POWERPC_NPE405H2, 405,\n+ POWERPC_DEF(\"npe405h2\", CPU_POWERPC_NPE405H2, 405,\n \"Npe405 H2\")\n- POWERPC_DEF(\"Npe405L\", CPU_POWERPC_NPE405L, 405,\n+ POWERPC_DEF(\"npe405l\", CPU_POWERPC_NPE405L, 405,\n \"Npe405 L\")\n- POWERPC_DEF(\"Npe4GS3\", CPU_POWERPC_NPE4GS3, 405,\n+ POWERPC_DEF(\"npe4gs3\", CPU_POWERPC_NPE4GS3, 405,\n \"Npe4GS3\")\n #if defined(TODO)\n- POWERPC_DEF(\"Npcxx1\", CPU_POWERPC_NPCxx1, 405,\n+ POWERPC_DEF(\"npcxx1\", CPU_POWERPC_NPCxx1, 405,\n NULL)\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"Npr161\", CPU_POWERPC_NPR161, 405,\n+ POWERPC_DEF(\"npr161\", CPU_POWERPC_NPR161, 405,\n NULL)\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"LC77700\", CPU_POWERPC_LC77700, 405,\n+ POWERPC_DEF(\"lc77700\", CPU_POWERPC_LC77700, 405,\n \"PowerPC LC77700 (Sanyo)\")\n #endif\n /* PowerPC 401/403/405 based set-top-box microcontrollers */\n #if defined(TODO)\n- POWERPC_DEF(\"STB01000\", CPU_POWERPC_STB01000, 401x2,\n+ POWERPC_DEF(\"stb01000\", CPU_POWERPC_STB01000, 401x2,\n \"STB010000\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"STB01010\", CPU_POWERPC_STB01010, 401x2,\n+ POWERPC_DEF(\"stb01010\", CPU_POWERPC_STB01010, 401x2,\n \"STB01010\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"STB0210\", CPU_POWERPC_STB0210, 401x3,\n+ POWERPC_DEF(\"stb0210\", CPU_POWERPC_STB0210, 401x3,\n \"STB0210\")\n #endif\n- POWERPC_DEF(\"STB03\", CPU_POWERPC_STB03, 405,\n+ POWERPC_DEF(\"stb03\", CPU_POWERPC_STB03, 405,\n \"STB03xx\")\n #if defined(TODO)\n- POWERPC_DEF(\"STB043\", CPU_POWERPC_STB043, 405,\n+ POWERPC_DEF(\"stb043\", CPU_POWERPC_STB043, 405,\n \"STB043x\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"STB045\", CPU_POWERPC_STB045, 405,\n+ POWERPC_DEF(\"stb045\", CPU_POWERPC_STB045, 405,\n \"STB045x\")\n #endif\n- POWERPC_DEF(\"STB04\", CPU_POWERPC_STB04, 405,\n+ POWERPC_DEF(\"stb04\", CPU_POWERPC_STB04, 405,\n \"STB04xx\")\n- POWERPC_DEF(\"STB25\", CPU_POWERPC_STB25, 405,\n+ POWERPC_DEF(\"stb25\", CPU_POWERPC_STB25, 405,\n \"STB25xx\")\n #if defined(TODO)\n- POWERPC_DEF(\"STB130\", CPU_POWERPC_STB130, 405,\n+ POWERPC_DEF(\"stb130\", CPU_POWERPC_STB130, 405,\n \"STB130\")\n #endif\n /* Xilinx PowerPC 405 cores */\n@@ -305,95 +305,95 @@\n #endif\n /* PowerPC 440 cores */\n #if defined(TODO)\n- POWERPC_DEF(\"440A4\", CPU_POWERPC_440A4, 440x4,\n+ POWERPC_DEF(\"440a4\", CPU_POWERPC_440A4, 440x4,\n \"PowerPC 440 A4\")\n #endif\n- POWERPC_DEF(\"440-Xilinx\", CPU_POWERPC_440_XILINX, 440x5,\n+ POWERPC_DEF(\"440-xilinx\", CPU_POWERPC_440_XILINX, 440x5,\n \"PowerPC 440 Xilinx 5\")\n \n- POWERPC_DEF(\"440-Xilinx-w-dfpu\", CPU_POWERPC_440_XILINX, 440x5wDFPU,\n+ POWERPC_DEF(\"440-xilinx-w-dfpu\", CPU_POWERPC_440_XILINX, 440x5wDFPU,\n \"PowerPC 440 Xilinx 5 With a Double Prec. FPU\")\n #if defined(TODO)\n- POWERPC_DEF(\"440A5\", CPU_POWERPC_440A5, 440x5,\n+ POWERPC_DEF(\"440a5\", CPU_POWERPC_440A5, 440x5,\n \"PowerPC 440 A5\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440B4\", CPU_POWERPC_440B4, 440x4,\n+ POWERPC_DEF(\"440b4\", CPU_POWERPC_440B4, 440x4,\n \"PowerPC 440 B4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440G4\", CPU_POWERPC_440G4, 440x4,\n+ POWERPC_DEF(\"440g4\", CPU_POWERPC_440G4, 440x4,\n \"PowerPC 440 G4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440F5\", CPU_POWERPC_440F5, 440x5,\n+ POWERPC_DEF(\"440f5\", CPU_POWERPC_440F5, 440x5,\n \"PowerPC 440 F5\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440G5\", CPU_POWERPC_440G5, 440x5,\n+ POWERPC_DEF(\"440g5\", CPU_POWERPC_440G5, 440x5,\n \"PowerPC 440 G5\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440H4\", CPU_POWERPC_440H4, 440x4,\n+ POWERPC_DEF(\"440h4\", CPU_POWERPC_440H4, 440x4,\n \"PowerPC 440H4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440H6\", CPU_POWERPC_440H6, 440Gx5,\n+ POWERPC_DEF(\"440h6\", CPU_POWERPC_440H6, 440Gx5,\n \"PowerPC 440H6\")\n #endif\n /* PowerPC 440 microcontrollers */\n- POWERPC_DEF(\"440EPa\", CPU_POWERPC_440EPa, 440EP,\n+ POWERPC_DEF(\"440epa\", CPU_POWERPC_440EPa, 440EP,\n \"PowerPC 440 EPa\")\n- POWERPC_DEF(\"440EPb\", CPU_POWERPC_440EPb, 440EP,\n+ POWERPC_DEF(\"440epb\", CPU_POWERPC_440EPb, 440EP,\n \"PowerPC 440 EPb\")\n- POWERPC_DEF(\"440EPX\", CPU_POWERPC_440EPX, 440EP,\n+ POWERPC_DEF(\"440epx\", CPU_POWERPC_440EPX, 440EP,\n \"PowerPC 440 EPX\")\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GPb\", CPU_POWERPC_440GPb, 440GP,\n+ POWERPC_DEF(\"440gpb\", CPU_POWERPC_440GPb, 440GP,\n \"PowerPC 440 GPb\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GPc\", CPU_POWERPC_440GPc, 440GP,\n+ POWERPC_DEF(\"440gpc\", CPU_POWERPC_440GPc, 440GP,\n \"PowerPC 440 GPc\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GRa\", CPU_POWERPC_440GRa, 440x5,\n+ POWERPC_DEF(\"440gra\", CPU_POWERPC_440GRa, 440x5,\n \"PowerPC 440 GRa\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GRX\", CPU_POWERPC_440GRX, 440x5,\n+ POWERPC_DEF(\"440grx\", CPU_POWERPC_440GRX, 440x5,\n \"PowerPC 440 GRX\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GXa\", CPU_POWERPC_440GXa, 440EP,\n+ POWERPC_DEF(\"440gxa\", CPU_POWERPC_440GXa, 440EP,\n \"PowerPC 440 GXa\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GXb\", CPU_POWERPC_440GXb, 440EP,\n+ POWERPC_DEF(\"440gxb\", CPU_POWERPC_440GXb, 440EP,\n \"PowerPC 440 GXb\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GXc\", CPU_POWERPC_440GXc, 440EP,\n+ POWERPC_DEF(\"440gxc\", CPU_POWERPC_440GXc, 440EP,\n \"PowerPC 440 GXc\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440GXf\", CPU_POWERPC_440GXf, 440EP,\n+ POWERPC_DEF(\"440gxf\", CPU_POWERPC_440GXf, 440EP,\n \"PowerPC 440 GXf\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"440S\", CPU_POWERPC_440S, 440,\n+ POWERPC_DEF(\"440s\", CPU_POWERPC_440S, 440,\n \"PowerPC 440 S\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440SP\", CPU_POWERPC_440SP, 440EP,\n+ POWERPC_DEF(\"440sp\", CPU_POWERPC_440SP, 440EP,\n \"PowerPC 440 SP\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440SP2\", CPU_POWERPC_440SP2, 440EP,\n+ POWERPC_DEF(\"440sp2\", CPU_POWERPC_440SP2, 440EP,\n \"PowerPC 440 SP2\")\n #endif\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"440SPE\", CPU_POWERPC_440SPE, 440EP,\n+ POWERPC_DEF(\"440spe\", CPU_POWERPC_440SPE, 440EP,\n \"PowerPC 440 SPE\")\n #endif\n /* PowerPC 460 family */\n@@ -403,67 +403,67 @@\n #endif\n /* PowerPC 464 microcontrollers */\n #if defined(TODO)\n- POWERPC_DEF(\"464H90\", CPU_POWERPC_464H90, 460,\n+ POWERPC_DEF(\"464h90\", CPU_POWERPC_464H90, 460,\n \"PowerPC 464H90\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"464H90F\", CPU_POWERPC_464H90F, 460F,\n+ POWERPC_DEF(\"464h90f\", CPU_POWERPC_464H90F, 460F,\n \"PowerPC 464H90F\")\n #endif\n /* Freescale embedded PowerPC cores */\n /* MPC5xx family (aka RCPU) */\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"MPC5xx\", CPU_POWERPC_MPC5xx, MPC5xx,\n+ POWERPC_DEF(\"mpc5xx\", CPU_POWERPC_MPC5xx, MPC5xx,\n \"Generic MPC5xx core\")\n #endif\n /* MPC8xx family (aka PowerQUICC) */\n #if defined(TODO_USER_ONLY)\n- POWERPC_DEF(\"MPC8xx\", CPU_POWERPC_MPC8xx, MPC8xx,\n+ POWERPC_DEF(\"mpc8xx\", CPU_POWERPC_MPC8xx, MPC8xx,\n \"Generic MPC8xx core\")\n #endif\n /* MPC82xx family (aka PowerQUICC-II) */\n- POWERPC_DEF(\"G2\", CPU_POWERPC_G2, G2,\n+ POWERPC_DEF(\"g2\", CPU_POWERPC_G2, G2,\n \"PowerPC G2 core\")\n- POWERPC_DEF(\"G2H4\", CPU_POWERPC_G2H4, G2,\n+ POWERPC_DEF(\"g2h4\", CPU_POWERPC_G2H4, G2,\n \"PowerPC G2 H4 core\")\n- POWERPC_DEF(\"G2GP\", CPU_POWERPC_G2gp, G2,\n+ POWERPC_DEF(\"g2gp\", CPU_POWERPC_G2gp, G2,\n \"PowerPC G2 GP core\")\n- POWERPC_DEF(\"G2LS\", CPU_POWERPC_G2ls, G2,\n+ POWERPC_DEF(\"g2ls\", CPU_POWERPC_G2ls, G2,\n \"PowerPC G2 LS core\")\n- POWERPC_DEF(\"G2HiP3\", CPU_POWERPC_G2_HIP3, G2,\n+ POWERPC_DEF(\"g2hip3\", CPU_POWERPC_G2_HIP3, G2,\n \"PowerPC G2 HiP3 core\")\n- POWERPC_DEF(\"G2HiP4\", CPU_POWERPC_G2_HIP4, G2,\n+ POWERPC_DEF(\"g2hip4\", CPU_POWERPC_G2_HIP4, G2,\n \"PowerPC G2 HiP4 core\")\n- POWERPC_DEF(\"MPC603\", CPU_POWERPC_MPC603, 603E,\n+ POWERPC_DEF(\"mpc603\", CPU_POWERPC_MPC603, 603E,\n \"PowerPC MPC603 core\")\n- POWERPC_DEF(\"G2le\", CPU_POWERPC_G2LE, G2LE,\n+ POWERPC_DEF(\"g2le\", CPU_POWERPC_G2LE, G2LE,\n \"PowerPC G2le core (same as G2 plus little-endian mode support)\")\n- POWERPC_DEF(\"G2leGP\", CPU_POWERPC_G2LEgp, G2LE,\n+ POWERPC_DEF(\"g2legp\", CPU_POWERPC_G2LEgp, G2LE,\n \"PowerPC G2LE GP core\")\n- POWERPC_DEF(\"G2leLS\", CPU_POWERPC_G2LEls, G2LE,\n+ POWERPC_DEF(\"g2lels\", CPU_POWERPC_G2LEls, G2LE,\n \"PowerPC G2LE LS core\")\n- POWERPC_DEF(\"G2leGP1\", CPU_POWERPC_G2LEgp1, G2LE,\n+ POWERPC_DEF(\"g2legp1\", CPU_POWERPC_G2LEgp1, G2LE,\n \"PowerPC G2LE GP1 core\")\n- POWERPC_DEF(\"G2leGP3\", CPU_POWERPC_G2LEgp3, G2LE,\n+ POWERPC_DEF(\"g2legp3\", CPU_POWERPC_G2LEgp3, G2LE,\n \"PowerPC G2LE GP3 core\")\n /* PowerPC G2 microcontrollers */\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5121\", \"MPC5121\",\n+ POWERPC_DEF_SVR(\"mpc5121\", \"MPC5121\",\n CPU_POWERPC_MPC5121, POWERPC_SVR_5121, G2LE)\n #endif\n- POWERPC_DEF_SVR(\"MPC5200_v10\", \"MPC5200 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc5200_v10\", \"MPC5200 v1.0\",\n CPU_POWERPC_MPC5200_v10, POWERPC_SVR_5200_v10, G2LE)\n- POWERPC_DEF_SVR(\"MPC5200_v11\", \"MPC5200 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc5200_v11\", \"MPC5200 v1.1\",\n CPU_POWERPC_MPC5200_v11, POWERPC_SVR_5200_v11, G2LE)\n- POWERPC_DEF_SVR(\"MPC5200_v12\", \"MPC5200 v1.2\",\n+ POWERPC_DEF_SVR(\"mpc5200_v12\", \"MPC5200 v1.2\",\n CPU_POWERPC_MPC5200_v12, POWERPC_SVR_5200_v12, G2LE)\n- POWERPC_DEF_SVR(\"MPC5200B_v20\", \"MPC5200B v2.0\",\n+ POWERPC_DEF_SVR(\"mpc5200b_v20\", \"MPC5200B v2.0\",\n CPU_POWERPC_MPC5200B_v20, POWERPC_SVR_5200B_v20, G2LE)\n- POWERPC_DEF_SVR(\"MPC5200B_v21\", \"MPC5200B v2.1\",\n+ POWERPC_DEF_SVR(\"mpc5200b_v21\", \"MPC5200B v2.1\",\n CPU_POWERPC_MPC5200B_v21, POWERPC_SVR_5200B_v21, G2LE)\n /* e200 family */\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC55xx\", \"Generic MPC55xx core\",\n+ POWERPC_DEF_SVR(\"mpc55xx\", \"Generic MPC55xx core\",\n CPU_POWERPC_MPC55xx, POWERPC_SVR_55xx, e200)\n #endif\n #if defined(TODO)\n@@ -484,91 +484,91 @@\n \"PowerPC e200z6 core\")\n /* PowerPC e200 microcontrollers */\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5514E\", \"MPC5514E\",\n+ POWERPC_DEF_SVR(\"mpc5514e\", \"MPC5514E\",\n CPU_POWERPC_MPC5514E, POWERPC_SVR_5514E, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5514E_v0\", \"MPC5514E v0\",\n+ POWERPC_DEF_SVR(\"mpc5514e_v0\", \"MPC5514E v0\",\n CPU_POWERPC_MPC5514E_v0, POWERPC_SVR_5514E_v0, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5514E_v1\", \"MPC5514E v1\",\n+ POWERPC_DEF_SVR(\"mpc5514e_v1\", \"MPC5514E v1\",\n CPU_POWERPC_MPC5514E_v1, POWERPC_SVR_5514E_v1, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5514G\", \"MPC5514G\",\n+ POWERPC_DEF_SVR(\"mpc5514g\", \"MPC5514G\",\n CPU_POWERPC_MPC5514G, POWERPC_SVR_5514G, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5514G_v0\", \"MPC5514G v0\",\n+ POWERPC_DEF_SVR(\"mpc5514g_v0\", \"MPC5514G v0\",\n CPU_POWERPC_MPC5514G_v0, POWERPC_SVR_5514G_v0, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5514G_v1\", \"MPC5514G v1\",\n+ POWERPC_DEF_SVR(\"mpc5514g_v1\", \"MPC5514G v1\",\n CPU_POWERPC_MPC5514G_v1, POWERPC_SVR_5514G_v1, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5515S\", \"MPC5515S\",\n+ POWERPC_DEF_SVR(\"mpc5515s\", \"MPC5515S\",\n CPU_POWERPC_MPC5515S, POWERPC_SVR_5515S, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516E\", \"MPC5516E\",\n+ POWERPC_DEF_SVR(\"mpc5516e\", \"MPC5516E\",\n CPU_POWERPC_MPC5516E, POWERPC_SVR_5516E, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516E_v0\", \"MPC5516E v0\",\n+ POWERPC_DEF_SVR(\"mpc5516e_v0\", \"MPC5516E v0\",\n CPU_POWERPC_MPC5516E_v0, POWERPC_SVR_5516E_v0, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516E_v1\", \"MPC5516E v1\",\n+ POWERPC_DEF_SVR(\"mpc5516e_v1\", \"MPC5516E v1\",\n CPU_POWERPC_MPC5516E_v1, POWERPC_SVR_5516E_v1, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516G\", \"MPC5516G\",\n+ POWERPC_DEF_SVR(\"mpc5516g\", \"MPC5516G\",\n CPU_POWERPC_MPC5516G, POWERPC_SVR_5516G, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516G_v0\", \"MPC5516G v0\",\n+ POWERPC_DEF_SVR(\"mpc5516g_v0\", \"MPC5516G v0\",\n CPU_POWERPC_MPC5516G_v0, POWERPC_SVR_5516G_v0, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516G_v1\", \"MPC5516G v1\",\n+ POWERPC_DEF_SVR(\"mpc5516g_v1\", \"MPC5516G v1\",\n CPU_POWERPC_MPC5516G_v1, POWERPC_SVR_5516G_v1, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5516S\", \"MPC5516S\",\n+ POWERPC_DEF_SVR(\"mpc5516s\", \"MPC5516S\",\n CPU_POWERPC_MPC5516S, POWERPC_SVR_5516S, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5533\", \"MPC5533\",\n+ POWERPC_DEF_SVR(\"mpc5533\", \"MPC5533\",\n CPU_POWERPC_MPC5533, POWERPC_SVR_5533, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5534\", \"MPC5534\",\n+ POWERPC_DEF_SVR(\"mpc5534\", \"MPC5534\",\n CPU_POWERPC_MPC5534, POWERPC_SVR_5534, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5553\", \"MPC5553\",\n+ POWERPC_DEF_SVR(\"mpc5553\", \"MPC5553\",\n CPU_POWERPC_MPC5553, POWERPC_SVR_5553, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5554\", \"MPC5554\",\n+ POWERPC_DEF_SVR(\"mpc5554\", \"MPC5554\",\n CPU_POWERPC_MPC5554, POWERPC_SVR_5554, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5561\", \"MPC5561\",\n+ POWERPC_DEF_SVR(\"mpc5561\", \"MPC5561\",\n CPU_POWERPC_MPC5561, POWERPC_SVR_5561, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5565\", \"MPC5565\",\n+ POWERPC_DEF_SVR(\"mpc5565\", \"MPC5565\",\n CPU_POWERPC_MPC5565, POWERPC_SVR_5565, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5566\", \"MPC5566\",\n+ POWERPC_DEF_SVR(\"mpc5566\", \"MPC5566\",\n CPU_POWERPC_MPC5566, POWERPC_SVR_5566, e200)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC5567\", \"MPC5567\",\n+ POWERPC_DEF_SVR(\"mpc5567\", \"MPC5567\",\n CPU_POWERPC_MPC5567, POWERPC_SVR_5567, e200)\n #endif\n /* e300 family */\n@@ -582,96 +582,96 @@\n \"PowerPC e300c4 core\")\n /* PowerPC e300 microcontrollers */\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8313\", \"MPC8313\",\n+ POWERPC_DEF_SVR(\"mpc8313\", \"MPC8313\",\n CPU_POWERPC_MPC831x, POWERPC_SVR_8313, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8313E\", \"MPC8313E\",\n+ POWERPC_DEF_SVR(\"mpc8313e\", \"MPC8313E\",\n CPU_POWERPC_MPC831x, POWERPC_SVR_8313E, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8314\", \"MPC8314\",\n+ POWERPC_DEF_SVR(\"mpc8314\", \"MPC8314\",\n CPU_POWERPC_MPC831x, POWERPC_SVR_8314, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8314E\", \"MPC8314E\",\n+ POWERPC_DEF_SVR(\"mpc8314e\", \"MPC8314E\",\n CPU_POWERPC_MPC831x, POWERPC_SVR_8314E, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8315\", \"MPC8315\",\n+ POWERPC_DEF_SVR(\"mpc8315\", \"MPC8315\",\n CPU_POWERPC_MPC831x, POWERPC_SVR_8315, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8315E\", \"MPC8315E\",\n+ POWERPC_DEF_SVR(\"mpc8315e\", \"MPC8315E\",\n CPU_POWERPC_MPC831x, POWERPC_SVR_8315E, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8321\", \"MPC8321\",\n+ POWERPC_DEF_SVR(\"mpc8321\", \"MPC8321\",\n CPU_POWERPC_MPC832x, POWERPC_SVR_8321, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8321E\", \"MPC8321E\",\n+ POWERPC_DEF_SVR(\"mpc8321e\", \"MPC8321E\",\n CPU_POWERPC_MPC832x, POWERPC_SVR_8321E, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8323\", \"MPC8323\",\n+ POWERPC_DEF_SVR(\"mpc8323\", \"MPC8323\",\n CPU_POWERPC_MPC832x, POWERPC_SVR_8323, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8323E\", \"MPC8323E\",\n+ POWERPC_DEF_SVR(\"mpc8323e\", \"MPC8323E\",\n CPU_POWERPC_MPC832x, POWERPC_SVR_8323E, e300)\n #endif\n- POWERPC_DEF_SVR(\"MPC8343\", \"MPC8343\",\n+ POWERPC_DEF_SVR(\"mpc8343\", \"MPC8343\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8343, e300)\n- POWERPC_DEF_SVR(\"MPC8343A\", \"MPC8343A\",\n+ POWERPC_DEF_SVR(\"mpc8343a\", \"MPC8343A\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8343A, e300)\n- POWERPC_DEF_SVR(\"MPC8343E\", \"MPC8343E\",\n+ POWERPC_DEF_SVR(\"mpc8343e\", \"MPC8343E\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8343E, e300)\n- POWERPC_DEF_SVR(\"MPC8343EA\", \"MPC8343EA\",\n+ POWERPC_DEF_SVR(\"mpc8343ea\", \"MPC8343EA\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8343EA, e300)\n- POWERPC_DEF_SVR(\"MPC8347T\", \"MPC8347T\",\n+ POWERPC_DEF_SVR(\"mpc8347t\", \"MPC8347T\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347T, e300)\n- POWERPC_DEF_SVR(\"MPC8347P\", \"MPC8347P\",\n+ POWERPC_DEF_SVR(\"mpc8347p\", \"MPC8347P\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347P, e300)\n- POWERPC_DEF_SVR(\"MPC8347AT\", \"MPC8347AT\",\n+ POWERPC_DEF_SVR(\"mpc8347at\", \"MPC8347AT\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347AT, e300)\n- POWERPC_DEF_SVR(\"MPC8347AP\", \"MPC8347AP\",\n+ POWERPC_DEF_SVR(\"mpc8347ap\", \"MPC8347AP\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347AP, e300)\n- POWERPC_DEF_SVR(\"MPC8347ET\", \"MPC8347ET\",\n+ POWERPC_DEF_SVR(\"mpc8347et\", \"MPC8347ET\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347ET, e300)\n- POWERPC_DEF_SVR(\"MPC8347EP\", \"MPC8343EP\",\n+ POWERPC_DEF_SVR(\"mpc8347ep\", \"MPC8343EP\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347EP, e300)\n- POWERPC_DEF_SVR(\"MPC8347EAT\", \"MPC8347EAT\",\n+ POWERPC_DEF_SVR(\"mpc8347eat\", \"MPC8347EAT\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347EAT, e300)\n- POWERPC_DEF_SVR(\"MPC8347EAP\", \"MPC8343EAP\",\n+ POWERPC_DEF_SVR(\"mpc8347eap\", \"MPC8343EAP\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8347EAP, e300)\n- POWERPC_DEF_SVR(\"MPC8349\", \"MPC8349\",\n+ POWERPC_DEF_SVR(\"mpc8349\", \"MPC8349\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8349, e300)\n- POWERPC_DEF_SVR(\"MPC8349A\", \"MPC8349A\",\n+ POWERPC_DEF_SVR(\"mpc8349a\", \"MPC8349A\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8349A, e300)\n- POWERPC_DEF_SVR(\"MPC8349E\", \"MPC8349E\",\n+ POWERPC_DEF_SVR(\"mpc8349e\", \"MPC8349E\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8349E, e300)\n- POWERPC_DEF_SVR(\"MPC8349EA\", \"MPC8349EA\",\n+ POWERPC_DEF_SVR(\"mpc8349ea\", \"MPC8349EA\",\n CPU_POWERPC_MPC834x, POWERPC_SVR_8349EA, e300)\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8358E\", \"MPC8358E\",\n+ POWERPC_DEF_SVR(\"mpc8358e\", \"MPC8358E\",\n CPU_POWERPC_MPC835x, POWERPC_SVR_8358E, e300)\n #endif\n #if defined(TODO)\n- POWERPC_DEF_SVR(\"MPC8360E\", \"MPC8360E\",\n+ POWERPC_DEF_SVR(\"mpc8360e\", \"MPC8360E\",\n CPU_POWERPC_MPC836x, POWERPC_SVR_8360E, e300)\n #endif\n- POWERPC_DEF_SVR(\"MPC8377\", \"MPC8377\",\n+ POWERPC_DEF_SVR(\"mpc8377\", \"MPC8377\",\n CPU_POWERPC_MPC837x, POWERPC_SVR_8377, e300)\n- POWERPC_DEF_SVR(\"MPC8377E\", \"MPC8377E\",\n+ POWERPC_DEF_SVR(\"mpc8377e\", \"MPC8377E\",\n CPU_POWERPC_MPC837x, POWERPC_SVR_8377E, e300)\n- POWERPC_DEF_SVR(\"MPC8378\", \"MPC8378\",\n+ POWERPC_DEF_SVR(\"mpc8378\", \"MPC8378\",\n CPU_POWERPC_MPC837x, POWERPC_SVR_8378, e300)\n- POWERPC_DEF_SVR(\"MPC8378E\", \"MPC8378E\",\n+ POWERPC_DEF_SVR(\"mpc8378e\", \"MPC8378E\",\n CPU_POWERPC_MPC837x, POWERPC_SVR_8378E, e300)\n- POWERPC_DEF_SVR(\"MPC8379\", \"MPC8379\",\n+ POWERPC_DEF_SVR(\"mpc8379\", \"MPC8379\",\n CPU_POWERPC_MPC837x, POWERPC_SVR_8379, e300)\n- POWERPC_DEF_SVR(\"MPC8379E\", \"MPC8379E\",\n+ POWERPC_DEF_SVR(\"mpc8379e\", \"MPC8379E\",\n CPU_POWERPC_MPC837x, POWERPC_SVR_8379E, e300)\n /* e500 family */\n POWERPC_DEF_SVR(\"e500_v10\", \"PowerPC e500 v1.0 core\",\n@@ -695,115 +695,115 @@\n CPU_POWERPC_e5500, POWERPC_SVR_E500, e5500)\n #endif\n /* PowerPC e500 microcontrollers */\n- POWERPC_DEF_SVR(\"MPC8533_v10\", \"MPC8533 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8533_v10\", \"MPC8533 v1.0\",\n CPU_POWERPC_MPC8533_v10, POWERPC_SVR_8533_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8533_v11\", \"MPC8533 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8533_v11\", \"MPC8533 v1.1\",\n CPU_POWERPC_MPC8533_v11, POWERPC_SVR_8533_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8533E_v10\", \"MPC8533E v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8533e_v10\", \"MPC8533E v1.0\",\n CPU_POWERPC_MPC8533E_v10, POWERPC_SVR_8533E_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8533E_v11\", \"MPC8533E v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8533e_v11\", \"MPC8533E v1.1\",\n CPU_POWERPC_MPC8533E_v11, POWERPC_SVR_8533E_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8540_v10\", \"MPC8540 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8540_v10\", \"MPC8540 v1.0\",\n CPU_POWERPC_MPC8540_v10, POWERPC_SVR_8540_v10, e500v1)\n- POWERPC_DEF_SVR(\"MPC8540_v20\", \"MPC8540 v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8540_v20\", \"MPC8540 v2.0\",\n CPU_POWERPC_MPC8540_v20, POWERPC_SVR_8540_v20, e500v1)\n- POWERPC_DEF_SVR(\"MPC8540_v21\", \"MPC8540 v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8540_v21\", \"MPC8540 v2.1\",\n CPU_POWERPC_MPC8540_v21, POWERPC_SVR_8540_v21, e500v1)\n- POWERPC_DEF_SVR(\"MPC8541_v10\", \"MPC8541 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8541_v10\", \"MPC8541 v1.0\",\n CPU_POWERPC_MPC8541_v10, POWERPC_SVR_8541_v10, e500v1)\n- POWERPC_DEF_SVR(\"MPC8541_v11\", \"MPC8541 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8541_v11\", \"MPC8541 v1.1\",\n CPU_POWERPC_MPC8541_v11, POWERPC_SVR_8541_v11, e500v1)\n- POWERPC_DEF_SVR(\"MPC8541E_v10\", \"MPC8541E v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8541e_v10\", \"MPC8541E v1.0\",\n CPU_POWERPC_MPC8541E_v10, POWERPC_SVR_8541E_v10, e500v1)\n- POWERPC_DEF_SVR(\"MPC8541E_v11\", \"MPC8541E v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8541e_v11\", \"MPC8541E v1.1\",\n CPU_POWERPC_MPC8541E_v11, POWERPC_SVR_8541E_v11, e500v1)\n- POWERPC_DEF_SVR(\"MPC8543_v10\", \"MPC8543 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8543_v10\", \"MPC8543 v1.0\",\n CPU_POWERPC_MPC8543_v10, POWERPC_SVR_8543_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543_v11\", \"MPC8543 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8543_v11\", \"MPC8543 v1.1\",\n CPU_POWERPC_MPC8543_v11, POWERPC_SVR_8543_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543_v20\", \"MPC8543 v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8543_v20\", \"MPC8543 v2.0\",\n CPU_POWERPC_MPC8543_v20, POWERPC_SVR_8543_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543_v21\", \"MPC8543 v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8543_v21\", \"MPC8543 v2.1\",\n CPU_POWERPC_MPC8543_v21, POWERPC_SVR_8543_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543E_v10\", \"MPC8543E v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8543e_v10\", \"MPC8543E v1.0\",\n CPU_POWERPC_MPC8543E_v10, POWERPC_SVR_8543E_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543E_v11\", \"MPC8543E v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8543e_v11\", \"MPC8543E v1.1\",\n CPU_POWERPC_MPC8543E_v11, POWERPC_SVR_8543E_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543E_v20\", \"MPC8543E v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8543e_v20\", \"MPC8543E v2.0\",\n CPU_POWERPC_MPC8543E_v20, POWERPC_SVR_8543E_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8543E_v21\", \"MPC8543E v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8543e_v21\", \"MPC8543E v2.1\",\n CPU_POWERPC_MPC8543E_v21, POWERPC_SVR_8543E_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8544_v10\", \"MPC8544 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8544_v10\", \"MPC8544 v1.0\",\n CPU_POWERPC_MPC8544_v10, POWERPC_SVR_8544_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8544_v11\", \"MPC8544 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8544_v11\", \"MPC8544 v1.1\",\n CPU_POWERPC_MPC8544_v11, POWERPC_SVR_8544_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8544E_v10\", \"MPC8544E v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8544e_v10\", \"MPC8544E v1.0\",\n CPU_POWERPC_MPC8544E_v10, POWERPC_SVR_8544E_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8544E_v11\", \"MPC8544E v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8544e_v11\", \"MPC8544E v1.1\",\n CPU_POWERPC_MPC8544E_v11, POWERPC_SVR_8544E_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8545_v20\", \"MPC8545 v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8545_v20\", \"MPC8545 v2.0\",\n CPU_POWERPC_MPC8545_v20, POWERPC_SVR_8545_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8545_v21\", \"MPC8545 v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8545_v21\", \"MPC8545 v2.1\",\n CPU_POWERPC_MPC8545_v21, POWERPC_SVR_8545_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8545E_v20\", \"MPC8545E v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8545e_v20\", \"MPC8545E v2.0\",\n CPU_POWERPC_MPC8545E_v20, POWERPC_SVR_8545E_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8545E_v21\", \"MPC8545E v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8545e_v21\", \"MPC8545E v2.1\",\n CPU_POWERPC_MPC8545E_v21, POWERPC_SVR_8545E_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8547E_v20\", \"MPC8547E v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8547e_v20\", \"MPC8547E v2.0\",\n CPU_POWERPC_MPC8547E_v20, POWERPC_SVR_8547E_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8547E_v21\", \"MPC8547E v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8547e_v21\", \"MPC8547E v2.1\",\n CPU_POWERPC_MPC8547E_v21, POWERPC_SVR_8547E_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548_v10\", \"MPC8548 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8548_v10\", \"MPC8548 v1.0\",\n CPU_POWERPC_MPC8548_v10, POWERPC_SVR_8548_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548_v11\", \"MPC8548 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8548_v11\", \"MPC8548 v1.1\",\n CPU_POWERPC_MPC8548_v11, POWERPC_SVR_8548_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548_v20\", \"MPC8548 v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8548_v20\", \"MPC8548 v2.0\",\n CPU_POWERPC_MPC8548_v20, POWERPC_SVR_8548_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548_v21\", \"MPC8548 v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8548_v21\", \"MPC8548 v2.1\",\n CPU_POWERPC_MPC8548_v21, POWERPC_SVR_8548_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548E_v10\", \"MPC8548E v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8548e_v10\", \"MPC8548E v1.0\",\n CPU_POWERPC_MPC8548E_v10, POWERPC_SVR_8548E_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548E_v11\", \"MPC8548E v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8548e_v11\", \"MPC8548E v1.1\",\n CPU_POWERPC_MPC8548E_v11, POWERPC_SVR_8548E_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548E_v20\", \"MPC8548E v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8548e_v20\", \"MPC8548E v2.0\",\n CPU_POWERPC_MPC8548E_v20, POWERPC_SVR_8548E_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8548E_v21\", \"MPC8548E v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8548e_v21\", \"MPC8548E v2.1\",\n CPU_POWERPC_MPC8548E_v21, POWERPC_SVR_8548E_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8555_v10\", \"MPC8555 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8555_v10\", \"MPC8555 v1.0\",\n CPU_POWERPC_MPC8555_v10, POWERPC_SVR_8555_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8555_v11\", \"MPC8555 v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8555_v11\", \"MPC8555 v1.1\",\n CPU_POWERPC_MPC8555_v11, POWERPC_SVR_8555_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8555E_v10\", \"MPC8555E v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8555e_v10\", \"MPC8555E v1.0\",\n CPU_POWERPC_MPC8555E_v10, POWERPC_SVR_8555E_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8555E_v11\", \"MPC8555E v1.1\",\n+ POWERPC_DEF_SVR(\"mpc8555e_v11\", \"MPC8555E v1.1\",\n CPU_POWERPC_MPC8555E_v11, POWERPC_SVR_8555E_v11, e500v2)\n- POWERPC_DEF_SVR(\"MPC8560_v10\", \"MPC8560 v1.0\",\n+ POWERPC_DEF_SVR(\"mpc8560_v10\", \"MPC8560 v1.0\",\n CPU_POWERPC_MPC8560_v10, POWERPC_SVR_8560_v10, e500v2)\n- POWERPC_DEF_SVR(\"MPC8560_v20\", \"MPC8560 v2.0\",\n+ POWERPC_DEF_SVR(\"mpc8560_v20\", \"MPC8560 v2.0\",\n CPU_POWERPC_MPC8560_v20, POWERPC_SVR_8560_v20, e500v2)\n- POWERPC_DEF_SVR(\"MPC8560_v21\", \"MPC8560 v2.1\",\n+ POWERPC_DEF_SVR(\"mpc8560_v21\", \"MPC8560 v2.1\",\n CPU_POWERPC_MPC8560_v21, POWERPC_SVR_8560_v21, e500v2)\n- POWERPC_DEF_SVR(\"MPC8567\", \"MPC8567\",\n+ POWERPC_DEF_SVR(\"mpc8567\", \"MPC8567\",\n CPU_POWERPC_MPC8567, POWERPC_SVR_8567, e500v2)\n- POWERPC_DEF_SVR(\"MPC8567E\", \"MPC8567E\",\n+ POWERPC_DEF_SVR(\"mpc8567e\", \"MPC8567E\",\n CPU_POWERPC_MPC8567E, POWERPC_SVR_8567E, e500v2)\n- POWERPC_DEF_SVR(\"MPC8568\", \"MPC8568\",\n+ POWERPC_DEF_SVR(\"mpc8568\", \"MPC8568\",\n CPU_POWERPC_MPC8568, POWERPC_SVR_8568, e500v2)\n- POWERPC_DEF_SVR(\"MPC8568E\", \"MPC8568E\",\n+ POWERPC_DEF_SVR(\"mpc8568e\", \"MPC8568E\",\n CPU_POWERPC_MPC8568E, POWERPC_SVR_8568E, e500v2)\n- POWERPC_DEF_SVR(\"MPC8572\", \"MPC8572\",\n+ POWERPC_DEF_SVR(\"mpc8572\", \"MPC8572\",\n CPU_POWERPC_MPC8572, POWERPC_SVR_8572, e500v2)\n- POWERPC_DEF_SVR(\"MPC8572E\", \"MPC8572E\",\n+ POWERPC_DEF_SVR(\"mpc8572e\", \"MPC8572E\",\n CPU_POWERPC_MPC8572E, POWERPC_SVR_8572E, e500v2)\n /* e600 family */\n POWERPC_DEF(\"e600\", CPU_POWERPC_e600, e600,\n \"PowerPC e600 core\")\n /* PowerPC e600 microcontrollers */\n- POWERPC_DEF_SVR(\"MPC8610\", \"MPC8610\",\n+ POWERPC_DEF_SVR(\"mpc8610\", \"MPC8610\",\n CPU_POWERPC_MPC8610, POWERPC_SVR_8610, e600)\n- POWERPC_DEF_SVR(\"MPC8641\", \"MPC8641\",\n+ POWERPC_DEF_SVR(\"mpc8641\", \"MPC8641\",\n CPU_POWERPC_MPC8641, POWERPC_SVR_8641, e600)\n- POWERPC_DEF_SVR(\"MPC8641D\", \"MPC8641D\",\n+ POWERPC_DEF_SVR(\"mpc8641d\", \"MPC8641D\",\n CPU_POWERPC_MPC8641D, POWERPC_SVR_8641D, e600)\n /* 32 bits \"classic\" PowerPC */\n /* PowerPC 6xx family */\n@@ -1089,17 +1089,17 @@\n \"PowerPC 7457 v1.1 (G4)\")\n POWERPC_DEF(\"7457_v1.2\", CPU_POWERPC_74x7_v12, 7455,\n \"PowerPC 7457 v1.2 (G4)\")\n- POWERPC_DEF(\"7447A_v1.0\", CPU_POWERPC_74x7A_v10, 7445,\n+ POWERPC_DEF(\"7447a_v1.0\", CPU_POWERPC_74x7A_v10, 7445,\n \"PowerPC 7447A v1.0 (G4)\")\n- POWERPC_DEF(\"7457A_v1.0\", CPU_POWERPC_74x7A_v10, 7455,\n+ POWERPC_DEF(\"7457a_v1.0\", CPU_POWERPC_74x7A_v10, 7455,\n \"PowerPC 7457A v1.0 (G4)\")\n- POWERPC_DEF(\"7447A_v1.1\", CPU_POWERPC_74x7A_v11, 7445,\n+ POWERPC_DEF(\"7447a_v1.1\", CPU_POWERPC_74x7A_v11, 7445,\n \"PowerPC 7447A v1.1 (G4)\")\n- POWERPC_DEF(\"7457A_v1.1\", CPU_POWERPC_74x7A_v11, 7455,\n+ POWERPC_DEF(\"7457a_v1.1\", CPU_POWERPC_74x7A_v11, 7455,\n \"PowerPC 7457A v1.1 (G4)\")\n- POWERPC_DEF(\"7447A_v1.2\", CPU_POWERPC_74x7A_v12, 7445,\n+ POWERPC_DEF(\"7447a_v1.2\", CPU_POWERPC_74x7A_v12, 7445,\n \"PowerPC 7447A v1.2 (G4)\")\n- POWERPC_DEF(\"7457A_v1.2\", CPU_POWERPC_74x7A_v12, 7455,\n+ POWERPC_DEF(\"7457a_v1.2\", CPU_POWERPC_74x7A_v12, 7455,\n \"PowerPC 7457A v1.2 (G4)\")\n /* 64 bits PowerPC */\n #if defined (TARGET_PPC64)\n@@ -1114,37 +1114,37 @@\n \"PowerPC 631 (Power 3+)\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"POWER4\", CPU_POWERPC_POWER4, POWER4,\n+ POWERPC_DEF(\"power4\", CPU_POWERPC_POWER4, POWER4,\n \"POWER4\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"POWER4+\", CPU_POWERPC_POWER4P, POWER4P,\n+ POWERPC_DEF(\"power4+\", CPU_POWERPC_POWER4P, POWER4P,\n \"POWER4p\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"POWER5\", CPU_POWERPC_POWER5, POWER5,\n+ POWERPC_DEF(\"power5\", CPU_POWERPC_POWER5, POWER5,\n \"POWER5\")\n #endif\n- POWERPC_DEF(\"POWER5+_v2.1\", CPU_POWERPC_POWER5P_v21, POWER5P,\n+ POWERPC_DEF(\"power5+_v2.1\", CPU_POWERPC_POWER5P_v21, POWER5P,\n \"POWER5+ v2.1\")\n #if defined(TODO)\n- POWERPC_DEF(\"POWER6\", CPU_POWERPC_POWER6, POWER6,\n+ POWERPC_DEF(\"power6\", CPU_POWERPC_POWER6, POWER6,\n \"POWER6\")\n #endif\n- POWERPC_DEF(\"POWER7_v2.3\", CPU_POWERPC_POWER7_v23, POWER7,\n+ POWERPC_DEF(\"power7_v2.3\", CPU_POWERPC_POWER7_v23, POWER7,\n \"POWER7 v2.3\")\n- POWERPC_DEF(\"POWER7+_v2.1\", CPU_POWERPC_POWER7P_v21, POWER7,\n+ POWERPC_DEF(\"power7+_v2.1\", CPU_POWERPC_POWER7P_v21, POWER7,\n \"POWER7+ v2.1\")\n- POWERPC_DEF(\"POWER8E_v2.1\", CPU_POWERPC_POWER8E_v21, POWER8,\n+ POWERPC_DEF(\"power8e_v2.1\", CPU_POWERPC_POWER8E_v21, POWER8,\n \"POWER8E v2.1\")\n- POWERPC_DEF(\"POWER8_v2.0\", CPU_POWERPC_POWER8_v20, POWER8,\n+ POWERPC_DEF(\"power8_v2.0\", CPU_POWERPC_POWER8_v20, POWER8,\n \"POWER8 v2.0\")\n- POWERPC_DEF(\"POWER8NVL_v1.0\",CPU_POWERPC_POWER8NVL_v10, POWER8,\n+ POWERPC_DEF(\"power8nvl_v1.0\", CPU_POWERPC_POWER8NVL_v10, POWER8,\n \"POWER8NVL v1.0\")\n POWERPC_DEF(\"970_v2.2\", CPU_POWERPC_970_v22, 970,\n \"PowerPC 970 v2.2\")\n \n- POWERPC_DEF(\"POWER9_v1.0\", CPU_POWERPC_POWER9_BASE, POWER9,\n+ POWERPC_DEF(\"power9_v1.0\", CPU_POWERPC_POWER9_BASE, POWER9,\n \"POWER9 v1.0\")\n \n POWERPC_DEF(\"970fx_v1.0\", CPU_POWERPC_970FX_v10, 970,\n@@ -1162,27 +1162,27 @@\n POWERPC_DEF(\"970mp_v1.1\", CPU_POWERPC_970MP_v11, 970,\n \"PowerPC 970MP v1.1\")\n #if defined(TODO)\n- POWERPC_DEF(\"Cell\", CPU_POWERPC_CELL, 970,\n+ POWERPC_DEF(\"cell\", CPU_POWERPC_CELL, 970,\n \"PowerPC Cell\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"Cell_v1.0\", CPU_POWERPC_CELL_v10, 970,\n+ POWERPC_DEF(\"cell_v1.0\", CPU_POWERPC_CELL_v10, 970,\n \"PowerPC Cell v1.0\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"Cell_v2.0\", CPU_POWERPC_CELL_v20, 970,\n+ POWERPC_DEF(\"cell_v2.0\", CPU_POWERPC_CELL_v20, 970,\n \"PowerPC Cell v2.0\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"Cell_v3.0\", CPU_POWERPC_CELL_v30, 970,\n+ POWERPC_DEF(\"cell_v3.0\", CPU_POWERPC_CELL_v30, 970,\n \"PowerPC Cell v3.0\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"Cell_v3.1\", CPU_POWERPC_CELL_v31, 970,\n+ POWERPC_DEF(\"cell_v3.1\", CPU_POWERPC_CELL_v31, 970,\n \"PowerPC Cell v3.1\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"Cell_v3.2\", CPU_POWERPC_CELL_v32, 970,\n+ POWERPC_DEF(\"cell_v3.2\", CPU_POWERPC_CELL_v32, 970,\n \"PowerPC Cell v3.2\")\n #endif\n #if defined(TODO)\n@@ -1190,34 +1190,34 @@\n * and the PowerPC 64 one.\n */\n /* What about A10 & A30 ? */\n- POWERPC_DEF(\"RS64\", CPU_POWERPC_RS64, RS64,\n+ POWERPC_DEF(\"rs64\", CPU_POWERPC_RS64, RS64,\n \"RS64 (Apache/A35)\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"RS64-II\", CPU_POWERPC_RS64II, RS64,\n+ POWERPC_DEF(\"rs64-ii\", CPU_POWERPC_RS64II, RS64,\n \"RS64-II (NorthStar/A50)\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"RS64-III\", CPU_POWERPC_RS64III, RS64,\n+ POWERPC_DEF(\"rs64-iii\", CPU_POWERPC_RS64III, RS64,\n \"RS64-III (Pulsar)\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"RS64-IV\", CPU_POWERPC_RS64IV, RS64,\n+ POWERPC_DEF(\"rs64-iv\", CPU_POWERPC_RS64IV, RS64,\n \"RS64-IV (IceStar/IStar/SStar)\")\n #endif\n #endif /* defined (TARGET_PPC64) */\n /* POWER */\n #if defined(TODO)\n- POWERPC_DEF(\"POWER\", CPU_POWERPC_POWER, POWER,\n+ POWERPC_DEF(\"power\", CPU_POWERPC_POWER, POWER,\n \"Original POWER\")\n #endif\n #if defined(TODO)\n- POWERPC_DEF(\"POWER2\", CPU_POWERPC_POWER2, POWER,\n+ POWERPC_DEF(\"power2\", CPU_POWERPC_POWER2, POWER,\n \"POWER2\")\n #endif\n /* PA semi cores */\n #if defined(TODO)\n- POWERPC_DEF(\"PA6T\", CPU_POWERPC_PA6T, PA6T,\n+ POWERPC_DEF(\"pa6t\", CPU_POWERPC_PA6T, PA6T,\n \"PA PA6T\")\n #endif\n \n@@ -1226,172 +1226,172 @@\n /* PowerPC CPU aliases */\n \n PowerPCCPUAlias ppc_cpu_aliases[] = {\n- { \"403\", \"403GC\" },\n- { \"405\", \"405D4\" },\n- { \"405CR\", \"405CRc\" },\n- { \"405GP\", \"405GPd\" },\n- { \"405GPe\", \"405CRc\" },\n+ { \"403\", \"403gc\" },\n+ { \"405\", \"405d4\" },\n+ { \"405cr\", \"405crc\" },\n+ { \"405gp\", \"405gpd\" },\n+ { \"405gpe\", \"405crc\" },\n { \"x2vp7\", \"x2vp4\" },\n { \"x2vp50\", \"x2vp20\" },\n \n- { \"440EP\", \"440EPb\" },\n- { \"440GP\", \"440GPc\" },\n- { \"440GR\", \"440GRa\" },\n- { \"440GX\", \"440GXf\" },\n+ { \"440ep\", \"440epb\" },\n+ { \"440gp\", \"440gpc\" },\n+ { \"440gr\", \"440gra\" },\n+ { \"440gx\", \"440gxf\" },\n \n- { \"RCPU\", \"MPC5xx\" },\n+ { \"rcpu\", \"mpc5xx\" },\n /* MPC5xx microcontrollers */\n- { \"MGT560\", \"MPC5xx\" },\n- { \"MPC509\", \"MPC5xx\" },\n- { \"MPC533\", \"MPC5xx\" },\n- { \"MPC534\", \"MPC5xx\" },\n- { \"MPC555\", \"MPC5xx\" },\n- { \"MPC556\", \"MPC5xx\" },\n- { \"MPC560\", \"MPC5xx\" },\n- { \"MPC561\", \"MPC5xx\" },\n- { \"MPC562\", \"MPC5xx\" },\n- { \"MPC563\", \"MPC5xx\" },\n- { \"MPC564\", \"MPC5xx\" },\n- { \"MPC565\", \"MPC5xx\" },\n- { \"MPC566\", \"MPC5xx\" },\n+ { \"mgt560\", \"mpc5xx\" },\n+ { \"mpc509\", \"mpc5xx\" },\n+ { \"mpc533\", \"mpc5xx\" },\n+ { \"mpc534\", \"mpc5xx\" },\n+ { \"mpc555\", \"mpc5xx\" },\n+ { \"mpc556\", \"mpc5xx\" },\n+ { \"mpc560\", \"mpc5xx\" },\n+ { \"mpc561\", \"mpc5xx\" },\n+ { \"mpc562\", \"mpc5xx\" },\n+ { \"mpc563\", \"mpc5xx\" },\n+ { \"mpc564\", \"mpc5xx\" },\n+ { \"mpc565\", \"mpc5xx\" },\n+ { \"mpc566\", \"mpc5xx\" },\n \n- { \"PowerQUICC\", \"MPC8xx\" },\n+ { \"powerquicc\", \"mpc8xx\" },\n /* MPC8xx microcontrollers */\n- { \"MGT823\", \"MPC8xx\" },\n- { \"MPC821\", \"MPC8xx\" },\n- { \"MPC823\", \"MPC8xx\" },\n- { \"MPC850\", \"MPC8xx\" },\n- { \"MPC852T\", \"MPC8xx\" },\n- { \"MPC855T\", \"MPC8xx\" },\n- { \"MPC857\", \"MPC8xx\" },\n- { \"MPC859\", \"MPC8xx\" },\n- { \"MPC860\", \"MPC8xx\" },\n- { \"MPC862\", \"MPC8xx\" },\n- { \"MPC866\", \"MPC8xx\" },\n- { \"MPC870\", \"MPC8xx\" },\n- { \"MPC875\", \"MPC8xx\" },\n- { \"MPC880\", \"MPC8xx\" },\n- { \"MPC885\", \"MPC8xx\" },\n+ { \"mgt823\", \"mpc8xx\" },\n+ { \"mpc821\", \"mpc8xx\" },\n+ { \"mpc823\", \"mpc8xx\" },\n+ { \"mpc850\", \"mpc8xx\" },\n+ { \"mpc852t\", \"mpc8xx\" },\n+ { \"mpc855t\", \"mpc8xx\" },\n+ { \"mpc857\", \"mpc8xx\" },\n+ { \"mpc859\", \"mpc8xx\" },\n+ { \"mpc860\", \"mpc8xx\" },\n+ { \"mpc862\", \"mpc8xx\" },\n+ { \"mpc866\", \"mpc8xx\" },\n+ { \"mpc870\", \"mpc8xx\" },\n+ { \"mpc875\", \"mpc8xx\" },\n+ { \"mpc880\", \"mpc8xx\" },\n+ { \"mpc885\", \"mpc8xx\" },\n \n /* PowerPC MPC603 microcontrollers */\n- { \"MPC8240\", \"603\" },\n+ { \"mpc8240\", \"603\" },\n \n- { \"MPC52xx\", \"MPC5200\" },\n- { \"MPC5200\", \"MPC5200_v12\" },\n- { \"MPC5200B\", \"MPC5200B_v21\" },\n+ { \"mpc52xx\", \"mpc5200\" },\n+ { \"mpc5200\", \"mpc5200_v12\" },\n+ { \"mpc5200b\", \"mpc5200b_v21\" },\n \n- { \"MPC82xx\", \"MPC8280\" },\n- { \"PowerQUICC-II\", \"MPC82xx\" },\n- { \"MPC8241\", \"G2HiP4\" },\n- { \"MPC8245\", \"G2HiP4\" },\n- { \"MPC8247\", \"G2leGP3\" },\n- { \"MPC8248\", \"G2leGP3\" },\n- { \"MPC8250\", \"MPC8250_HiP4\" },\n- { \"MPC8250_HiP3\", \"G2HiP3\" },\n- { \"MPC8250_HiP4\", \"G2HiP4\" },\n- { \"MPC8255\", \"MPC8255_HiP4\" },\n- { \"MPC8255_HiP3\", \"G2HiP3\" },\n- { \"MPC8255_HiP4\", \"G2HiP4\" },\n- { \"MPC8260\", \"MPC8260_HiP4\" },\n- { \"MPC8260_HiP3\", \"G2HiP3\" },\n- { \"MPC8260_HiP4\", \"G2HiP4\" },\n- { \"MPC8264\", \"MPC8264_HiP4\" },\n- { \"MPC8264_HiP3\", \"G2HiP3\" },\n- { \"MPC8264_HiP4\", \"G2HiP4\" },\n- { \"MPC8265\", \"MPC8265_HiP4\" },\n- { \"MPC8265_HiP3\", \"G2HiP3\" },\n- { \"MPC8265_HiP4\", \"G2HiP4\" },\n- { \"MPC8266\", \"MPC8266_HiP4\" },\n- { \"MPC8266_HiP3\", \"G2HiP3\" },\n- { \"MPC8266_HiP4\", \"G2HiP4\" },\n- { \"MPC8270\", \"G2leGP3\" },\n- { \"MPC8271\", \"G2leGP3\" },\n- { \"MPC8272\", \"G2leGP3\" },\n- { \"MPC8275\", \"G2leGP3\" },\n- { \"MPC8280\", \"G2leGP3\" },\n+ { \"mpc82xx\", \"mpc8280\" },\n+ { \"powerquicc-ii\", \"mpc82xx\" },\n+ { \"mpc8241\", \"g2hip4\" },\n+ { \"mpc8245\", \"g2hip4\" },\n+ { \"mpc8247\", \"g2legp3\" },\n+ { \"mpc8248\", \"g2legp3\" },\n+ { \"mpc8250\", \"mpc8250_hip4\" },\n+ { \"mpc8250_hip3\", \"g2hip3\" },\n+ { \"mpc8250_hip4\", \"g2hip4\" },\n+ { \"mpc8255\", \"mpc8255_hip4\" },\n+ { \"mpc8255_hip3\", \"g2hip3\" },\n+ { \"mpc8255_hip4\", \"g2hip4\" },\n+ { \"mpc8260\", \"mpc8260_hip4\" },\n+ { \"mpc8260_hip3\", \"g2hip3\" },\n+ { \"mpc8260_hip4\", \"g2hip4\" },\n+ { \"mpc8264\", \"mpc8264_hip4\" },\n+ { \"mpc8264_hip3\", \"g2hip3\" },\n+ { \"mpc8264_hip4\", \"g2hip4\" },\n+ { \"mpc8265\", \"mpc8265_hip4\" },\n+ { \"mpc8265_hip3\", \"g2hip3\" },\n+ { \"mpc8265_hip4\", \"g2hip4\" },\n+ { \"mpc8266\", \"mpc8266_hip4\" },\n+ { \"mpc8266_hip3\", \"g2hip3\" },\n+ { \"mpc8266_hip4\", \"g2hip4\" },\n+ { \"mpc8270\", \"g2legp3\" },\n+ { \"mpc8271\", \"g2legp3\" },\n+ { \"mpc8272\", \"g2legp3\" },\n+ { \"mpc8275\", \"g2legp3\" },\n+ { \"mpc8280\", \"g2legp3\" },\n { \"e200\", \"e200z6\" },\n { \"e300\", \"e300c3\" },\n- { \"MPC8347\", \"MPC8347T\" },\n- { \"MPC8347A\", \"MPC8347AT\" },\n- { \"MPC8347E\", \"MPC8347ET\" },\n- { \"MPC8347EA\", \"MPC8347EAT\" },\n+ { \"mpc8347\", \"mpc8347t\" },\n+ { \"mpc8347a\", \"mpc8347at\" },\n+ { \"mpc8347e\", \"mpc8347et\" },\n+ { \"mpc8347ea\", \"mpc8347eat\" },\n { \"e500\", \"e500v2_v22\" },\n { \"e500v1\", \"e500_v20\" },\n { \"e500v2\", \"e500v2_v22\" },\n- { \"MPC8533\", \"MPC8533_v11\" },\n- { \"MPC8533E\", \"MPC8533E_v11\" },\n- { \"MPC8540\", \"MPC8540_v21\" },\n- { \"MPC8541\", \"MPC8541_v11\" },\n- { \"MPC8541E\", \"MPC8541E_v11\" },\n- { \"MPC8543\", \"MPC8543_v21\" },\n- { \"MPC8543E\", \"MPC8543E_v21\" },\n- { \"MPC8544\", \"MPC8544_v11\" },\n- { \"MPC8544E\", \"MPC8544E_v11\" },\n- { \"MPC8545\", \"MPC8545_v21\" },\n- { \"MPC8545E\", \"MPC8545E_v21\" },\n- { \"MPC8547E\", \"MPC8547E_v21\" },\n- { \"MPC8548\", \"MPC8548_v21\" },\n- { \"MPC8548E\", \"MPC8548E_v21\" },\n- { \"MPC8555\", \"MPC8555_v11\" },\n- { \"MPC8555E\", \"MPC8555E_v11\" },\n- { \"MPC8560\", \"MPC8560_v21\" },\n+ { \"mpc8533\", \"mpc8533_v11\" },\n+ { \"mpc8533e\", \"mpc8533e_v11\" },\n+ { \"mpc8540\", \"mpc8540_v21\" },\n+ { \"mpc8541\", \"mpc8541_v11\" },\n+ { \"mpc8541e\", \"mpc8541e_v11\" },\n+ { \"mpc8543\", \"mpc8543_v21\" },\n+ { \"mpc8543e\", \"mpc8543e_v21\" },\n+ { \"mpc8544\", \"mpc8544_v11\" },\n+ { \"mpc8544e\", \"mpc8544e_v11\" },\n+ { \"mpc8545\", \"mpc8545_v21\" },\n+ { \"mpc8545e\", \"mpc8545e_v21\" },\n+ { \"mpc8547e\", \"mpc8547e_v21\" },\n+ { \"mpc8548\", \"mpc8548_v21\" },\n+ { \"mpc8548e\", \"mpc8548e_v21\" },\n+ { \"mpc8555\", \"mpc8555_v11\" },\n+ { \"mpc8555e\", \"mpc8555e_v11\" },\n+ { \"mpc8560\", \"mpc8560_v21\" },\n { \"601\", \"601_v2\" },\n { \"601v\", \"601_v2\" },\n- { \"Vanilla\", \"603\" },\n+ { \"vanilla\", \"603\" },\n { \"603e\", \"603e_v4.1\" },\n- { \"Stretch\", \"603e\" },\n- { \"Vaillant\", \"603e7v\" },\n+ { \"stretch\", \"603e\" },\n+ { \"vaillant\", \"603e7v\" },\n { \"603r\", \"603e7t\" },\n- { \"Goldeneye\", \"603r\" },\n+ { \"goldeneye\", \"603r\" },\n { \"604e\", \"604e_v2.4\" },\n- { \"Sirocco\", \"604e\" },\n- { \"Mach5\", \"604r\" },\n+ { \"sirocco\", \"604e\" },\n+ { \"mach5\", \"604r\" },\n { \"740\", \"740_v3.1\" },\n- { \"Arthur\", \"740\" },\n+ { \"arthur\", \"740\" },\n { \"750\", \"750_v3.1\" },\n- { \"Typhoon\", \"750\" },\n- { \"G3\", \"750\" },\n- { \"Conan/Doyle\", \"750p\" },\n+ { \"typhoon\", \"750\" },\n+ { \"g3\", \"750\" },\n+ { \"conan/doyle\", \"750p\" },\n { \"750cl\", \"750cl_v2.0\" },\n { \"750cx\", \"750cx_v2.2\" },\n { \"750cxe\", \"750cxe_v3.1b\" },\n { \"750fx\", \"750fx_v2.3\" },\n { \"750gx\", \"750gx_v1.2\" },\n { \"750l\", \"750l_v3.2\" },\n- { \"LoneStar\", \"750l\" },\n+ { \"lonestar\", \"750l\" },\n { \"745\", \"745_v2.8\" },\n { \"755\", \"755_v2.8\" },\n- { \"Goldfinger\", \"755\" },\n+ { \"goldfinger\", \"755\" },\n { \"7400\", \"7400_v2.9\" },\n- { \"Max\", \"7400\" },\n- { \"G4\", \"7400\" },\n+ { \"max\", \"7400\" },\n+ { \"g4\", \"7400\" },\n { \"7410\", \"7410_v1.4\" },\n- { \"Nitro\", \"7410\" },\n+ { \"nitro\", \"7410\" },\n { \"7448\", \"7448_v2.1\" },\n { \"7450\", \"7450_v2.1\" },\n- { \"Vger\", \"7450\" },\n+ { \"vger\", \"7450\" },\n { \"7441\", \"7441_v2.3\" },\n { \"7451\", \"7451_v2.3\" },\n { \"7445\", \"7445_v3.2\" },\n { \"7455\", \"7455_v3.2\" },\n- { \"Apollo6\", \"7455\" },\n+ { \"apollo6\", \"7455\" },\n { \"7447\", \"7447_v1.1\" },\n { \"7457\", \"7457_v1.2\" },\n- { \"Apollo7\", \"7457\" },\n- { \"7447A\", \"7447A_v1.2\" },\n- { \"7457A\", \"7457A_v1.2\" },\n- { \"Apollo7PM\", \"7457A_v1.0\" },\n+ { \"apollo7\", \"7457\" },\n+ { \"7447a\", \"7447a_v1.2\" },\n+ { \"7457a\", \"7457a_v1.2\" },\n+ { \"apollo7pm\", \"7457a_v1.0\" },\n #if defined(TARGET_PPC64)\n- { \"POWER3\", \"630\" },\n- { \"POWER3+\", \"631\" },\n- { \"POWER5+\", \"POWER5+_v2.1\" },\n- { \"POWER5gs\", \"POWER5+_v2.1\" },\n- { \"POWER7\", \"POWER7_v2.3\" },\n- { \"POWER7+\", \"POWER7+_v2.1\" },\n- { \"POWER8E\", \"POWER8E_v2.1\" },\n- { \"POWER8\", \"POWER8_v2.0\" },\n- { \"POWER8NVL\", \"POWER8NVL_v1.0\" },\n- { \"POWER9\", \"POWER9_v1.0\" },\n+ { \"power3\", \"630\" },\n+ { \"power3+\", \"631\" },\n+ { \"power5+\", \"power5+_v2.1\" },\n+ { \"power5gs\", \"power5+_v2.1\" },\n+ { \"power7\", \"power7_v2.3\" },\n+ { \"power7+\", \"power7+_v2.1\" },\n+ { \"power8e\", \"power8e_v2.1\" },\n+ { \"power8\", \"power8_v2.0\" },\n+ { \"power8nvl\", \"power8nvl_v1.0\" },\n+ { \"power9\", \"power9_v1.0\" },\n { \"970\", \"970_v2.2\" },\n { \"970fx\", \"970fx_v3.1\" },\n { \"970mp\", \"970mp_v1.1\" },\ndiff --git a/target/ppc/kvm.c b/target/ppc/kvm.c\nindex 2aa5382..d185ef9 100644\n--- a/target/ppc/kvm.c\n+++ b/target/ppc/kvm.c\n@@ -2488,7 +2488,7 @@ static int kvm_ppc_register_host_cpu_type(void)\n */\n dc = DEVICE_CLASS(ppc_cpu_get_family_class(pvr_pcc));\n for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) {\n- if (strcmp(ppc_cpu_aliases[i].alias, dc->desc) == 0) {\n+ if (strcasecmp(ppc_cpu_aliases[i].alias, dc->desc) == 0) {\n char *suffix;\n \n ppc_cpu_aliases[i].model = g_strdup(object_class_get_name(oc));\ndiff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c\nindex f377cf2..0325226 100644\n--- a/target/ppc/translate_init.c\n+++ b/target/ppc/translate_init.c\n@@ -10250,7 +10250,7 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name)\n }\n \n for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) {\n- if (strcmp(ppc_cpu_aliases[i].alias, name) == 0) {\n+ if (strcasecmp(ppc_cpu_aliases[i].alias, name) == 0) {\n return ppc_cpu_class_by_alias(&ppc_cpu_aliases[i]);\n }\n }\n", "prefixes": [ "v2", "3/8" ] }