From patchwork Wed Aug 30 13:24:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807630 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5q366j2z9sN7 for ; Wed, 30 Aug 2017 23:25:35 +1000 (AEST) Received: from localhost ([::1]:50564 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2zt-0001rY-II for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:25:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2z5-0001oe-Hy for qemu-devel@nongnu.org; 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Wed, 30 Aug 2017 13:24:37 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:28 +0200 Message-Id: <1504099475-241036-2-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 30 Aug 2017 13:24:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/8] ppc: replace cpu_ppc_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Hervé Poussineau Reviewed-by: Eduardo Habkost --- target/ppc/cpu.h | 3 +-- hw/ppc/e500.c | 3 ++- hw/ppc/mac_newworld.c | 3 ++- hw/ppc/mac_oldworld.c | 3 ++- hw/ppc/ppc440_bamboo.c | 2 +- hw/ppc/ppc4xx_devs.c | 2 +- hw/ppc/prep.c | 5 +++-- hw/ppc/virtex_ml507.c | 2 +- target/ppc/translate_init.c | 5 ----- 9 files changed, 13 insertions(+), 15 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 46d3dd8..12f0949 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1276,7 +1276,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu; #endif /*****************************************************************************/ -PowerPCCPU *cpu_ppc_init(const char *cpu_model); void ppc_translate_init(void); const char *ppc_cpu_lookup_alias(const char *alias); /* you can call this signal handler from your SIGBUS and SIGSEGV @@ -1353,7 +1352,7 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); -#define cpu_init(cpu_model) CPU(cpu_ppc_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model) #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 62f1857..f0596f3 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -819,7 +819,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) CPUState *cs; qemu_irq *input; - cpu = cpu_ppc_init(machine->cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 3056d5f..d466634 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -187,7 +187,8 @@ static void ppc_core99_init(MachineState *machine) #endif } for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(machine->cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index f2ae60a..fcac399 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -116,7 +116,8 @@ static void ppc_heathrow_init(MachineState *machine) if (machine->cpu_model == NULL) machine->cpu_model = "G3"; for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(machine->cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index 9d997bf..ca26398 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -186,7 +186,7 @@ static void bamboo_init(MachineState *machine) if (machine->cpu_model == NULL) { machine->cpu_model = "440EP"; } - cpu = cpu_ppc_init(machine->cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index e7f413e..6b38ed7 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model, CPUPPCState *env; /* init CPUs */ - cpu = cpu_ppc_init(cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC %s CPU definition\n", cpu_model); diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 36d3dcd..00f3321 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -520,7 +520,8 @@ static void ppc_prep_init(MachineState *machine) if (machine->cpu_model == NULL) machine->cpu_model = "602"; for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(machine->cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); @@ -724,7 +725,7 @@ static void ibm_40p_init(MachineState *machine) if (!machine->cpu_model) { machine->cpu_model = "604"; } - cpu = cpu_ppc_init(machine->cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model)); if (!cpu) { error_report("could not initialize CPU '%s'", machine->cpu_model); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index fdbcf22..d5fdc16 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -96,7 +96,7 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size, CPUPPCState *env; qemu_irq *irqs; - cpu = cpu_ppc_init(cpu_model); + cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 8fb407e..43be9a8 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10271,11 +10271,6 @@ const char *ppc_cpu_lookup_alias(const char *alias) return NULL; } -PowerPCCPU *cpu_ppc_init(const char *cpu_model) -{ - return POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); -} - PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc) { ObjectClass *oc = OBJECT_CLASS(pcc); From patchwork Wed Aug 30 13:24:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807628 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5px3Nllz9sN7 for ; Wed, 30 Aug 2017 23:25:29 +1000 (AEST) Received: from localhost ([::1]:50562 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2zn-0001oy-5s for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:25:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50916) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2z5-0001of-I1 for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dn2z3-0003W0-KX for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36232) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dn2z3-0003VZ-Bc; Wed, 30 Aug 2017 09:24:41 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 503B961980; Wed, 30 Aug 2017 13:24:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 503B961980 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 502F19B518; Wed, 30 Aug 2017 13:24:39 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:29 +0200 Message-Id: <1504099475-241036-3-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 30 Aug 2017 13:24:40 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 2/8] ppc: use macros to make cpu type name from string literal X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Replace "-" TYPE_POWERPC_CPU when composing cpu type name from cpu model string literal and the same pattern in format strings with POWERPC_CPU_TYPE_SUFFIX and POWERPC_CPU_TYPE_NAME(model) macroses like we do in x86. Later POWERPC_CPU_TYPE_NAME() will be used to define default cpu type per machine type and as bonus it will be consistent and easy grep-able pattern across all other targets that I'm plannig to treat the same way. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson --- target/ppc/cpu.h | 3 +++ target/ppc/kvm_ppc.h | 2 +- target/ppc/cpu-models.c | 2 +- target/ppc/kvm.c | 2 +- target/ppc/translate_init.c | 6 +++--- 5 files changed, 9 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 12f0949..0512393 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1354,6 +1354,9 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); #define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model) +#define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU +#define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX + #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index 381afe6..f5d7397 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -9,7 +9,7 @@ #ifndef KVM_PPC_H #define KVM_PPC_H -#define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU +#define TYPE_HOST_POWERPC_CPU POWERPC_CPU_TYPE_NAME("host") #ifdef CONFIG_KVM diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 4d3e635..8b27962 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -51,7 +51,7 @@ \ static const TypeInfo \ glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_type_info) = { \ - .name = _name "-" TYPE_POWERPC_CPU, \ + .name = POWERPC_CPU_TYPE_NAME(_name), \ .parent = stringify(_type) "-family-" TYPE_POWERPC_CPU, \ .class_init = \ glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init), \ diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index f31c67e..2aa5382 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2492,7 +2492,7 @@ static int kvm_ppc_register_host_cpu_type(void) char *suffix; ppc_cpu_aliases[i].model = g_strdup(object_class_get_name(oc)); - suffix = strstr(ppc_cpu_aliases[i].model, "-"TYPE_POWERPC_CPU); + suffix = strstr(ppc_cpu_aliases[i].model, POWERPC_CPU_TYPE_SUFFIX); if (suffix) { *suffix = 0; } diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 43be9a8..f377cf2 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10185,7 +10185,7 @@ static gint ppc_cpu_compare_class_name(gconstpointer a, gconstpointer b) if (strncasecmp(name, object_class_get_name(oc), strlen(name)) == 0 && ppc_cpu_is_valid(pcc) && strcmp(object_class_get_name(oc) + strlen(name), - "-" TYPE_POWERPC_CPU) == 0) { + POWERPC_CPU_TYPE_SUFFIX) == 0) { return 0; } return -1; @@ -10327,7 +10327,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) } name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_POWERPC_CPU)); + strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); (*s->cpu_fprintf)(s->file, "PowerPC %-16s PVR %08x\n", name, pcc->pvr); for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { @@ -10388,7 +10388,7 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) typename = object_class_get_name(oc); info = g_malloc0(sizeof(*info)); info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_POWERPC_CPU)); + strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); entry = g_malloc0(sizeof(*entry)); entry->value = info; From patchwork Wed Aug 30 13:24:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807632 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5qY0DWcz9sN7 for ; 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Wed, 30 Aug 2017 13:24:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E2ACB7E449 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 976659B507; Wed, 30 Aug 2017 13:24:40 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:30 +0200 Message-Id: <1504099475-241036-4-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 30 Aug 2017 13:24:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 3/8] ppc: make cpu_model translation to type consistent X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" PPC handles -cpu FOO rather incosistently, i.e. it does case-insensitive matching of FOO to a CPU type (see: ppc_cpu_compare_class_name) but handles alias names as case-sensitive, as result: # qemu-system-ppc64 -M mac99 -cpu g3 qemu-system-ppc64: unable to find CPU model ' kN�U' # qemu-system-ppc64 -cpu 970MP_V1.1 qemu-system-ppc64: Unable to find sPAPR CPU Core definition while # qemu-system-ppc64 -M mac99 -cpu G3 # qemu-system-ppc64 -cpu 970MP_v1.1 start up just fine. Considering we can't take case-insensitive matching away, make it case-insensitive for all alias/type/core_type lookups. As side effect it allows to remove duplicate core types which are the same except of using different cased letters in name. Signed-off-by: Igor Mammedov --- v2: * make all typenames lower-cased instead on upper-cased (David) PS: consistent naming will be used by follow up patch to simplify cpu_model translation code and drop ~50LOC. --- hw/ppc/spapr_cpu_core.c | 24 +- target/ppc/cpu-models.c | 752 ++++++++++++++++++++++---------------------- target/ppc/kvm.c | 2 +- target/ppc/translate_init.c | 2 +- 4 files changed, 390 insertions(+), 390 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index ea278ce..1a47c6b 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -130,8 +130,10 @@ char *spapr_get_cpu_core_type(const char *model) { char *core_type; gchar **model_pieces = g_strsplit(model, ",", 2); + gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1); + g_strfreev(model_pieces); - core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE); + core_type = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, cpu_model); /* Check whether it exists or whether we have to look up an alias name */ if (!object_class_by_name(core_type)) { @@ -139,13 +141,13 @@ char *spapr_get_cpu_core_type(const char *model) g_free(core_type); core_type = NULL; - realmodel = ppc_cpu_lookup_alias(model_pieces[0]); + realmodel = ppc_cpu_lookup_alias(cpu_model); if (realmodel) { core_type = spapr_get_cpu_core_type(realmodel); } } + g_free(cpu_model); - g_strfreev(model_pieces); return core_type; } @@ -268,31 +270,29 @@ static const char *spapr_core_models[] = { "970_v2.2", /* 970MP variants */ - "970MP_v1.0", "970mp_v1.0", - "970MP_v1.1", "970mp_v1.1", /* POWER5+ */ - "POWER5+_v2.1", + "power5+_v2.1", /* POWER7 */ - "POWER7_v2.3", + "power7_v2.3", /* POWER7+ */ - "POWER7+_v2.1", + "power7+_v2.1", /* POWER8 */ - "POWER8_v2.0", + "power8_v2.0", /* POWER8E */ - "POWER8E_v2.1", + "power8e_v2.1", /* POWER8NVL */ - "POWER8NVL_v1.0", + "power8nvl_v1.0", /* POWER9 */ - "POWER9_v1.0", + "power9_v1.0", }; static Property spapr_cpu_core_properties[] = { diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 8b27962..6721c3e 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -75,206 +75,206 @@ POWERPC_DEF("401", CPU_POWERPC_401, 401, "Generic PowerPC 401") /* PowerPC 401 cores */ - POWERPC_DEF("401A1", CPU_POWERPC_401A1, 401, + POWERPC_DEF("401a1", CPU_POWERPC_401A1, 401, "PowerPC 401A1") - POWERPC_DEF("401B2", CPU_POWERPC_401B2, 401x2, + POWERPC_DEF("401b2", CPU_POWERPC_401B2, 401x2, "PowerPC 401B2") #if defined(TODO) - POWERPC_DEF("401B3", CPU_POWERPC_401B3, 401x3, + POWERPC_DEF("401b3", CPU_POWERPC_401B3, 401x3, "PowerPC 401B3") #endif - POWERPC_DEF("401C2", CPU_POWERPC_401C2, 401x2, + POWERPC_DEF("401c2", CPU_POWERPC_401C2, 401x2, "PowerPC 401C2") - POWERPC_DEF("401D2", CPU_POWERPC_401D2, 401x2, + POWERPC_DEF("401d2", CPU_POWERPC_401D2, 401x2, "PowerPC 401D2") - POWERPC_DEF("401E2", CPU_POWERPC_401E2, 401x2, + POWERPC_DEF("401e2", CPU_POWERPC_401E2, 401x2, "PowerPC 401E2") - POWERPC_DEF("401F2", CPU_POWERPC_401F2, 401x2, + POWERPC_DEF("401f2", CPU_POWERPC_401F2, 401x2, "PowerPC 401F2") /* XXX: to be checked */ - POWERPC_DEF("401G2", CPU_POWERPC_401G2, 401x2, + POWERPC_DEF("401g2", CPU_POWERPC_401G2, 401x2, "PowerPC 401G2") /* PowerPC 401 microcontrollers */ #if defined(TODO) - POWERPC_DEF("401GF", CPU_POWERPC_401GF, 401, + POWERPC_DEF("401gf", CPU_POWERPC_401GF, 401, "PowerPC 401GF") #endif - POWERPC_DEF("IOP480", CPU_POWERPC_IOP480, IOP480, + POWERPC_DEF("iop480", CPU_POWERPC_IOP480, IOP480, "IOP480 (401 microcontroller)") - POWERPC_DEF("Cobra", CPU_POWERPC_COBRA, 401, + POWERPC_DEF("cobra", CPU_POWERPC_COBRA, 401, "IBM Processor for Network Resources") #if defined(TODO) - POWERPC_DEF("Xipchip", CPU_POWERPC_XIPCHIP, 401, + POWERPC_DEF("xipchip", CPU_POWERPC_XIPCHIP, 401, NULL) #endif /* PowerPC 403 family */ /* PowerPC 403 microcontrollers */ - POWERPC_DEF("403GA", CPU_POWERPC_403GA, 403, + POWERPC_DEF("403ga", CPU_POWERPC_403GA, 403, "PowerPC 403 GA") - POWERPC_DEF("403GB", CPU_POWERPC_403GB, 403, + POWERPC_DEF("403gb", CPU_POWERPC_403GB, 403, "PowerPC 403 GB") - POWERPC_DEF("403GC", CPU_POWERPC_403GC, 403, + POWERPC_DEF("403gc", CPU_POWERPC_403GC, 403, "PowerPC 403 GC") - POWERPC_DEF("403GCX", CPU_POWERPC_403GCX, 403GCX, + POWERPC_DEF("403gcx", CPU_POWERPC_403GCX, 403GCX, "PowerPC 403 GCX") #if defined(TODO) - POWERPC_DEF("403GP", CPU_POWERPC_403GP, 403, + POWERPC_DEF("403gp", CPU_POWERPC_403GP, 403, "PowerPC 403 GP") #endif /* PowerPC 405 family */ /* PowerPC 405 cores */ #if defined(TODO) - POWERPC_DEF("405A3", CPU_POWERPC_405A3, 405, + POWERPC_DEF("405a3", CPU_POWERPC_405A3, 405, "PowerPC 405 A3") #endif #if defined(TODO) - POWERPC_DEF("405A4", CPU_POWERPC_405A4, 405, + POWERPC_DEF("405a4", CPU_POWERPC_405A4, 405, "PowerPC 405 A4") #endif #if defined(TODO) - POWERPC_DEF("405B3", CPU_POWERPC_405B3, 405, + POWERPC_DEF("405b3", CPU_POWERPC_405B3, 405, "PowerPC 405 B3") #endif #if defined(TODO) - POWERPC_DEF("405B4", CPU_POWERPC_405B4, 405, + POWERPC_DEF("405b4", CPU_POWERPC_405B4, 405, "PowerPC 405 B4") #endif #if defined(TODO) - POWERPC_DEF("405C3", CPU_POWERPC_405C3, 405, + POWERPC_DEF("405c3", CPU_POWERPC_405C3, 405, "PowerPC 405 C3") #endif #if defined(TODO) - POWERPC_DEF("405C4", CPU_POWERPC_405C4, 405, + POWERPC_DEF("405c4", CPU_POWERPC_405C4, 405, "PowerPC 405 C4") #endif - POWERPC_DEF("405D2", CPU_POWERPC_405D2, 405, + POWERPC_DEF("405d2", CPU_POWERPC_405D2, 405, "PowerPC 405 D2") #if defined(TODO) - POWERPC_DEF("405D3", CPU_POWERPC_405D3, 405, + POWERPC_DEF("405d3", CPU_POWERPC_405D3, 405, "PowerPC 405 D3") #endif - POWERPC_DEF("405D4", CPU_POWERPC_405D4, 405, + POWERPC_DEF("405d4", CPU_POWERPC_405D4, 405, "PowerPC 405 D4") #if defined(TODO) - POWERPC_DEF("405D5", CPU_POWERPC_405D5, 405, + POWERPC_DEF("405d5", CPU_POWERPC_405D5, 405, "PowerPC 405 D5") #endif #if defined(TODO) - POWERPC_DEF("405E4", CPU_POWERPC_405E4, 405, + POWERPC_DEF("405e4", CPU_POWERPC_405E4, 405, "PowerPC 405 E4") #endif #if defined(TODO) - POWERPC_DEF("405F4", CPU_POWERPC_405F4, 405, + POWERPC_DEF("405f4", CPU_POWERPC_405F4, 405, "PowerPC 405 F4") #endif #if defined(TODO) - POWERPC_DEF("405F5", CPU_POWERPC_405F5, 405, + POWERPC_DEF("405f5", CPU_POWERPC_405F5, 405, "PowerPC 405 F5") #endif #if defined(TODO) - POWERPC_DEF("405F6", CPU_POWERPC_405F6, 405, + POWERPC_DEF("405f6", CPU_POWERPC_405F6, 405, "PowerPC 405 F6") #endif /* PowerPC 405 microcontrollers */ - POWERPC_DEF("405CRa", CPU_POWERPC_405CRa, 405, + POWERPC_DEF("405cra", CPU_POWERPC_405CRa, 405, "PowerPC 405 CRa") - POWERPC_DEF("405CRb", CPU_POWERPC_405CRb, 405, + POWERPC_DEF("405crb", CPU_POWERPC_405CRb, 405, "PowerPC 405 CRb") - POWERPC_DEF("405CRc", CPU_POWERPC_405CRc, 405, + POWERPC_DEF("405crc", CPU_POWERPC_405CRc, 405, "PowerPC 405 CRc") - POWERPC_DEF("405EP", CPU_POWERPC_405EP, 405, + POWERPC_DEF("405ep", CPU_POWERPC_405EP, 405, "PowerPC 405 EP") #if defined(TODO) - POWERPC_DEF("405EXr", CPU_POWERPC_405EXr, 405, + POWERPC_DEF("405exr", CPU_POWERPC_405EXr, 405, "PowerPC 405 EXr") #endif - POWERPC_DEF("405EZ", CPU_POWERPC_405EZ, 405, + POWERPC_DEF("405ez", CPU_POWERPC_405EZ, 405, "PowerPC 405 EZ") #if defined(TODO) - POWERPC_DEF("405FX", CPU_POWERPC_405FX, 405, + POWERPC_DEF("405fx", CPU_POWERPC_405FX, 405, "PowerPC 405 FX") #endif - POWERPC_DEF("405GPa", CPU_POWERPC_405GPa, 405, + POWERPC_DEF("405gpa", CPU_POWERPC_405GPa, 405, "PowerPC 405 GPa") - POWERPC_DEF("405GPb", CPU_POWERPC_405GPb, 405, + POWERPC_DEF("405gpb", CPU_POWERPC_405GPb, 405, "PowerPC 405 GPb") - POWERPC_DEF("405GPc", CPU_POWERPC_405GPc, 405, + POWERPC_DEF("405gpc", CPU_POWERPC_405GPc, 405, "PowerPC 405 GPc") - POWERPC_DEF("405GPd", CPU_POWERPC_405GPd, 405, + POWERPC_DEF("405gpd", CPU_POWERPC_405GPd, 405, "PowerPC 405 GPd") - POWERPC_DEF("405GPR", CPU_POWERPC_405GPR, 405, + POWERPC_DEF("405gpr", CPU_POWERPC_405GPR, 405, "PowerPC 405 GPR") #if defined(TODO) - POWERPC_DEF("405H", CPU_POWERPC_405H, 405, + POWERPC_DEF("405h", CPU_POWERPC_405H, 405, "PowerPC 405 H") #endif #if defined(TODO) - POWERPC_DEF("405L", CPU_POWERPC_405L, 405, + POWERPC_DEF("405l", CPU_POWERPC_405L, 405, "PowerPC 405 L") #endif - POWERPC_DEF("405LP", CPU_POWERPC_405LP, 405, + POWERPC_DEF("405lp", CPU_POWERPC_405LP, 405, "PowerPC 405 LP") #if defined(TODO) - POWERPC_DEF("405PM", CPU_POWERPC_405PM, 405, + POWERPC_DEF("405pm", CPU_POWERPC_405PM, 405, "PowerPC 405 PM") #endif #if defined(TODO) - POWERPC_DEF("405PS", CPU_POWERPC_405PS, 405, + POWERPC_DEF("405ps", CPU_POWERPC_405PS, 405, "PowerPC 405 PS") #endif #if defined(TODO) - POWERPC_DEF("405S", CPU_POWERPC_405S, 405, + POWERPC_DEF("405s", CPU_POWERPC_405S, 405, "PowerPC 405 S") #endif - POWERPC_DEF("Npe405H", CPU_POWERPC_NPE405H, 405, + POWERPC_DEF("npe405h", CPU_POWERPC_NPE405H, 405, "Npe405 H") - POWERPC_DEF("Npe405H2", CPU_POWERPC_NPE405H2, 405, + POWERPC_DEF("npe405h2", CPU_POWERPC_NPE405H2, 405, "Npe405 H2") - POWERPC_DEF("Npe405L", CPU_POWERPC_NPE405L, 405, + POWERPC_DEF("npe405l", CPU_POWERPC_NPE405L, 405, "Npe405 L") - POWERPC_DEF("Npe4GS3", CPU_POWERPC_NPE4GS3, 405, + POWERPC_DEF("npe4gs3", CPU_POWERPC_NPE4GS3, 405, "Npe4GS3") #if defined(TODO) - POWERPC_DEF("Npcxx1", CPU_POWERPC_NPCxx1, 405, + POWERPC_DEF("npcxx1", CPU_POWERPC_NPCxx1, 405, NULL) #endif #if defined(TODO) - POWERPC_DEF("Npr161", CPU_POWERPC_NPR161, 405, + POWERPC_DEF("npr161", CPU_POWERPC_NPR161, 405, NULL) #endif #if defined(TODO) - POWERPC_DEF("LC77700", CPU_POWERPC_LC77700, 405, + POWERPC_DEF("lc77700", CPU_POWERPC_LC77700, 405, "PowerPC LC77700 (Sanyo)") #endif /* PowerPC 401/403/405 based set-top-box microcontrollers */ #if defined(TODO) - POWERPC_DEF("STB01000", CPU_POWERPC_STB01000, 401x2, + POWERPC_DEF("stb01000", CPU_POWERPC_STB01000, 401x2, "STB010000") #endif #if defined(TODO) - POWERPC_DEF("STB01010", CPU_POWERPC_STB01010, 401x2, + POWERPC_DEF("stb01010", CPU_POWERPC_STB01010, 401x2, "STB01010") #endif #if defined(TODO) - POWERPC_DEF("STB0210", CPU_POWERPC_STB0210, 401x3, + POWERPC_DEF("stb0210", CPU_POWERPC_STB0210, 401x3, "STB0210") #endif - POWERPC_DEF("STB03", CPU_POWERPC_STB03, 405, + POWERPC_DEF("stb03", CPU_POWERPC_STB03, 405, "STB03xx") #if defined(TODO) - POWERPC_DEF("STB043", CPU_POWERPC_STB043, 405, + POWERPC_DEF("stb043", CPU_POWERPC_STB043, 405, "STB043x") #endif #if defined(TODO) - POWERPC_DEF("STB045", CPU_POWERPC_STB045, 405, + POWERPC_DEF("stb045", CPU_POWERPC_STB045, 405, "STB045x") #endif - POWERPC_DEF("STB04", CPU_POWERPC_STB04, 405, + POWERPC_DEF("stb04", CPU_POWERPC_STB04, 405, "STB04xx") - POWERPC_DEF("STB25", CPU_POWERPC_STB25, 405, + POWERPC_DEF("stb25", CPU_POWERPC_STB25, 405, "STB25xx") #if defined(TODO) - POWERPC_DEF("STB130", CPU_POWERPC_STB130, 405, + POWERPC_DEF("stb130", CPU_POWERPC_STB130, 405, "STB130") #endif /* Xilinx PowerPC 405 cores */ @@ -305,95 +305,95 @@ #endif /* PowerPC 440 cores */ #if defined(TODO) - POWERPC_DEF("440A4", CPU_POWERPC_440A4, 440x4, + POWERPC_DEF("440a4", CPU_POWERPC_440A4, 440x4, "PowerPC 440 A4") #endif - POWERPC_DEF("440-Xilinx", CPU_POWERPC_440_XILINX, 440x5, + POWERPC_DEF("440-xilinx", CPU_POWERPC_440_XILINX, 440x5, "PowerPC 440 Xilinx 5") - POWERPC_DEF("440-Xilinx-w-dfpu", CPU_POWERPC_440_XILINX, 440x5wDFPU, + POWERPC_DEF("440-xilinx-w-dfpu", CPU_POWERPC_440_XILINX, 440x5wDFPU, "PowerPC 440 Xilinx 5 With a Double Prec. FPU") #if defined(TODO) - POWERPC_DEF("440A5", CPU_POWERPC_440A5, 440x5, + POWERPC_DEF("440a5", CPU_POWERPC_440A5, 440x5, "PowerPC 440 A5") #endif #if defined(TODO) - POWERPC_DEF("440B4", CPU_POWERPC_440B4, 440x4, + POWERPC_DEF("440b4", CPU_POWERPC_440B4, 440x4, "PowerPC 440 B4") #endif #if defined(TODO) - POWERPC_DEF("440G4", CPU_POWERPC_440G4, 440x4, + POWERPC_DEF("440g4", CPU_POWERPC_440G4, 440x4, "PowerPC 440 G4") #endif #if defined(TODO) - POWERPC_DEF("440F5", CPU_POWERPC_440F5, 440x5, + POWERPC_DEF("440f5", CPU_POWERPC_440F5, 440x5, "PowerPC 440 F5") #endif #if defined(TODO) - POWERPC_DEF("440G5", CPU_POWERPC_440G5, 440x5, + POWERPC_DEF("440g5", CPU_POWERPC_440G5, 440x5, "PowerPC 440 G5") #endif #if defined(TODO) - POWERPC_DEF("440H4", CPU_POWERPC_440H4, 440x4, + POWERPC_DEF("440h4", CPU_POWERPC_440H4, 440x4, "PowerPC 440H4") #endif #if defined(TODO) - POWERPC_DEF("440H6", CPU_POWERPC_440H6, 440Gx5, + POWERPC_DEF("440h6", CPU_POWERPC_440H6, 440Gx5, "PowerPC 440H6") #endif /* PowerPC 440 microcontrollers */ - POWERPC_DEF("440EPa", CPU_POWERPC_440EPa, 440EP, + POWERPC_DEF("440epa", CPU_POWERPC_440EPa, 440EP, "PowerPC 440 EPa") - POWERPC_DEF("440EPb", CPU_POWERPC_440EPb, 440EP, + POWERPC_DEF("440epb", CPU_POWERPC_440EPb, 440EP, "PowerPC 440 EPb") - POWERPC_DEF("440EPX", CPU_POWERPC_440EPX, 440EP, + POWERPC_DEF("440epx", CPU_POWERPC_440EPX, 440EP, "PowerPC 440 EPX") #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GPb", CPU_POWERPC_440GPb, 440GP, + POWERPC_DEF("440gpb", CPU_POWERPC_440GPb, 440GP, "PowerPC 440 GPb") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GPc", CPU_POWERPC_440GPc, 440GP, + POWERPC_DEF("440gpc", CPU_POWERPC_440GPc, 440GP, "PowerPC 440 GPc") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GRa", CPU_POWERPC_440GRa, 440x5, + POWERPC_DEF("440gra", CPU_POWERPC_440GRa, 440x5, "PowerPC 440 GRa") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GRX", CPU_POWERPC_440GRX, 440x5, + POWERPC_DEF("440grx", CPU_POWERPC_440GRX, 440x5, "PowerPC 440 GRX") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GXa", CPU_POWERPC_440GXa, 440EP, + POWERPC_DEF("440gxa", CPU_POWERPC_440GXa, 440EP, "PowerPC 440 GXa") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GXb", CPU_POWERPC_440GXb, 440EP, + POWERPC_DEF("440gxb", CPU_POWERPC_440GXb, 440EP, "PowerPC 440 GXb") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GXc", CPU_POWERPC_440GXc, 440EP, + POWERPC_DEF("440gxc", CPU_POWERPC_440GXc, 440EP, "PowerPC 440 GXc") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440GXf", CPU_POWERPC_440GXf, 440EP, + POWERPC_DEF("440gxf", CPU_POWERPC_440GXf, 440EP, "PowerPC 440 GXf") #endif #if defined(TODO) - POWERPC_DEF("440S", CPU_POWERPC_440S, 440, + POWERPC_DEF("440s", CPU_POWERPC_440S, 440, "PowerPC 440 S") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440SP", CPU_POWERPC_440SP, 440EP, + POWERPC_DEF("440sp", CPU_POWERPC_440SP, 440EP, "PowerPC 440 SP") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440SP2", CPU_POWERPC_440SP2, 440EP, + POWERPC_DEF("440sp2", CPU_POWERPC_440SP2, 440EP, "PowerPC 440 SP2") #endif #if defined(TODO_USER_ONLY) - POWERPC_DEF("440SPE", CPU_POWERPC_440SPE, 440EP, + POWERPC_DEF("440spe", CPU_POWERPC_440SPE, 440EP, "PowerPC 440 SPE") #endif /* PowerPC 460 family */ @@ -403,67 +403,67 @@ #endif /* PowerPC 464 microcontrollers */ #if defined(TODO) - POWERPC_DEF("464H90", CPU_POWERPC_464H90, 460, + POWERPC_DEF("464h90", CPU_POWERPC_464H90, 460, "PowerPC 464H90") #endif #if defined(TODO) - POWERPC_DEF("464H90F", CPU_POWERPC_464H90F, 460F, + POWERPC_DEF("464h90f", CPU_POWERPC_464H90F, 460F, "PowerPC 464H90F") #endif /* Freescale embedded PowerPC cores */ /* MPC5xx family (aka RCPU) */ #if defined(TODO_USER_ONLY) - POWERPC_DEF("MPC5xx", CPU_POWERPC_MPC5xx, MPC5xx, + POWERPC_DEF("mpc5xx", CPU_POWERPC_MPC5xx, MPC5xx, "Generic MPC5xx core") #endif /* MPC8xx family (aka PowerQUICC) */ #if defined(TODO_USER_ONLY) - POWERPC_DEF("MPC8xx", CPU_POWERPC_MPC8xx, MPC8xx, + POWERPC_DEF("mpc8xx", CPU_POWERPC_MPC8xx, MPC8xx, "Generic MPC8xx core") #endif /* MPC82xx family (aka PowerQUICC-II) */ - POWERPC_DEF("G2", CPU_POWERPC_G2, G2, + POWERPC_DEF("g2", CPU_POWERPC_G2, G2, "PowerPC G2 core") - POWERPC_DEF("G2H4", CPU_POWERPC_G2H4, G2, + POWERPC_DEF("g2h4", CPU_POWERPC_G2H4, G2, "PowerPC G2 H4 core") - POWERPC_DEF("G2GP", CPU_POWERPC_G2gp, G2, + POWERPC_DEF("g2gp", CPU_POWERPC_G2gp, G2, "PowerPC G2 GP core") - POWERPC_DEF("G2LS", CPU_POWERPC_G2ls, G2, + POWERPC_DEF("g2ls", CPU_POWERPC_G2ls, G2, "PowerPC G2 LS core") - POWERPC_DEF("G2HiP3", CPU_POWERPC_G2_HIP3, G2, + POWERPC_DEF("g2hip3", CPU_POWERPC_G2_HIP3, G2, "PowerPC G2 HiP3 core") - POWERPC_DEF("G2HiP4", CPU_POWERPC_G2_HIP4, G2, + POWERPC_DEF("g2hip4", CPU_POWERPC_G2_HIP4, G2, "PowerPC G2 HiP4 core") - POWERPC_DEF("MPC603", CPU_POWERPC_MPC603, 603E, + POWERPC_DEF("mpc603", CPU_POWERPC_MPC603, 603E, "PowerPC MPC603 core") - POWERPC_DEF("G2le", CPU_POWERPC_G2LE, G2LE, + POWERPC_DEF("g2le", CPU_POWERPC_G2LE, G2LE, "PowerPC G2le core (same as G2 plus little-endian mode support)") - POWERPC_DEF("G2leGP", CPU_POWERPC_G2LEgp, G2LE, + POWERPC_DEF("g2legp", CPU_POWERPC_G2LEgp, G2LE, "PowerPC G2LE GP core") - POWERPC_DEF("G2leLS", CPU_POWERPC_G2LEls, G2LE, + POWERPC_DEF("g2lels", CPU_POWERPC_G2LEls, G2LE, "PowerPC G2LE LS core") - POWERPC_DEF("G2leGP1", CPU_POWERPC_G2LEgp1, G2LE, + POWERPC_DEF("g2legp1", CPU_POWERPC_G2LEgp1, G2LE, "PowerPC G2LE GP1 core") - POWERPC_DEF("G2leGP3", CPU_POWERPC_G2LEgp3, G2LE, + POWERPC_DEF("g2legp3", CPU_POWERPC_G2LEgp3, G2LE, "PowerPC G2LE GP3 core") /* PowerPC G2 microcontrollers */ #if defined(TODO) - POWERPC_DEF_SVR("MPC5121", "MPC5121", + POWERPC_DEF_SVR("mpc5121", "MPC5121", CPU_POWERPC_MPC5121, POWERPC_SVR_5121, G2LE) #endif - POWERPC_DEF_SVR("MPC5200_v10", "MPC5200 v1.0", + POWERPC_DEF_SVR("mpc5200_v10", "MPC5200 v1.0", CPU_POWERPC_MPC5200_v10, POWERPC_SVR_5200_v10, G2LE) - POWERPC_DEF_SVR("MPC5200_v11", "MPC5200 v1.1", + POWERPC_DEF_SVR("mpc5200_v11", "MPC5200 v1.1", CPU_POWERPC_MPC5200_v11, POWERPC_SVR_5200_v11, G2LE) - POWERPC_DEF_SVR("MPC5200_v12", "MPC5200 v1.2", + POWERPC_DEF_SVR("mpc5200_v12", "MPC5200 v1.2", CPU_POWERPC_MPC5200_v12, POWERPC_SVR_5200_v12, G2LE) - POWERPC_DEF_SVR("MPC5200B_v20", "MPC5200B v2.0", + POWERPC_DEF_SVR("mpc5200b_v20", "MPC5200B v2.0", CPU_POWERPC_MPC5200B_v20, POWERPC_SVR_5200B_v20, G2LE) - POWERPC_DEF_SVR("MPC5200B_v21", "MPC5200B v2.1", + POWERPC_DEF_SVR("mpc5200b_v21", "MPC5200B v2.1", CPU_POWERPC_MPC5200B_v21, POWERPC_SVR_5200B_v21, G2LE) /* e200 family */ #if defined(TODO) - POWERPC_DEF_SVR("MPC55xx", "Generic MPC55xx core", + POWERPC_DEF_SVR("mpc55xx", "Generic MPC55xx core", CPU_POWERPC_MPC55xx, POWERPC_SVR_55xx, e200) #endif #if defined(TODO) @@ -484,91 +484,91 @@ "PowerPC e200z6 core") /* PowerPC e200 microcontrollers */ #if defined(TODO) - POWERPC_DEF_SVR("MPC5514E", "MPC5514E", + POWERPC_DEF_SVR("mpc5514e", "MPC5514E", CPU_POWERPC_MPC5514E, POWERPC_SVR_5514E, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5514E_v0", "MPC5514E v0", + POWERPC_DEF_SVR("mpc5514e_v0", "MPC5514E v0", CPU_POWERPC_MPC5514E_v0, POWERPC_SVR_5514E_v0, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5514E_v1", "MPC5514E v1", + POWERPC_DEF_SVR("mpc5514e_v1", "MPC5514E v1", CPU_POWERPC_MPC5514E_v1, POWERPC_SVR_5514E_v1, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5514G", "MPC5514G", + POWERPC_DEF_SVR("mpc5514g", "MPC5514G", CPU_POWERPC_MPC5514G, POWERPC_SVR_5514G, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5514G_v0", "MPC5514G v0", + POWERPC_DEF_SVR("mpc5514g_v0", "MPC5514G v0", CPU_POWERPC_MPC5514G_v0, POWERPC_SVR_5514G_v0, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5514G_v1", "MPC5514G v1", + POWERPC_DEF_SVR("mpc5514g_v1", "MPC5514G v1", CPU_POWERPC_MPC5514G_v1, POWERPC_SVR_5514G_v1, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5515S", "MPC5515S", + POWERPC_DEF_SVR("mpc5515s", "MPC5515S", CPU_POWERPC_MPC5515S, POWERPC_SVR_5515S, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516E", "MPC5516E", + POWERPC_DEF_SVR("mpc5516e", "MPC5516E", CPU_POWERPC_MPC5516E, POWERPC_SVR_5516E, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516E_v0", "MPC5516E v0", + POWERPC_DEF_SVR("mpc5516e_v0", "MPC5516E v0", CPU_POWERPC_MPC5516E_v0, POWERPC_SVR_5516E_v0, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516E_v1", "MPC5516E v1", + POWERPC_DEF_SVR("mpc5516e_v1", "MPC5516E v1", CPU_POWERPC_MPC5516E_v1, POWERPC_SVR_5516E_v1, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516G", "MPC5516G", + POWERPC_DEF_SVR("mpc5516g", "MPC5516G", CPU_POWERPC_MPC5516G, POWERPC_SVR_5516G, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516G_v0", "MPC5516G v0", + POWERPC_DEF_SVR("mpc5516g_v0", "MPC5516G v0", CPU_POWERPC_MPC5516G_v0, POWERPC_SVR_5516G_v0, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516G_v1", "MPC5516G v1", + POWERPC_DEF_SVR("mpc5516g_v1", "MPC5516G v1", CPU_POWERPC_MPC5516G_v1, POWERPC_SVR_5516G_v1, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5516S", "MPC5516S", + POWERPC_DEF_SVR("mpc5516s", "MPC5516S", CPU_POWERPC_MPC5516S, POWERPC_SVR_5516S, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5533", "MPC5533", + POWERPC_DEF_SVR("mpc5533", "MPC5533", CPU_POWERPC_MPC5533, POWERPC_SVR_5533, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5534", "MPC5534", + POWERPC_DEF_SVR("mpc5534", "MPC5534", CPU_POWERPC_MPC5534, POWERPC_SVR_5534, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5553", "MPC5553", + POWERPC_DEF_SVR("mpc5553", "MPC5553", CPU_POWERPC_MPC5553, POWERPC_SVR_5553, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5554", "MPC5554", + POWERPC_DEF_SVR("mpc5554", "MPC5554", CPU_POWERPC_MPC5554, POWERPC_SVR_5554, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5561", "MPC5561", + POWERPC_DEF_SVR("mpc5561", "MPC5561", CPU_POWERPC_MPC5561, POWERPC_SVR_5561, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5565", "MPC5565", + POWERPC_DEF_SVR("mpc5565", "MPC5565", CPU_POWERPC_MPC5565, POWERPC_SVR_5565, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5566", "MPC5566", + POWERPC_DEF_SVR("mpc5566", "MPC5566", CPU_POWERPC_MPC5566, POWERPC_SVR_5566, e200) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC5567", "MPC5567", + POWERPC_DEF_SVR("mpc5567", "MPC5567", CPU_POWERPC_MPC5567, POWERPC_SVR_5567, e200) #endif /* e300 family */ @@ -582,96 +582,96 @@ "PowerPC e300c4 core") /* PowerPC e300 microcontrollers */ #if defined(TODO) - POWERPC_DEF_SVR("MPC8313", "MPC8313", + POWERPC_DEF_SVR("mpc8313", "MPC8313", CPU_POWERPC_MPC831x, POWERPC_SVR_8313, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8313E", "MPC8313E", + POWERPC_DEF_SVR("mpc8313e", "MPC8313E", CPU_POWERPC_MPC831x, POWERPC_SVR_8313E, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8314", "MPC8314", + POWERPC_DEF_SVR("mpc8314", "MPC8314", CPU_POWERPC_MPC831x, POWERPC_SVR_8314, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8314E", "MPC8314E", + POWERPC_DEF_SVR("mpc8314e", "MPC8314E", CPU_POWERPC_MPC831x, POWERPC_SVR_8314E, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8315", "MPC8315", + POWERPC_DEF_SVR("mpc8315", "MPC8315", CPU_POWERPC_MPC831x, POWERPC_SVR_8315, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8315E", "MPC8315E", + POWERPC_DEF_SVR("mpc8315e", "MPC8315E", CPU_POWERPC_MPC831x, POWERPC_SVR_8315E, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8321", "MPC8321", + POWERPC_DEF_SVR("mpc8321", "MPC8321", CPU_POWERPC_MPC832x, POWERPC_SVR_8321, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8321E", "MPC8321E", + POWERPC_DEF_SVR("mpc8321e", "MPC8321E", CPU_POWERPC_MPC832x, POWERPC_SVR_8321E, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8323", "MPC8323", + POWERPC_DEF_SVR("mpc8323", "MPC8323", CPU_POWERPC_MPC832x, POWERPC_SVR_8323, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8323E", "MPC8323E", + POWERPC_DEF_SVR("mpc8323e", "MPC8323E", CPU_POWERPC_MPC832x, POWERPC_SVR_8323E, e300) #endif - POWERPC_DEF_SVR("MPC8343", "MPC8343", + POWERPC_DEF_SVR("mpc8343", "MPC8343", CPU_POWERPC_MPC834x, POWERPC_SVR_8343, e300) - POWERPC_DEF_SVR("MPC8343A", "MPC8343A", + POWERPC_DEF_SVR("mpc8343a", "MPC8343A", CPU_POWERPC_MPC834x, POWERPC_SVR_8343A, e300) - POWERPC_DEF_SVR("MPC8343E", "MPC8343E", + POWERPC_DEF_SVR("mpc8343e", "MPC8343E", CPU_POWERPC_MPC834x, POWERPC_SVR_8343E, e300) - POWERPC_DEF_SVR("MPC8343EA", "MPC8343EA", + POWERPC_DEF_SVR("mpc8343ea", "MPC8343EA", CPU_POWERPC_MPC834x, POWERPC_SVR_8343EA, e300) - POWERPC_DEF_SVR("MPC8347T", "MPC8347T", + POWERPC_DEF_SVR("mpc8347t", "MPC8347T", CPU_POWERPC_MPC834x, POWERPC_SVR_8347T, e300) - POWERPC_DEF_SVR("MPC8347P", "MPC8347P", + POWERPC_DEF_SVR("mpc8347p", "MPC8347P", CPU_POWERPC_MPC834x, POWERPC_SVR_8347P, e300) - POWERPC_DEF_SVR("MPC8347AT", "MPC8347AT", + POWERPC_DEF_SVR("mpc8347at", "MPC8347AT", CPU_POWERPC_MPC834x, POWERPC_SVR_8347AT, e300) - POWERPC_DEF_SVR("MPC8347AP", "MPC8347AP", + POWERPC_DEF_SVR("mpc8347ap", "MPC8347AP", CPU_POWERPC_MPC834x, POWERPC_SVR_8347AP, e300) - POWERPC_DEF_SVR("MPC8347ET", "MPC8347ET", + POWERPC_DEF_SVR("mpc8347et", "MPC8347ET", CPU_POWERPC_MPC834x, POWERPC_SVR_8347ET, e300) - POWERPC_DEF_SVR("MPC8347EP", "MPC8343EP", + POWERPC_DEF_SVR("mpc8347ep", "MPC8343EP", CPU_POWERPC_MPC834x, POWERPC_SVR_8347EP, e300) - POWERPC_DEF_SVR("MPC8347EAT", "MPC8347EAT", + POWERPC_DEF_SVR("mpc8347eat", "MPC8347EAT", CPU_POWERPC_MPC834x, POWERPC_SVR_8347EAT, e300) - POWERPC_DEF_SVR("MPC8347EAP", "MPC8343EAP", + POWERPC_DEF_SVR("mpc8347eap", "MPC8343EAP", CPU_POWERPC_MPC834x, POWERPC_SVR_8347EAP, e300) - POWERPC_DEF_SVR("MPC8349", "MPC8349", + POWERPC_DEF_SVR("mpc8349", "MPC8349", CPU_POWERPC_MPC834x, POWERPC_SVR_8349, e300) - POWERPC_DEF_SVR("MPC8349A", "MPC8349A", + POWERPC_DEF_SVR("mpc8349a", "MPC8349A", CPU_POWERPC_MPC834x, POWERPC_SVR_8349A, e300) - POWERPC_DEF_SVR("MPC8349E", "MPC8349E", + POWERPC_DEF_SVR("mpc8349e", "MPC8349E", CPU_POWERPC_MPC834x, POWERPC_SVR_8349E, e300) - POWERPC_DEF_SVR("MPC8349EA", "MPC8349EA", + POWERPC_DEF_SVR("mpc8349ea", "MPC8349EA", CPU_POWERPC_MPC834x, POWERPC_SVR_8349EA, e300) #if defined(TODO) - POWERPC_DEF_SVR("MPC8358E", "MPC8358E", + POWERPC_DEF_SVR("mpc8358e", "MPC8358E", CPU_POWERPC_MPC835x, POWERPC_SVR_8358E, e300) #endif #if defined(TODO) - POWERPC_DEF_SVR("MPC8360E", "MPC8360E", + POWERPC_DEF_SVR("mpc8360e", "MPC8360E", CPU_POWERPC_MPC836x, POWERPC_SVR_8360E, e300) #endif - POWERPC_DEF_SVR("MPC8377", "MPC8377", + POWERPC_DEF_SVR("mpc8377", "MPC8377", CPU_POWERPC_MPC837x, POWERPC_SVR_8377, e300) - POWERPC_DEF_SVR("MPC8377E", "MPC8377E", + POWERPC_DEF_SVR("mpc8377e", "MPC8377E", CPU_POWERPC_MPC837x, POWERPC_SVR_8377E, e300) - POWERPC_DEF_SVR("MPC8378", "MPC8378", + POWERPC_DEF_SVR("mpc8378", "MPC8378", CPU_POWERPC_MPC837x, POWERPC_SVR_8378, e300) - POWERPC_DEF_SVR("MPC8378E", "MPC8378E", + POWERPC_DEF_SVR("mpc8378e", "MPC8378E", CPU_POWERPC_MPC837x, POWERPC_SVR_8378E, e300) - POWERPC_DEF_SVR("MPC8379", "MPC8379", + POWERPC_DEF_SVR("mpc8379", "MPC8379", CPU_POWERPC_MPC837x, POWERPC_SVR_8379, e300) - POWERPC_DEF_SVR("MPC8379E", "MPC8379E", + POWERPC_DEF_SVR("mpc8379e", "MPC8379E", CPU_POWERPC_MPC837x, POWERPC_SVR_8379E, e300) /* e500 family */ POWERPC_DEF_SVR("e500_v10", "PowerPC e500 v1.0 core", @@ -695,115 +695,115 @@ CPU_POWERPC_e5500, POWERPC_SVR_E500, e5500) #endif /* PowerPC e500 microcontrollers */ - POWERPC_DEF_SVR("MPC8533_v10", "MPC8533 v1.0", + POWERPC_DEF_SVR("mpc8533_v10", "MPC8533 v1.0", CPU_POWERPC_MPC8533_v10, POWERPC_SVR_8533_v10, e500v2) - POWERPC_DEF_SVR("MPC8533_v11", "MPC8533 v1.1", + POWERPC_DEF_SVR("mpc8533_v11", "MPC8533 v1.1", CPU_POWERPC_MPC8533_v11, POWERPC_SVR_8533_v11, e500v2) - POWERPC_DEF_SVR("MPC8533E_v10", "MPC8533E v1.0", + POWERPC_DEF_SVR("mpc8533e_v10", "MPC8533E v1.0", CPU_POWERPC_MPC8533E_v10, POWERPC_SVR_8533E_v10, e500v2) - POWERPC_DEF_SVR("MPC8533E_v11", "MPC8533E v1.1", + POWERPC_DEF_SVR("mpc8533e_v11", "MPC8533E v1.1", CPU_POWERPC_MPC8533E_v11, POWERPC_SVR_8533E_v11, e500v2) - POWERPC_DEF_SVR("MPC8540_v10", "MPC8540 v1.0", + POWERPC_DEF_SVR("mpc8540_v10", "MPC8540 v1.0", CPU_POWERPC_MPC8540_v10, POWERPC_SVR_8540_v10, e500v1) - POWERPC_DEF_SVR("MPC8540_v20", "MPC8540 v2.0", + POWERPC_DEF_SVR("mpc8540_v20", "MPC8540 v2.0", CPU_POWERPC_MPC8540_v20, POWERPC_SVR_8540_v20, e500v1) - POWERPC_DEF_SVR("MPC8540_v21", "MPC8540 v2.1", + POWERPC_DEF_SVR("mpc8540_v21", "MPC8540 v2.1", CPU_POWERPC_MPC8540_v21, POWERPC_SVR_8540_v21, e500v1) - POWERPC_DEF_SVR("MPC8541_v10", "MPC8541 v1.0", + POWERPC_DEF_SVR("mpc8541_v10", "MPC8541 v1.0", CPU_POWERPC_MPC8541_v10, POWERPC_SVR_8541_v10, e500v1) - POWERPC_DEF_SVR("MPC8541_v11", "MPC8541 v1.1", + POWERPC_DEF_SVR("mpc8541_v11", "MPC8541 v1.1", CPU_POWERPC_MPC8541_v11, POWERPC_SVR_8541_v11, e500v1) - POWERPC_DEF_SVR("MPC8541E_v10", "MPC8541E v1.0", + POWERPC_DEF_SVR("mpc8541e_v10", "MPC8541E v1.0", CPU_POWERPC_MPC8541E_v10, POWERPC_SVR_8541E_v10, e500v1) - POWERPC_DEF_SVR("MPC8541E_v11", "MPC8541E v1.1", + POWERPC_DEF_SVR("mpc8541e_v11", "MPC8541E v1.1", CPU_POWERPC_MPC8541E_v11, POWERPC_SVR_8541E_v11, e500v1) - POWERPC_DEF_SVR("MPC8543_v10", "MPC8543 v1.0", + POWERPC_DEF_SVR("mpc8543_v10", "MPC8543 v1.0", CPU_POWERPC_MPC8543_v10, POWERPC_SVR_8543_v10, e500v2) - POWERPC_DEF_SVR("MPC8543_v11", "MPC8543 v1.1", + POWERPC_DEF_SVR("mpc8543_v11", "MPC8543 v1.1", CPU_POWERPC_MPC8543_v11, POWERPC_SVR_8543_v11, e500v2) - POWERPC_DEF_SVR("MPC8543_v20", "MPC8543 v2.0", + POWERPC_DEF_SVR("mpc8543_v20", "MPC8543 v2.0", CPU_POWERPC_MPC8543_v20, POWERPC_SVR_8543_v20, e500v2) - POWERPC_DEF_SVR("MPC8543_v21", "MPC8543 v2.1", + POWERPC_DEF_SVR("mpc8543_v21", "MPC8543 v2.1", CPU_POWERPC_MPC8543_v21, POWERPC_SVR_8543_v21, e500v2) - POWERPC_DEF_SVR("MPC8543E_v10", "MPC8543E v1.0", + POWERPC_DEF_SVR("mpc8543e_v10", "MPC8543E v1.0", CPU_POWERPC_MPC8543E_v10, POWERPC_SVR_8543E_v10, e500v2) - POWERPC_DEF_SVR("MPC8543E_v11", "MPC8543E v1.1", + POWERPC_DEF_SVR("mpc8543e_v11", "MPC8543E v1.1", CPU_POWERPC_MPC8543E_v11, POWERPC_SVR_8543E_v11, e500v2) - POWERPC_DEF_SVR("MPC8543E_v20", "MPC8543E v2.0", + POWERPC_DEF_SVR("mpc8543e_v20", "MPC8543E v2.0", CPU_POWERPC_MPC8543E_v20, POWERPC_SVR_8543E_v20, e500v2) - POWERPC_DEF_SVR("MPC8543E_v21", "MPC8543E v2.1", + POWERPC_DEF_SVR("mpc8543e_v21", "MPC8543E v2.1", CPU_POWERPC_MPC8543E_v21, POWERPC_SVR_8543E_v21, e500v2) - POWERPC_DEF_SVR("MPC8544_v10", "MPC8544 v1.0", + POWERPC_DEF_SVR("mpc8544_v10", "MPC8544 v1.0", CPU_POWERPC_MPC8544_v10, POWERPC_SVR_8544_v10, e500v2) - POWERPC_DEF_SVR("MPC8544_v11", "MPC8544 v1.1", + POWERPC_DEF_SVR("mpc8544_v11", "MPC8544 v1.1", CPU_POWERPC_MPC8544_v11, POWERPC_SVR_8544_v11, e500v2) - POWERPC_DEF_SVR("MPC8544E_v10", "MPC8544E v1.0", + POWERPC_DEF_SVR("mpc8544e_v10", "MPC8544E v1.0", CPU_POWERPC_MPC8544E_v10, POWERPC_SVR_8544E_v10, e500v2) - POWERPC_DEF_SVR("MPC8544E_v11", "MPC8544E v1.1", + POWERPC_DEF_SVR("mpc8544e_v11", "MPC8544E v1.1", CPU_POWERPC_MPC8544E_v11, POWERPC_SVR_8544E_v11, e500v2) - POWERPC_DEF_SVR("MPC8545_v20", "MPC8545 v2.0", + POWERPC_DEF_SVR("mpc8545_v20", "MPC8545 v2.0", CPU_POWERPC_MPC8545_v20, POWERPC_SVR_8545_v20, e500v2) - POWERPC_DEF_SVR("MPC8545_v21", "MPC8545 v2.1", + POWERPC_DEF_SVR("mpc8545_v21", "MPC8545 v2.1", CPU_POWERPC_MPC8545_v21, POWERPC_SVR_8545_v21, e500v2) - POWERPC_DEF_SVR("MPC8545E_v20", "MPC8545E v2.0", + POWERPC_DEF_SVR("mpc8545e_v20", "MPC8545E v2.0", CPU_POWERPC_MPC8545E_v20, POWERPC_SVR_8545E_v20, e500v2) - POWERPC_DEF_SVR("MPC8545E_v21", "MPC8545E v2.1", + POWERPC_DEF_SVR("mpc8545e_v21", "MPC8545E v2.1", CPU_POWERPC_MPC8545E_v21, POWERPC_SVR_8545E_v21, e500v2) - POWERPC_DEF_SVR("MPC8547E_v20", "MPC8547E v2.0", + POWERPC_DEF_SVR("mpc8547e_v20", "MPC8547E v2.0", CPU_POWERPC_MPC8547E_v20, POWERPC_SVR_8547E_v20, e500v2) - POWERPC_DEF_SVR("MPC8547E_v21", "MPC8547E v2.1", + POWERPC_DEF_SVR("mpc8547e_v21", "MPC8547E v2.1", CPU_POWERPC_MPC8547E_v21, POWERPC_SVR_8547E_v21, e500v2) - POWERPC_DEF_SVR("MPC8548_v10", "MPC8548 v1.0", + POWERPC_DEF_SVR("mpc8548_v10", "MPC8548 v1.0", CPU_POWERPC_MPC8548_v10, POWERPC_SVR_8548_v10, e500v2) - POWERPC_DEF_SVR("MPC8548_v11", "MPC8548 v1.1", + POWERPC_DEF_SVR("mpc8548_v11", "MPC8548 v1.1", CPU_POWERPC_MPC8548_v11, POWERPC_SVR_8548_v11, e500v2) - POWERPC_DEF_SVR("MPC8548_v20", "MPC8548 v2.0", + POWERPC_DEF_SVR("mpc8548_v20", "MPC8548 v2.0", CPU_POWERPC_MPC8548_v20, POWERPC_SVR_8548_v20, e500v2) - POWERPC_DEF_SVR("MPC8548_v21", "MPC8548 v2.1", + POWERPC_DEF_SVR("mpc8548_v21", "MPC8548 v2.1", CPU_POWERPC_MPC8548_v21, POWERPC_SVR_8548_v21, e500v2) - POWERPC_DEF_SVR("MPC8548E_v10", "MPC8548E v1.0", + POWERPC_DEF_SVR("mpc8548e_v10", "MPC8548E v1.0", CPU_POWERPC_MPC8548E_v10, POWERPC_SVR_8548E_v10, e500v2) - POWERPC_DEF_SVR("MPC8548E_v11", "MPC8548E v1.1", + POWERPC_DEF_SVR("mpc8548e_v11", "MPC8548E v1.1", CPU_POWERPC_MPC8548E_v11, POWERPC_SVR_8548E_v11, e500v2) - POWERPC_DEF_SVR("MPC8548E_v20", "MPC8548E v2.0", + POWERPC_DEF_SVR("mpc8548e_v20", "MPC8548E v2.0", CPU_POWERPC_MPC8548E_v20, POWERPC_SVR_8548E_v20, e500v2) - POWERPC_DEF_SVR("MPC8548E_v21", "MPC8548E v2.1", + POWERPC_DEF_SVR("mpc8548e_v21", "MPC8548E v2.1", CPU_POWERPC_MPC8548E_v21, POWERPC_SVR_8548E_v21, e500v2) - POWERPC_DEF_SVR("MPC8555_v10", "MPC8555 v1.0", + POWERPC_DEF_SVR("mpc8555_v10", "MPC8555 v1.0", CPU_POWERPC_MPC8555_v10, POWERPC_SVR_8555_v10, e500v2) - POWERPC_DEF_SVR("MPC8555_v11", "MPC8555 v1.1", + POWERPC_DEF_SVR("mpc8555_v11", "MPC8555 v1.1", CPU_POWERPC_MPC8555_v11, POWERPC_SVR_8555_v11, e500v2) - POWERPC_DEF_SVR("MPC8555E_v10", "MPC8555E v1.0", + POWERPC_DEF_SVR("mpc8555e_v10", "MPC8555E v1.0", CPU_POWERPC_MPC8555E_v10, POWERPC_SVR_8555E_v10, e500v2) - POWERPC_DEF_SVR("MPC8555E_v11", "MPC8555E v1.1", + POWERPC_DEF_SVR("mpc8555e_v11", "MPC8555E v1.1", CPU_POWERPC_MPC8555E_v11, POWERPC_SVR_8555E_v11, e500v2) - POWERPC_DEF_SVR("MPC8560_v10", "MPC8560 v1.0", + POWERPC_DEF_SVR("mpc8560_v10", "MPC8560 v1.0", CPU_POWERPC_MPC8560_v10, POWERPC_SVR_8560_v10, e500v2) - POWERPC_DEF_SVR("MPC8560_v20", "MPC8560 v2.0", + POWERPC_DEF_SVR("mpc8560_v20", "MPC8560 v2.0", CPU_POWERPC_MPC8560_v20, POWERPC_SVR_8560_v20, e500v2) - POWERPC_DEF_SVR("MPC8560_v21", "MPC8560 v2.1", + POWERPC_DEF_SVR("mpc8560_v21", "MPC8560 v2.1", CPU_POWERPC_MPC8560_v21, POWERPC_SVR_8560_v21, e500v2) - POWERPC_DEF_SVR("MPC8567", "MPC8567", + POWERPC_DEF_SVR("mpc8567", "MPC8567", CPU_POWERPC_MPC8567, POWERPC_SVR_8567, e500v2) - POWERPC_DEF_SVR("MPC8567E", "MPC8567E", + POWERPC_DEF_SVR("mpc8567e", "MPC8567E", CPU_POWERPC_MPC8567E, POWERPC_SVR_8567E, e500v2) - POWERPC_DEF_SVR("MPC8568", "MPC8568", + POWERPC_DEF_SVR("mpc8568", "MPC8568", CPU_POWERPC_MPC8568, POWERPC_SVR_8568, e500v2) - POWERPC_DEF_SVR("MPC8568E", "MPC8568E", + POWERPC_DEF_SVR("mpc8568e", "MPC8568E", CPU_POWERPC_MPC8568E, POWERPC_SVR_8568E, e500v2) - POWERPC_DEF_SVR("MPC8572", "MPC8572", + POWERPC_DEF_SVR("mpc8572", "MPC8572", CPU_POWERPC_MPC8572, POWERPC_SVR_8572, e500v2) - POWERPC_DEF_SVR("MPC8572E", "MPC8572E", + POWERPC_DEF_SVR("mpc8572e", "MPC8572E", CPU_POWERPC_MPC8572E, POWERPC_SVR_8572E, e500v2) /* e600 family */ POWERPC_DEF("e600", CPU_POWERPC_e600, e600, "PowerPC e600 core") /* PowerPC e600 microcontrollers */ - POWERPC_DEF_SVR("MPC8610", "MPC8610", + POWERPC_DEF_SVR("mpc8610", "MPC8610", CPU_POWERPC_MPC8610, POWERPC_SVR_8610, e600) - POWERPC_DEF_SVR("MPC8641", "MPC8641", + POWERPC_DEF_SVR("mpc8641", "MPC8641", CPU_POWERPC_MPC8641, POWERPC_SVR_8641, e600) - POWERPC_DEF_SVR("MPC8641D", "MPC8641D", + POWERPC_DEF_SVR("mpc8641d", "MPC8641D", CPU_POWERPC_MPC8641D, POWERPC_SVR_8641D, e600) /* 32 bits "classic" PowerPC */ /* PowerPC 6xx family */ @@ -1089,17 +1089,17 @@ "PowerPC 7457 v1.1 (G4)") POWERPC_DEF("7457_v1.2", CPU_POWERPC_74x7_v12, 7455, "PowerPC 7457 v1.2 (G4)") - POWERPC_DEF("7447A_v1.0", CPU_POWERPC_74x7A_v10, 7445, + POWERPC_DEF("7447a_v1.0", CPU_POWERPC_74x7A_v10, 7445, "PowerPC 7447A v1.0 (G4)") - POWERPC_DEF("7457A_v1.0", CPU_POWERPC_74x7A_v10, 7455, + POWERPC_DEF("7457a_v1.0", CPU_POWERPC_74x7A_v10, 7455, "PowerPC 7457A v1.0 (G4)") - POWERPC_DEF("7447A_v1.1", CPU_POWERPC_74x7A_v11, 7445, + POWERPC_DEF("7447a_v1.1", CPU_POWERPC_74x7A_v11, 7445, "PowerPC 7447A v1.1 (G4)") - POWERPC_DEF("7457A_v1.1", CPU_POWERPC_74x7A_v11, 7455, + POWERPC_DEF("7457a_v1.1", CPU_POWERPC_74x7A_v11, 7455, "PowerPC 7457A v1.1 (G4)") - POWERPC_DEF("7447A_v1.2", CPU_POWERPC_74x7A_v12, 7445, + POWERPC_DEF("7447a_v1.2", CPU_POWERPC_74x7A_v12, 7445, "PowerPC 7447A v1.2 (G4)") - POWERPC_DEF("7457A_v1.2", CPU_POWERPC_74x7A_v12, 7455, + POWERPC_DEF("7457a_v1.2", CPU_POWERPC_74x7A_v12, 7455, "PowerPC 7457A v1.2 (G4)") /* 64 bits PowerPC */ #if defined (TARGET_PPC64) @@ -1114,37 +1114,37 @@ "PowerPC 631 (Power 3+)") #endif #if defined(TODO) - POWERPC_DEF("POWER4", CPU_POWERPC_POWER4, POWER4, + POWERPC_DEF("power4", CPU_POWERPC_POWER4, POWER4, "POWER4") #endif #if defined(TODO) - POWERPC_DEF("POWER4+", CPU_POWERPC_POWER4P, POWER4P, + POWERPC_DEF("power4+", CPU_POWERPC_POWER4P, POWER4P, "POWER4p") #endif #if defined(TODO) - POWERPC_DEF("POWER5", CPU_POWERPC_POWER5, POWER5, + POWERPC_DEF("power5", CPU_POWERPC_POWER5, POWER5, "POWER5") #endif - POWERPC_DEF("POWER5+_v2.1", CPU_POWERPC_POWER5P_v21, POWER5P, + POWERPC_DEF("power5+_v2.1", CPU_POWERPC_POWER5P_v21, POWER5P, "POWER5+ v2.1") #if defined(TODO) - POWERPC_DEF("POWER6", CPU_POWERPC_POWER6, POWER6, + POWERPC_DEF("power6", CPU_POWERPC_POWER6, POWER6, "POWER6") #endif - POWERPC_DEF("POWER7_v2.3", CPU_POWERPC_POWER7_v23, POWER7, + POWERPC_DEF("power7_v2.3", CPU_POWERPC_POWER7_v23, POWER7, "POWER7 v2.3") - POWERPC_DEF("POWER7+_v2.1", CPU_POWERPC_POWER7P_v21, POWER7, + POWERPC_DEF("power7+_v2.1", CPU_POWERPC_POWER7P_v21, POWER7, "POWER7+ v2.1") - POWERPC_DEF("POWER8E_v2.1", CPU_POWERPC_POWER8E_v21, POWER8, + POWERPC_DEF("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER8, "POWER8E v2.1") - POWERPC_DEF("POWER8_v2.0", CPU_POWERPC_POWER8_v20, POWER8, + POWERPC_DEF("power8_v2.0", CPU_POWERPC_POWER8_v20, POWER8, "POWER8 v2.0") - POWERPC_DEF("POWER8NVL_v1.0",CPU_POWERPC_POWER8NVL_v10, POWER8, + POWERPC_DEF("power8nvl_v1.0", CPU_POWERPC_POWER8NVL_v10, POWER8, "POWER8NVL v1.0") POWERPC_DEF("970_v2.2", CPU_POWERPC_970_v22, 970, "PowerPC 970 v2.2") - POWERPC_DEF("POWER9_v1.0", CPU_POWERPC_POWER9_BASE, POWER9, + POWERPC_DEF("power9_v1.0", CPU_POWERPC_POWER9_BASE, POWER9, "POWER9 v1.0") POWERPC_DEF("970fx_v1.0", CPU_POWERPC_970FX_v10, 970, @@ -1162,27 +1162,27 @@ POWERPC_DEF("970mp_v1.1", CPU_POWERPC_970MP_v11, 970, "PowerPC 970MP v1.1") #if defined(TODO) - POWERPC_DEF("Cell", CPU_POWERPC_CELL, 970, + POWERPC_DEF("cell", CPU_POWERPC_CELL, 970, "PowerPC Cell") #endif #if defined(TODO) - POWERPC_DEF("Cell_v1.0", CPU_POWERPC_CELL_v10, 970, + POWERPC_DEF("cell_v1.0", CPU_POWERPC_CELL_v10, 970, "PowerPC Cell v1.0") #endif #if defined(TODO) - POWERPC_DEF("Cell_v2.0", CPU_POWERPC_CELL_v20, 970, + POWERPC_DEF("cell_v2.0", CPU_POWERPC_CELL_v20, 970, "PowerPC Cell v2.0") #endif #if defined(TODO) - POWERPC_DEF("Cell_v3.0", CPU_POWERPC_CELL_v30, 970, + POWERPC_DEF("cell_v3.0", CPU_POWERPC_CELL_v30, 970, "PowerPC Cell v3.0") #endif #if defined(TODO) - POWERPC_DEF("Cell_v3.1", CPU_POWERPC_CELL_v31, 970, + POWERPC_DEF("cell_v3.1", CPU_POWERPC_CELL_v31, 970, "PowerPC Cell v3.1") #endif #if defined(TODO) - POWERPC_DEF("Cell_v3.2", CPU_POWERPC_CELL_v32, 970, + POWERPC_DEF("cell_v3.2", CPU_POWERPC_CELL_v32, 970, "PowerPC Cell v3.2") #endif #if defined(TODO) @@ -1190,34 +1190,34 @@ * and the PowerPC 64 one. */ /* What about A10 & A30 ? */ - POWERPC_DEF("RS64", CPU_POWERPC_RS64, RS64, + POWERPC_DEF("rs64", CPU_POWERPC_RS64, RS64, "RS64 (Apache/A35)") #endif #if defined(TODO) - POWERPC_DEF("RS64-II", CPU_POWERPC_RS64II, RS64, + POWERPC_DEF("rs64-ii", CPU_POWERPC_RS64II, RS64, "RS64-II (NorthStar/A50)") #endif #if defined(TODO) - POWERPC_DEF("RS64-III", CPU_POWERPC_RS64III, RS64, + POWERPC_DEF("rs64-iii", CPU_POWERPC_RS64III, RS64, "RS64-III (Pulsar)") #endif #if defined(TODO) - POWERPC_DEF("RS64-IV", CPU_POWERPC_RS64IV, RS64, + POWERPC_DEF("rs64-iv", CPU_POWERPC_RS64IV, RS64, "RS64-IV (IceStar/IStar/SStar)") #endif #endif /* defined (TARGET_PPC64) */ /* POWER */ #if defined(TODO) - POWERPC_DEF("POWER", CPU_POWERPC_POWER, POWER, + POWERPC_DEF("power", CPU_POWERPC_POWER, POWER, "Original POWER") #endif #if defined(TODO) - POWERPC_DEF("POWER2", CPU_POWERPC_POWER2, POWER, + POWERPC_DEF("power2", CPU_POWERPC_POWER2, POWER, "POWER2") #endif /* PA semi cores */ #if defined(TODO) - POWERPC_DEF("PA6T", CPU_POWERPC_PA6T, PA6T, + POWERPC_DEF("pa6t", CPU_POWERPC_PA6T, PA6T, "PA PA6T") #endif @@ -1226,172 +1226,172 @@ /* PowerPC CPU aliases */ PowerPCCPUAlias ppc_cpu_aliases[] = { - { "403", "403GC" }, - { "405", "405D4" }, - { "405CR", "405CRc" }, - { "405GP", "405GPd" }, - { "405GPe", "405CRc" }, + { "403", "403gc" }, + { "405", "405d4" }, + { "405cr", "405crc" }, + { "405gp", "405gpd" }, + { "405gpe", "405crc" }, { "x2vp7", "x2vp4" }, { "x2vp50", "x2vp20" }, - { "440EP", "440EPb" }, - { "440GP", "440GPc" }, - { "440GR", "440GRa" }, - { "440GX", "440GXf" }, + { "440ep", "440epb" }, + { "440gp", "440gpc" }, + { "440gr", "440gra" }, + { "440gx", "440gxf" }, - { "RCPU", "MPC5xx" }, + { "rcpu", "mpc5xx" }, /* MPC5xx microcontrollers */ - { "MGT560", "MPC5xx" }, - { "MPC509", "MPC5xx" }, - { "MPC533", "MPC5xx" }, - { "MPC534", "MPC5xx" }, - { "MPC555", "MPC5xx" }, - { "MPC556", "MPC5xx" }, - { "MPC560", "MPC5xx" }, - { "MPC561", "MPC5xx" }, - { "MPC562", "MPC5xx" }, - { "MPC563", "MPC5xx" }, - { "MPC564", "MPC5xx" }, - { "MPC565", "MPC5xx" }, - { "MPC566", "MPC5xx" }, + { "mgt560", "mpc5xx" }, + { "mpc509", "mpc5xx" }, + { "mpc533", "mpc5xx" }, + { "mpc534", "mpc5xx" }, + { "mpc555", "mpc5xx" }, + { "mpc556", "mpc5xx" }, + { "mpc560", "mpc5xx" }, + { "mpc561", "mpc5xx" }, + { "mpc562", "mpc5xx" }, + { "mpc563", "mpc5xx" }, + { "mpc564", "mpc5xx" }, + { "mpc565", "mpc5xx" }, + { "mpc566", "mpc5xx" }, - { "PowerQUICC", "MPC8xx" }, + { "powerquicc", "mpc8xx" }, /* MPC8xx microcontrollers */ - { "MGT823", "MPC8xx" }, - { "MPC821", "MPC8xx" }, - { "MPC823", "MPC8xx" }, - { "MPC850", "MPC8xx" }, - { "MPC852T", "MPC8xx" }, - { "MPC855T", "MPC8xx" }, - { "MPC857", "MPC8xx" }, - { "MPC859", "MPC8xx" }, - { "MPC860", "MPC8xx" }, - { "MPC862", "MPC8xx" }, - { "MPC866", "MPC8xx" }, - { "MPC870", "MPC8xx" }, - { "MPC875", "MPC8xx" }, - { "MPC880", "MPC8xx" }, - { "MPC885", "MPC8xx" }, + { "mgt823", "mpc8xx" }, + { "mpc821", "mpc8xx" }, + { "mpc823", "mpc8xx" }, + { "mpc850", "mpc8xx" }, + { "mpc852t", "mpc8xx" }, + { "mpc855t", "mpc8xx" }, + { "mpc857", "mpc8xx" }, + { "mpc859", "mpc8xx" }, + { "mpc860", "mpc8xx" }, + { "mpc862", "mpc8xx" }, + { "mpc866", "mpc8xx" }, + { "mpc870", "mpc8xx" }, + { "mpc875", "mpc8xx" }, + { "mpc880", "mpc8xx" }, + { "mpc885", "mpc8xx" }, /* PowerPC MPC603 microcontrollers */ - { "MPC8240", "603" }, + { "mpc8240", "603" }, - { "MPC52xx", "MPC5200" }, - { "MPC5200", "MPC5200_v12" }, - { "MPC5200B", "MPC5200B_v21" }, + { "mpc52xx", "mpc5200" }, + { "mpc5200", "mpc5200_v12" }, + { "mpc5200b", "mpc5200b_v21" }, - { "MPC82xx", "MPC8280" }, - { "PowerQUICC-II", "MPC82xx" }, - { "MPC8241", "G2HiP4" }, - { "MPC8245", "G2HiP4" }, - { "MPC8247", "G2leGP3" }, - { "MPC8248", "G2leGP3" }, - { "MPC8250", "MPC8250_HiP4" }, - { "MPC8250_HiP3", "G2HiP3" }, - { "MPC8250_HiP4", "G2HiP4" }, - { "MPC8255", "MPC8255_HiP4" }, - { "MPC8255_HiP3", "G2HiP3" }, - { "MPC8255_HiP4", "G2HiP4" }, - { "MPC8260", "MPC8260_HiP4" }, - { "MPC8260_HiP3", "G2HiP3" }, - { "MPC8260_HiP4", "G2HiP4" }, - { "MPC8264", "MPC8264_HiP4" }, - { "MPC8264_HiP3", "G2HiP3" }, - { "MPC8264_HiP4", "G2HiP4" }, - { "MPC8265", "MPC8265_HiP4" }, - { "MPC8265_HiP3", "G2HiP3" }, - { "MPC8265_HiP4", "G2HiP4" }, - { "MPC8266", "MPC8266_HiP4" }, - { "MPC8266_HiP3", "G2HiP3" }, - { "MPC8266_HiP4", "G2HiP4" }, - { "MPC8270", "G2leGP3" }, - { "MPC8271", "G2leGP3" }, - { "MPC8272", "G2leGP3" }, - { "MPC8275", "G2leGP3" }, - { "MPC8280", "G2leGP3" }, + { "mpc82xx", "mpc8280" }, + { "powerquicc-ii", "mpc82xx" }, + { "mpc8241", "g2hip4" }, + { "mpc8245", "g2hip4" }, + { "mpc8247", "g2legp3" }, + { "mpc8248", "g2legp3" }, + { "mpc8250", "mpc8250_hip4" }, + { "mpc8250_hip3", "g2hip3" }, + { "mpc8250_hip4", "g2hip4" }, + { "mpc8255", "mpc8255_hip4" }, + { "mpc8255_hip3", "g2hip3" }, + { "mpc8255_hip4", "g2hip4" }, + { "mpc8260", "mpc8260_hip4" }, + { "mpc8260_hip3", "g2hip3" }, + { "mpc8260_hip4", "g2hip4" }, + { "mpc8264", "mpc8264_hip4" }, + { "mpc8264_hip3", "g2hip3" }, + { "mpc8264_hip4", "g2hip4" }, + { "mpc8265", "mpc8265_hip4" }, + { "mpc8265_hip3", "g2hip3" }, + { "mpc8265_hip4", "g2hip4" }, + { "mpc8266", "mpc8266_hip4" }, + { "mpc8266_hip3", "g2hip3" }, + { "mpc8266_hip4", "g2hip4" }, + { "mpc8270", "g2legp3" }, + { "mpc8271", "g2legp3" }, + { "mpc8272", "g2legp3" }, + { "mpc8275", "g2legp3" }, + { "mpc8280", "g2legp3" }, { "e200", "e200z6" }, { "e300", "e300c3" }, - { "MPC8347", "MPC8347T" }, - { "MPC8347A", "MPC8347AT" }, - { "MPC8347E", "MPC8347ET" }, - { "MPC8347EA", "MPC8347EAT" }, + { "mpc8347", "mpc8347t" }, + { "mpc8347a", "mpc8347at" }, + { "mpc8347e", "mpc8347et" }, + { "mpc8347ea", "mpc8347eat" }, { "e500", "e500v2_v22" }, { "e500v1", "e500_v20" }, { "e500v2", "e500v2_v22" }, - { "MPC8533", "MPC8533_v11" }, - { "MPC8533E", "MPC8533E_v11" }, - { "MPC8540", "MPC8540_v21" }, - { "MPC8541", "MPC8541_v11" }, - { "MPC8541E", "MPC8541E_v11" }, - { "MPC8543", "MPC8543_v21" }, - { "MPC8543E", "MPC8543E_v21" }, - { "MPC8544", "MPC8544_v11" }, - { "MPC8544E", "MPC8544E_v11" }, - { "MPC8545", "MPC8545_v21" }, - { "MPC8545E", "MPC8545E_v21" }, - { "MPC8547E", "MPC8547E_v21" }, - { "MPC8548", "MPC8548_v21" }, - { "MPC8548E", "MPC8548E_v21" }, - { "MPC8555", "MPC8555_v11" }, - { "MPC8555E", "MPC8555E_v11" }, - { "MPC8560", "MPC8560_v21" }, + { "mpc8533", "mpc8533_v11" }, + { "mpc8533e", "mpc8533e_v11" }, + { "mpc8540", "mpc8540_v21" }, + { "mpc8541", "mpc8541_v11" }, + { "mpc8541e", "mpc8541e_v11" }, + { "mpc8543", "mpc8543_v21" }, + { "mpc8543e", "mpc8543e_v21" }, + { "mpc8544", "mpc8544_v11" }, + { "mpc8544e", "mpc8544e_v11" }, + { "mpc8545", "mpc8545_v21" }, + { "mpc8545e", "mpc8545e_v21" }, + { "mpc8547e", "mpc8547e_v21" }, + { "mpc8548", "mpc8548_v21" }, + { "mpc8548e", "mpc8548e_v21" }, + { "mpc8555", "mpc8555_v11" }, + { "mpc8555e", "mpc8555e_v11" }, + { "mpc8560", "mpc8560_v21" }, { "601", "601_v2" }, { "601v", "601_v2" }, - { "Vanilla", "603" }, + { "vanilla", "603" }, { "603e", "603e_v4.1" }, - { "Stretch", "603e" }, - { "Vaillant", "603e7v" }, + { "stretch", "603e" }, + { "vaillant", "603e7v" }, { "603r", "603e7t" }, - { "Goldeneye", "603r" }, + { "goldeneye", "603r" }, { "604e", "604e_v2.4" }, - { "Sirocco", "604e" }, - { "Mach5", "604r" }, + { "sirocco", "604e" }, + { "mach5", "604r" }, { "740", "740_v3.1" }, - { "Arthur", "740" }, + { "arthur", "740" }, { "750", "750_v3.1" }, - { "Typhoon", "750" }, - { "G3", "750" }, - { "Conan/Doyle", "750p" }, + { "typhoon", "750" }, + { "g3", "750" }, + { "conan/doyle", "750p" }, { "750cl", "750cl_v2.0" }, { "750cx", "750cx_v2.2" }, { "750cxe", "750cxe_v3.1b" }, { "750fx", "750fx_v2.3" }, { "750gx", "750gx_v1.2" }, { "750l", "750l_v3.2" }, - { "LoneStar", "750l" }, + { "lonestar", "750l" }, { "745", "745_v2.8" }, { "755", "755_v2.8" }, - { "Goldfinger", "755" }, + { "goldfinger", "755" }, { "7400", "7400_v2.9" }, - { "Max", "7400" }, - { "G4", "7400" }, + { "max", "7400" }, + { "g4", "7400" }, { "7410", "7410_v1.4" }, - { "Nitro", "7410" }, + { "nitro", "7410" }, { "7448", "7448_v2.1" }, { "7450", "7450_v2.1" }, - { "Vger", "7450" }, + { "vger", "7450" }, { "7441", "7441_v2.3" }, { "7451", "7451_v2.3" }, { "7445", "7445_v3.2" }, { "7455", "7455_v3.2" }, - { "Apollo6", "7455" }, + { "apollo6", "7455" }, { "7447", "7447_v1.1" }, { "7457", "7457_v1.2" }, - { "Apollo7", "7457" }, - { "7447A", "7447A_v1.2" }, - { "7457A", "7457A_v1.2" }, - { "Apollo7PM", "7457A_v1.0" }, + { "apollo7", "7457" }, + { "7447a", "7447a_v1.2" }, + { "7457a", "7457a_v1.2" }, + { "apollo7pm", "7457a_v1.0" }, #if defined(TARGET_PPC64) - { "POWER3", "630" }, - { "POWER3+", "631" }, - { "POWER5+", "POWER5+_v2.1" }, - { "POWER5gs", "POWER5+_v2.1" }, - { "POWER7", "POWER7_v2.3" }, - { "POWER7+", "POWER7+_v2.1" }, - { "POWER8E", "POWER8E_v2.1" }, - { "POWER8", "POWER8_v2.0" }, - { "POWER8NVL", "POWER8NVL_v1.0" }, - { "POWER9", "POWER9_v1.0" }, + { "power3", "630" }, + { "power3+", "631" }, + { "power5+", "power5+_v2.1" }, + { "power5gs", "power5+_v2.1" }, + { "power7", "power7_v2.3" }, + { "power7+", "power7+_v2.1" }, + { "power8e", "power8e_v2.1" }, + { "power8", "power8_v2.0" }, + { "power8nvl", "power8nvl_v1.0" }, + { "power9", "power9_v1.0" }, { "970", "970_v2.2" }, { "970fx", "970fx_v3.1" }, { "970mp", "970mp_v1.1" }, diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 2aa5382..d185ef9 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2488,7 +2488,7 @@ static int kvm_ppc_register_host_cpu_type(void) */ dc = DEVICE_CLASS(ppc_cpu_get_family_class(pvr_pcc)); for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { - if (strcmp(ppc_cpu_aliases[i].alias, dc->desc) == 0) { + if (strcasecmp(ppc_cpu_aliases[i].alias, dc->desc) == 0) { char *suffix; ppc_cpu_aliases[i].model = g_strdup(object_class_get_name(oc)); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index f377cf2..0325226 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10250,7 +10250,7 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name) } for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { - if (strcmp(ppc_cpu_aliases[i].alias, name) == 0) { + if (strcasecmp(ppc_cpu_aliases[i].alias, name) == 0) { return ppc_cpu_class_by_alias(&ppc_cpu_aliases[i]); } } From patchwork Wed Aug 30 13:24:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807633 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5sx30QMz9sN7 for ; Wed, 30 Aug 2017 23:28:05 +1000 (AEST) Received: from localhost ([::1]:50576 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn32J-00044I-59 for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:28:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50936) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2z8-0001oj-0R for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dn2z6-0003XL-JT for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47004) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dn2z6-0003Wt-9r; Wed, 30 Aug 2017 09:24:44 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 39B3F800AF; Wed, 30 Aug 2017 13:24:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 39B3F800AF Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 379089B518; Wed, 30 Aug 2017 13:24:42 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:31 +0200 Message-Id: <1504099475-241036-5-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 30 Aug 2017 13:24:43 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 4/8] ppc: make cpu alias point only to real cpu models X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" alias pointing to another alias forces lookup code to do recurrsive translation till real cpu model is reached. Drop this nonsence and make each alias point to cpu model that has corresponding CPU type. It will allow to drop recurrsion in cpu model translation code and actually make ppc_cpu_aliases[] content use PowerPCCPUAlias fields properly (i.e. alias goes into .alias and model goes into .model) While at it add TODO defines around aliases that point to cpu models excluded by the same TODO defines. Signed-off-by: Igor Mammedov Acked-by: David Gibson --- v2: * rebase on top of lower-cased model names --- target/ppc/cpu-models.h | 2 +- target/ppc/cpu-models.c | 56 ++++++++++++++++++++++++++----------------------- 2 files changed, 31 insertions(+), 27 deletions(-) diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index b563c45..d748c68 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -24,7 +24,7 @@ /** * PowerPCCPUAlias: * @alias: The alias name. - * @model: The CPU model @alias refers to. + * @model: The CPU model @alias refers to, that directly resolves into CPU type * * A mapping entry from CPU @alias to CPU @model. */ diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 6721c3e..cf878a9 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -1235,6 +1235,7 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "x2vp50", "x2vp20" }, { "440ep", "440epb" }, +#if defined(TODO_USER_ONLY) { "440gp", "440gpc" }, { "440gr", "440gra" }, { "440gx", "440gxf" }, @@ -1272,36 +1273,37 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "mpc875", "mpc8xx" }, { "mpc880", "mpc8xx" }, { "mpc885", "mpc8xx" }, +#endif /* PowerPC MPC603 microcontrollers */ { "mpc8240", "603" }, - { "mpc52xx", "mpc5200" }, + { "mpc52xx", "mpc5200_v12" }, { "mpc5200", "mpc5200_v12" }, { "mpc5200b", "mpc5200b_v21" }, - { "mpc82xx", "mpc8280" }, - { "powerquicc-ii", "mpc82xx" }, + { "mpc82xx", "g2legp3" }, + { "powerquicc-ii", "g2legp3" }, { "mpc8241", "g2hip4" }, { "mpc8245", "g2hip4" }, { "mpc8247", "g2legp3" }, { "mpc8248", "g2legp3" }, - { "mpc8250", "mpc8250_hip4" }, + { "mpc8250", "g2hip4" }, { "mpc8250_hip3", "g2hip3" }, { "mpc8250_hip4", "g2hip4" }, - { "mpc8255", "mpc8255_hip4" }, + { "mpc8255", "g2hip4" }, { "mpc8255_hip3", "g2hip3" }, { "mpc8255_hip4", "g2hip4" }, - { "mpc8260", "mpc8260_hip4" }, + { "mpc8260", "g2hip4" }, { "mpc8260_hip3", "g2hip3" }, { "mpc8260_hip4", "g2hip4" }, - { "mpc8264", "mpc8264_hip4" }, + { "mpc8264", "g2hip4" }, { "mpc8264_hip3", "g2hip3" }, { "mpc8264_hip4", "g2hip4" }, - { "mpc8265", "mpc8265_hip4" }, + { "mpc8265", "g2hip4" }, { "mpc8265_hip3", "g2hip3" }, { "mpc8265_hip4", "g2hip4" }, - { "mpc8266", "mpc8266_hip4" }, + { "mpc8266", "g2hip4" }, { "mpc8266_hip3", "g2hip3" }, { "mpc8266_hip4", "g2hip4" }, { "mpc8270", "g2legp3" }, @@ -1339,18 +1341,18 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "601v", "601_v2" }, { "vanilla", "603" }, { "603e", "603e_v4.1" }, - { "stretch", "603e" }, + { "stretch", "603e_v4.1" }, { "vaillant", "603e7v" }, { "603r", "603e7t" }, - { "goldeneye", "603r" }, + { "goldeneye", "603e7t" }, { "604e", "604e_v2.4" }, - { "sirocco", "604e" }, + { "sirocco", "604e_v2.4" }, { "mach5", "604r" }, { "740", "740_v3.1" }, - { "arthur", "740" }, + { "arthur", "740_v3.1" }, { "750", "750_v3.1" }, - { "typhoon", "750" }, - { "g3", "750" }, + { "typhoon", "750_v3.1" }, + { "g3", "750_v3.1" }, { "conan/doyle", "750p" }, { "750cl", "750cl_v2.0" }, { "750cx", "750cx_v2.2" }, @@ -1358,32 +1360,34 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "750fx", "750fx_v2.3" }, { "750gx", "750gx_v1.2" }, { "750l", "750l_v3.2" }, - { "lonestar", "750l" }, + { "lonestar", "750l_v3.2" }, { "745", "745_v2.8" }, { "755", "755_v2.8" }, - { "goldfinger", "755" }, + { "goldfinger", "755_v2.8" }, { "7400", "7400_v2.9" }, - { "max", "7400" }, - { "g4", "7400" }, + { "max", "7400_v2.9" }, + { "g4", "7400_v2.9" }, { "7410", "7410_v1.4" }, - { "nitro", "7410" }, + { "nitro", "7410_v1.4" }, { "7448", "7448_v2.1" }, { "7450", "7450_v2.1" }, - { "vger", "7450" }, + { "vger", "7450_v2.1" }, { "7441", "7441_v2.3" }, { "7451", "7451_v2.3" }, { "7445", "7445_v3.2" }, { "7455", "7455_v3.2" }, - { "apollo6", "7455" }, + { "apollo6", "7455_v3.2" }, { "7447", "7447_v1.1" }, { "7457", "7457_v1.2" }, - { "apollo7", "7457" }, + { "apollo7", "7457_v1.2" }, { "7447a", "7447a_v1.2" }, { "7457a", "7457a_v1.2" }, { "apollo7pm", "7457a_v1.0" }, #if defined(TARGET_PPC64) +#if defined(TODO) { "power3", "630" }, { "power3+", "631" }, +#endif { "power5+", "power5+_v2.1" }, { "power5gs", "power5+_v2.1" }, { "power7", "power7_v2.3" }, @@ -1399,10 +1403,10 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { /* Generic PowerPCs */ #if defined(TARGET_PPC64) - { "ppc64", "970fx" }, + { "ppc64", "970fx_v3.1" }, #endif { "ppc32", "604" }, - { "ppc", "ppc32" }, - { "default", "ppc" }, + { "ppc", "604" }, + { "default", "604" }, { NULL, NULL } }; From patchwork Wed Aug 30 13:24:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807634 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5t159Z0z9sQl for ; Wed, 30 Aug 2017 23:28:09 +1000 (AEST) Received: from localhost ([::1]:50577 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn32N-00048u-Dg for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:28:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50952) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2z8-0001on-Rc for qemu-devel@nongnu.org; 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Wed, 30 Aug 2017 13:24:43 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:32 +0200 Message-Id: <1504099475-241036-6-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Wed, 30 Aug 2017 13:24:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 5/8] ppc: replace inter-function cyclic dependency/recurssion with 2 simple lookups X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" previous patches cleaned up cpu model/alias naming which allows to simplify cpu model/alias to cpu type lookup a bit byt removing recurssion and dependency of ppc_cpu_class_by_name() / ppc_cpu_class_by_alias() on each other. Besides of simplifying code it reduces it by ~15LOC. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson --- v2: s/g_ascii_strup/g_ascii_strdown/ due to switch to lower-cased model names --- target/ppc/translate_init.c | 43 +++++++++++++------------------------------ 1 file changed, 13 insertions(+), 30 deletions(-) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 0325226..cf0d795 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10176,22 +10176,6 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr) return pcc; } -static gint ppc_cpu_compare_class_name(gconstpointer a, gconstpointer b) -{ - ObjectClass *oc = (ObjectClass *)a; - const char *name = b; - PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); - - if (strncasecmp(name, object_class_get_name(oc), strlen(name)) == 0 && - ppc_cpu_is_valid(pcc) && - strcmp(object_class_get_name(oc) + strlen(name), - POWERPC_CPU_TYPE_SUFFIX) == 0) { - return 0; - } - return -1; -} - - static ObjectClass *ppc_cpu_class_by_name(const char *name); static ObjectClass *ppc_cpu_class_by_alias(PowerPCCPUAlias *alias) @@ -10216,8 +10200,8 @@ static ObjectClass *ppc_cpu_class_by_alias(PowerPCCPUAlias *alias) static ObjectClass *ppc_cpu_class_by_name(const char *name) { - GSList *list, *item; - ObjectClass *ret = NULL; + char *cpu_model, *typename; + ObjectClass *oc; const char *p; int i, len; @@ -10238,21 +10222,20 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name) } } - list = object_class_get_list(TYPE_POWERPC_CPU, false); - item = g_slist_find_custom(list, name, ppc_cpu_compare_class_name); - if (item != NULL) { - ret = OBJECT_CLASS(item->data); + cpu_model = g_ascii_strdown(name, -1); + p = ppc_cpu_lookup_alias(cpu_model); + if (p) { + g_free(cpu_model); + cpu_model = g_strdup(p); } - g_slist_free(list); - if (ret) { - return ret; - } + typename = g_strdup_printf("%s" POWERPC_CPU_TYPE_SUFFIX, cpu_model); + oc = object_class_by_name(typename); + g_free(typename); + g_free(cpu_model); - for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { - if (strcasecmp(ppc_cpu_aliases[i].alias, name) == 0) { - return ppc_cpu_class_by_alias(&ppc_cpu_aliases[i]); - } + if (oc && ppc_cpu_is_valid(POWERPC_CPU_CLASS(oc))) { + return oc; } return NULL; From patchwork Wed Aug 30 13:24:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807636 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5wn0lSSz9sQl for ; Wed, 30 Aug 2017 23:30:31 +1000 (AEST) Received: from localhost ([::1]:50590 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn34f-0006HQ-Ch for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:30:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50969) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2z9-0001ow-TK for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dn2z8-0003Yw-Up for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36588) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dn2z8-0003YG-PQ; Wed, 30 Aug 2017 09:24:46 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C609C404302; Wed, 30 Aug 2017 13:24:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com C609C404302 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id C67FF77DEE; Wed, 30 Aug 2017 13:24:44 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:33 +0200 Message-Id: <1504099475-241036-7-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 30 Aug 2017 13:24:45 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 6/8] ppc: simplify cpu model lookup by PVR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Igor Mammedov --- v2: - if going PVR lookup routem check that cpu_model string consumed completely, as PVR number shouldn't have any stray symbol in it. --- target/ppc/translate_init.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index cf0d795..a803a7f 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -34,6 +34,7 @@ #include "hw/ppc/ppc.h" #include "mmu-book3s-v3.h" #include "sysemu/qtest.h" +#include "qemu/cutils.h" //#define PPC_DUMP_CPU //#define PPC_DEBUG_SPR @@ -10203,22 +10204,16 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name) char *cpu_model, *typename; ObjectClass *oc; const char *p; - int i, len; - - /* Check if the given name is a PVR */ - len = strlen(name); - if (len == 10 && name[0] == '0' && name[1] == 'x') { - p = name + 2; - goto check_pvr; - } else if (len == 8) { - p = name; - check_pvr: - for (i = 0; i < 8; i++) { - if (!qemu_isxdigit(*p++)) - break; - } - if (i == 8) { - return OBJECT_CLASS(ppc_cpu_class_by_pvr(strtoul(name, NULL, 16))); + unsigned long pvr; + + /* Lookup by PVR if cpu_model is valid 8 digit hex number + * (excl: 0x prefix if present) + */ + if (!qemu_strtoul(name, &p, 16, &pvr)) { + int len = p - name; + len = (len == 10) && (name[1] == 'x') ? len - 2 : len; + if ((len == 8) && (*p == '\0')) { + return OBJECT_CLASS(ppc_cpu_class_by_pvr(pvr)); } } From patchwork Wed Aug 30 13:24:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807637 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5x35MyJz9sN7 for ; Wed, 30 Aug 2017 23:30:47 +1000 (AEST) Received: from localhost ([::1]:50597 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn34v-0006e0-Fo for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:30:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51002) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2zB-0001pl-6o for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dn2zA-0003aB-Am for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48842) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dn2zA-0003ZH-1v; Wed, 30 Aug 2017 09:24:48 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 14FC981226; Wed, 30 Aug 2017 13:24:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 14FC981226 Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 17CCA9B519; Wed, 30 Aug 2017 13:24:45 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:34 +0200 Message-Id: <1504099475-241036-8-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 30 Aug 2017 13:24:47 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 7/8] ppc: drop caching ObjectClass from PowerPCCPUAlias X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Caching there practically doesn't give any benefits and that at slow path druring querying supported CPU list. But it introduces non conventional path of where from comes used CPU type name (kvm_ppc_register_host_cpu_type). Taking in account that kvm_ppc_register_host_cpu_type() fixes up models the aliases point to, it's sufficient to make ppc_cpu_class_by_name() translate cpu alias to correct cpu type name. So drop PowerPCCPUAlias::oc field + ppc_cpu_class_by_alias() and let ppc_cpu_class_by_name() do conversion to cpu type name, which simplifies code a little bit saving ~20LOC and trouble wondering why ppc_cpu_class_by_alias() is necessary. Signed-off-by: Igor Mammedov --- target/ppc/cpu-models.h | 1 - target/ppc/kvm.c | 1 - target/ppc/translate_init.c | 26 ++------------------------ 3 files changed, 2 insertions(+), 26 deletions(-) diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index d748c68..e9c6015 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -31,7 +31,6 @@ typedef struct PowerPCCPUAlias { const char *alias; const char *model; - ObjectClass *oc; } PowerPCCPUAlias; extern PowerPCCPUAlias ppc_cpu_aliases[]; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index d185ef9..6870e6f 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2496,7 +2496,6 @@ static int kvm_ppc_register_host_cpu_type(void) if (suffix) { *suffix = 0; } - ppc_cpu_aliases[i].oc = oc; break; } } diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index a803a7f..963c4f3 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10177,28 +10177,6 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr) return pcc; } -static ObjectClass *ppc_cpu_class_by_name(const char *name); - -static ObjectClass *ppc_cpu_class_by_alias(PowerPCCPUAlias *alias) -{ - ObjectClass *invalid_class = (void*)ppc_cpu_class_by_alias; - - /* Cache target class lookups in the alias table */ - if (!alias->oc) { - alias->oc = ppc_cpu_class_by_name(alias->model); - if (!alias->oc) { - /* Fast check for non-existing aliases */ - alias->oc = invalid_class; - } - } - - if (alias->oc == invalid_class) { - return NULL; - } else { - return alias->oc; - } -} - static ObjectClass *ppc_cpu_class_by_name(const char *name) { char *cpu_model, *typename; @@ -10310,7 +10288,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) name, pcc->pvr); for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; - ObjectClass *alias_oc = ppc_cpu_class_by_alias(alias); + ObjectClass *alias_oc = ppc_cpu_class_by_name(alias->model); if (alias_oc != oc) { continue; @@ -10390,7 +10368,7 @@ CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; - oc = ppc_cpu_class_by_alias(alias); + oc = ppc_cpu_class_by_name(alias->model); if (oc == NULL) { continue; } From patchwork Wed Aug 30 13:24:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 807635 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xj5tW44rBz9sN7 for ; Wed, 30 Aug 2017 23:28:35 +1000 (AEST) Received: from localhost ([::1]:50579 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn32n-0004SL-7L for incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 09:28:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51058) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dn2zF-0001t5-BZ for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dn2zB-0003bb-LQ for qemu-devel@nongnu.org; Wed, 30 Aug 2017 09:24:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41442) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dn2zB-0003ad-Am; Wed, 30 Aug 2017 09:24:49 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5A77B7E433; Wed, 30 Aug 2017 13:24:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 5A77B7E433 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5D90D9B519; Wed, 30 Aug 2017 13:24:47 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 30 Aug 2017 15:24:35 +0200 Message-Id: <1504099475-241036-9-git-send-email-imammedo@redhat.com> In-Reply-To: <1504099475-241036-1-git-send-email-imammedo@redhat.com> References: <1504099475-241036-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 30 Aug 2017 13:24:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 8/8] ppc: remove non implemented cpu models X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Remove cpu models that aren't implemented and are not compiled/tested since they are under TODO ifdef which isn't defined in sources. If someone really needs a removed model he/she should add as regular one with corresponding implementation. Signed-off-by: Igor Mammedov --- target/ppc/cpu-models.c | 459 ------------------------------------------------ 1 file changed, 459 deletions(-) diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index cf878a9..611fc1b 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -19,11 +19,6 @@ * License along with this library; if not, see . */ -/* A lot of PowerPC definition have been included here. - * Most of them are not usable for now but have been kept - * inside "#if defined(TODO) ... #endif" statements to make tests easier. - */ - #include "qemu/osdep.h" #include "cpu.h" #include "cpu-models.h" @@ -79,10 +74,6 @@ "PowerPC 401A1") POWERPC_DEF("401b2", CPU_POWERPC_401B2, 401x2, "PowerPC 401B2") -#if defined(TODO) - POWERPC_DEF("401b3", CPU_POWERPC_401B3, 401x3, - "PowerPC 401B3") -#endif POWERPC_DEF("401c2", CPU_POWERPC_401C2, 401x2, "PowerPC 401C2") POWERPC_DEF("401d2", CPU_POWERPC_401D2, 401x2, @@ -95,18 +86,10 @@ POWERPC_DEF("401g2", CPU_POWERPC_401G2, 401x2, "PowerPC 401G2") /* PowerPC 401 microcontrollers */ -#if defined(TODO) - POWERPC_DEF("401gf", CPU_POWERPC_401GF, 401, - "PowerPC 401GF") -#endif POWERPC_DEF("iop480", CPU_POWERPC_IOP480, IOP480, "IOP480 (401 microcontroller)") POWERPC_DEF("cobra", CPU_POWERPC_COBRA, 401, "IBM Processor for Network Resources") -#if defined(TODO) - POWERPC_DEF("xipchip", CPU_POWERPC_XIPCHIP, 401, - NULL) -#endif /* PowerPC 403 family */ /* PowerPC 403 microcontrollers */ POWERPC_DEF("403ga", CPU_POWERPC_403GA, 403, @@ -117,64 +100,12 @@ "PowerPC 403 GC") POWERPC_DEF("403gcx", CPU_POWERPC_403GCX, 403GCX, "PowerPC 403 GCX") -#if defined(TODO) - POWERPC_DEF("403gp", CPU_POWERPC_403GP, 403, - "PowerPC 403 GP") -#endif /* PowerPC 405 family */ /* PowerPC 405 cores */ -#if defined(TODO) - POWERPC_DEF("405a3", CPU_POWERPC_405A3, 405, - "PowerPC 405 A3") -#endif -#if defined(TODO) - POWERPC_DEF("405a4", CPU_POWERPC_405A4, 405, - "PowerPC 405 A4") -#endif -#if defined(TODO) - POWERPC_DEF("405b3", CPU_POWERPC_405B3, 405, - "PowerPC 405 B3") -#endif -#if defined(TODO) - POWERPC_DEF("405b4", CPU_POWERPC_405B4, 405, - "PowerPC 405 B4") -#endif -#if defined(TODO) - POWERPC_DEF("405c3", CPU_POWERPC_405C3, 405, - "PowerPC 405 C3") -#endif -#if defined(TODO) - POWERPC_DEF("405c4", CPU_POWERPC_405C4, 405, - "PowerPC 405 C4") -#endif POWERPC_DEF("405d2", CPU_POWERPC_405D2, 405, "PowerPC 405 D2") -#if defined(TODO) - POWERPC_DEF("405d3", CPU_POWERPC_405D3, 405, - "PowerPC 405 D3") -#endif POWERPC_DEF("405d4", CPU_POWERPC_405D4, 405, "PowerPC 405 D4") -#if defined(TODO) - POWERPC_DEF("405d5", CPU_POWERPC_405D5, 405, - "PowerPC 405 D5") -#endif -#if defined(TODO) - POWERPC_DEF("405e4", CPU_POWERPC_405E4, 405, - "PowerPC 405 E4") -#endif -#if defined(TODO) - POWERPC_DEF("405f4", CPU_POWERPC_405F4, 405, - "PowerPC 405 F4") -#endif -#if defined(TODO) - POWERPC_DEF("405f5", CPU_POWERPC_405F5, 405, - "PowerPC 405 F5") -#endif -#if defined(TODO) - POWERPC_DEF("405f6", CPU_POWERPC_405F6, 405, - "PowerPC 405 F6") -#endif /* PowerPC 405 microcontrollers */ POWERPC_DEF("405cra", CPU_POWERPC_405CRa, 405, "PowerPC 405 CRa") @@ -184,16 +115,8 @@ "PowerPC 405 CRc") POWERPC_DEF("405ep", CPU_POWERPC_405EP, 405, "PowerPC 405 EP") -#if defined(TODO) - POWERPC_DEF("405exr", CPU_POWERPC_405EXr, 405, - "PowerPC 405 EXr") -#endif POWERPC_DEF("405ez", CPU_POWERPC_405EZ, 405, "PowerPC 405 EZ") -#if defined(TODO) - POWERPC_DEF("405fx", CPU_POWERPC_405FX, 405, - "PowerPC 405 FX") -#endif POWERPC_DEF("405gpa", CPU_POWERPC_405GPa, 405, "PowerPC 405 GPa") POWERPC_DEF("405gpb", CPU_POWERPC_405GPb, 405, @@ -204,28 +127,8 @@ "PowerPC 405 GPd") POWERPC_DEF("405gpr", CPU_POWERPC_405GPR, 405, "PowerPC 405 GPR") -#if defined(TODO) - POWERPC_DEF("405h", CPU_POWERPC_405H, 405, - "PowerPC 405 H") -#endif -#if defined(TODO) - POWERPC_DEF("405l", CPU_POWERPC_405L, 405, - "PowerPC 405 L") -#endif POWERPC_DEF("405lp", CPU_POWERPC_405LP, 405, "PowerPC 405 LP") -#if defined(TODO) - POWERPC_DEF("405pm", CPU_POWERPC_405PM, 405, - "PowerPC 405 PM") -#endif -#if defined(TODO) - POWERPC_DEF("405ps", CPU_POWERPC_405PS, 405, - "PowerPC 405 PS") -#endif -#if defined(TODO) - POWERPC_DEF("405s", CPU_POWERPC_405S, 405, - "PowerPC 405 S") -#endif POWERPC_DEF("npe405h", CPU_POWERPC_NPE405H, 405, "Npe405 H") POWERPC_DEF("npe405h2", CPU_POWERPC_NPE405H2, 405, @@ -234,113 +137,25 @@ "Npe405 L") POWERPC_DEF("npe4gs3", CPU_POWERPC_NPE4GS3, 405, "Npe4GS3") -#if defined(TODO) - POWERPC_DEF("npcxx1", CPU_POWERPC_NPCxx1, 405, - NULL) -#endif -#if defined(TODO) - POWERPC_DEF("npr161", CPU_POWERPC_NPR161, 405, - NULL) -#endif -#if defined(TODO) - POWERPC_DEF("lc77700", CPU_POWERPC_LC77700, 405, - "PowerPC LC77700 (Sanyo)") -#endif /* PowerPC 401/403/405 based set-top-box microcontrollers */ -#if defined(TODO) - POWERPC_DEF("stb01000", CPU_POWERPC_STB01000, 401x2, - "STB010000") -#endif -#if defined(TODO) - POWERPC_DEF("stb01010", CPU_POWERPC_STB01010, 401x2, - "STB01010") -#endif -#if defined(TODO) - POWERPC_DEF("stb0210", CPU_POWERPC_STB0210, 401x3, - "STB0210") -#endif POWERPC_DEF("stb03", CPU_POWERPC_STB03, 405, "STB03xx") -#if defined(TODO) - POWERPC_DEF("stb043", CPU_POWERPC_STB043, 405, - "STB043x") -#endif -#if defined(TODO) - POWERPC_DEF("stb045", CPU_POWERPC_STB045, 405, - "STB045x") -#endif POWERPC_DEF("stb04", CPU_POWERPC_STB04, 405, "STB04xx") POWERPC_DEF("stb25", CPU_POWERPC_STB25, 405, "STB25xx") -#if defined(TODO) - POWERPC_DEF("stb130", CPU_POWERPC_STB130, 405, - "STB130") -#endif /* Xilinx PowerPC 405 cores */ POWERPC_DEF("x2vp4", CPU_POWERPC_X2VP4, 405, NULL) POWERPC_DEF("x2vp20", CPU_POWERPC_X2VP20, 405, NULL) -#if defined(TODO) - POWERPC_DEF("zl10310", CPU_POWERPC_ZL10310, 405, - "Zarlink ZL10310") -#endif -#if defined(TODO) - POWERPC_DEF("zl10311", CPU_POWERPC_ZL10311, 405, - "Zarlink ZL10311") -#endif -#if defined(TODO) - POWERPC_DEF("zl10320", CPU_POWERPC_ZL10320, 405, - "Zarlink ZL10320") -#endif -#if defined(TODO) - POWERPC_DEF("zl10321", CPU_POWERPC_ZL10321, 405, - "Zarlink ZL10321") -#endif /* PowerPC 440 family */ -#if defined(TODO_USER_ONLY) - POWERPC_DEF("440", CPU_POWERPC_440, 440GP, - "Generic PowerPC 440") -#endif /* PowerPC 440 cores */ -#if defined(TODO) - POWERPC_DEF("440a4", CPU_POWERPC_440A4, 440x4, - "PowerPC 440 A4") -#endif POWERPC_DEF("440-xilinx", CPU_POWERPC_440_XILINX, 440x5, "PowerPC 440 Xilinx 5") POWERPC_DEF("440-xilinx-w-dfpu", CPU_POWERPC_440_XILINX, 440x5wDFPU, "PowerPC 440 Xilinx 5 With a Double Prec. FPU") -#if defined(TODO) - POWERPC_DEF("440a5", CPU_POWERPC_440A5, 440x5, - "PowerPC 440 A5") -#endif -#if defined(TODO) - POWERPC_DEF("440b4", CPU_POWERPC_440B4, 440x4, - "PowerPC 440 B4") -#endif -#if defined(TODO) - POWERPC_DEF("440g4", CPU_POWERPC_440G4, 440x4, - "PowerPC 440 G4") -#endif -#if defined(TODO) - POWERPC_DEF("440f5", CPU_POWERPC_440F5, 440x5, - "PowerPC 440 F5") -#endif -#if defined(TODO) - POWERPC_DEF("440g5", CPU_POWERPC_440G5, 440x5, - "PowerPC 440 G5") -#endif -#if defined(TODO) - POWERPC_DEF("440h4", CPU_POWERPC_440H4, 440x4, - "PowerPC 440H4") -#endif -#if defined(TODO) - POWERPC_DEF("440h6", CPU_POWERPC_440H6, 440Gx5, - "PowerPC 440H6") -#endif /* PowerPC 440 microcontrollers */ POWERPC_DEF("440epa", CPU_POWERPC_440EPa, 440EP, "PowerPC 440 EPa") @@ -380,10 +195,6 @@ POWERPC_DEF("440gxf", CPU_POWERPC_440GXf, 440EP, "PowerPC 440 GXf") #endif -#if defined(TODO) - POWERPC_DEF("440s", CPU_POWERPC_440S, 440, - "PowerPC 440 S") -#endif #if defined(TODO_USER_ONLY) POWERPC_DEF("440sp", CPU_POWERPC_440SP, 440EP, "PowerPC 440 SP") @@ -396,20 +207,6 @@ POWERPC_DEF("440spe", CPU_POWERPC_440SPE, 440EP, "PowerPC 440 SPE") #endif - /* PowerPC 460 family */ -#if defined(TODO) - POWERPC_DEF("464", CPU_POWERPC_464, 460, - "Generic PowerPC 464") -#endif - /* PowerPC 464 microcontrollers */ -#if defined(TODO) - POWERPC_DEF("464h90", CPU_POWERPC_464H90, 460, - "PowerPC 464H90") -#endif -#if defined(TODO) - POWERPC_DEF("464h90f", CPU_POWERPC_464H90F, 460F, - "PowerPC 464H90F") -#endif /* Freescale embedded PowerPC cores */ /* MPC5xx family (aka RCPU) */ #if defined(TODO_USER_ONLY) @@ -447,10 +244,6 @@ POWERPC_DEF("g2legp3", CPU_POWERPC_G2LEgp3, G2LE, "PowerPC G2LE GP3 core") /* PowerPC G2 microcontrollers */ -#if defined(TODO) - POWERPC_DEF_SVR("mpc5121", "MPC5121", - CPU_POWERPC_MPC5121, POWERPC_SVR_5121, G2LE) -#endif POWERPC_DEF_SVR("mpc5200_v10", "MPC5200 v1.0", CPU_POWERPC_MPC5200_v10, POWERPC_SVR_5200_v10, G2LE) POWERPC_DEF_SVR("mpc5200_v11", "MPC5200 v1.1", @@ -462,115 +255,10 @@ POWERPC_DEF_SVR("mpc5200b_v21", "MPC5200B v2.1", CPU_POWERPC_MPC5200B_v21, POWERPC_SVR_5200B_v21, G2LE) /* e200 family */ -#if defined(TODO) - POWERPC_DEF_SVR("mpc55xx", "Generic MPC55xx core", - CPU_POWERPC_MPC55xx, POWERPC_SVR_55xx, e200) -#endif -#if defined(TODO) - POWERPC_DEF("e200z0", CPU_POWERPC_e200z0, e200, - "PowerPC e200z0 core") -#endif -#if defined(TODO) - POWERPC_DEF("e200z1", CPU_POWERPC_e200z1, e200, - "PowerPC e200z1 core") -#endif -#if defined(TODO) - POWERPC_DEF("e200z3", CPU_POWERPC_e200z3, e200, - "PowerPC e200z3 core") -#endif POWERPC_DEF("e200z5", CPU_POWERPC_e200z5, e200, "PowerPC e200z5 core") POWERPC_DEF("e200z6", CPU_POWERPC_e200z6, e200, "PowerPC e200z6 core") - /* PowerPC e200 microcontrollers */ -#if defined(TODO) - POWERPC_DEF_SVR("mpc5514e", "MPC5514E", - CPU_POWERPC_MPC5514E, POWERPC_SVR_5514E, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5514e_v0", "MPC5514E v0", - CPU_POWERPC_MPC5514E_v0, POWERPC_SVR_5514E_v0, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5514e_v1", "MPC5514E v1", - CPU_POWERPC_MPC5514E_v1, POWERPC_SVR_5514E_v1, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5514g", "MPC5514G", - CPU_POWERPC_MPC5514G, POWERPC_SVR_5514G, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5514g_v0", "MPC5514G v0", - CPU_POWERPC_MPC5514G_v0, POWERPC_SVR_5514G_v0, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5514g_v1", "MPC5514G v1", - CPU_POWERPC_MPC5514G_v1, POWERPC_SVR_5514G_v1, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5515s", "MPC5515S", - CPU_POWERPC_MPC5515S, POWERPC_SVR_5515S, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516e", "MPC5516E", - CPU_POWERPC_MPC5516E, POWERPC_SVR_5516E, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516e_v0", "MPC5516E v0", - CPU_POWERPC_MPC5516E_v0, POWERPC_SVR_5516E_v0, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516e_v1", "MPC5516E v1", - CPU_POWERPC_MPC5516E_v1, POWERPC_SVR_5516E_v1, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516g", "MPC5516G", - CPU_POWERPC_MPC5516G, POWERPC_SVR_5516G, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516g_v0", "MPC5516G v0", - CPU_POWERPC_MPC5516G_v0, POWERPC_SVR_5516G_v0, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516g_v1", "MPC5516G v1", - CPU_POWERPC_MPC5516G_v1, POWERPC_SVR_5516G_v1, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5516s", "MPC5516S", - CPU_POWERPC_MPC5516S, POWERPC_SVR_5516S, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5533", "MPC5533", - CPU_POWERPC_MPC5533, POWERPC_SVR_5533, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5534", "MPC5534", - CPU_POWERPC_MPC5534, POWERPC_SVR_5534, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5553", "MPC5553", - CPU_POWERPC_MPC5553, POWERPC_SVR_5553, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5554", "MPC5554", - CPU_POWERPC_MPC5554, POWERPC_SVR_5554, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5561", "MPC5561", - CPU_POWERPC_MPC5561, POWERPC_SVR_5561, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5565", "MPC5565", - CPU_POWERPC_MPC5565, POWERPC_SVR_5565, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5566", "MPC5566", - CPU_POWERPC_MPC5566, POWERPC_SVR_5566, e200) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc5567", "MPC5567", - CPU_POWERPC_MPC5567, POWERPC_SVR_5567, e200) -#endif /* e300 family */ POWERPC_DEF("e300c1", CPU_POWERPC_e300c1, e300, "PowerPC e300c1 core") @@ -581,46 +269,6 @@ POWERPC_DEF("e300c4", CPU_POWERPC_e300c4, e300, "PowerPC e300c4 core") /* PowerPC e300 microcontrollers */ -#if defined(TODO) - POWERPC_DEF_SVR("mpc8313", "MPC8313", - CPU_POWERPC_MPC831x, POWERPC_SVR_8313, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8313e", "MPC8313E", - CPU_POWERPC_MPC831x, POWERPC_SVR_8313E, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8314", "MPC8314", - CPU_POWERPC_MPC831x, POWERPC_SVR_8314, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8314e", "MPC8314E", - CPU_POWERPC_MPC831x, POWERPC_SVR_8314E, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8315", "MPC8315", - CPU_POWERPC_MPC831x, POWERPC_SVR_8315, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8315e", "MPC8315E", - CPU_POWERPC_MPC831x, POWERPC_SVR_8315E, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8321", "MPC8321", - CPU_POWERPC_MPC832x, POWERPC_SVR_8321, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8321e", "MPC8321E", - CPU_POWERPC_MPC832x, POWERPC_SVR_8321E, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8323", "MPC8323", - CPU_POWERPC_MPC832x, POWERPC_SVR_8323, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8323e", "MPC8323E", - CPU_POWERPC_MPC832x, POWERPC_SVR_8323E, e300) -#endif POWERPC_DEF_SVR("mpc8343", "MPC8343", CPU_POWERPC_MPC834x, POWERPC_SVR_8343, e300) POWERPC_DEF_SVR("mpc8343a", "MPC8343A", @@ -653,14 +301,6 @@ CPU_POWERPC_MPC834x, POWERPC_SVR_8349E, e300) POWERPC_DEF_SVR("mpc8349ea", "MPC8349EA", CPU_POWERPC_MPC834x, POWERPC_SVR_8349EA, e300) -#if defined(TODO) - POWERPC_DEF_SVR("mpc8358e", "MPC8358E", - CPU_POWERPC_MPC835x, POWERPC_SVR_8358E, e300) -#endif -#if defined(TODO) - POWERPC_DEF_SVR("mpc8360e", "MPC8360E", - CPU_POWERPC_MPC836x, POWERPC_SVR_8360E, e300) -#endif POWERPC_DEF_SVR("mpc8377", "MPC8377", CPU_POWERPC_MPC837x, POWERPC_SVR_8377, e300) POWERPC_DEF_SVR("mpc8377e", "MPC8377E", @@ -855,10 +495,6 @@ "PowerPC 604e v2.4") POWERPC_DEF("604r", CPU_POWERPC_604R, 604E, "PowerPC 604r (aka PIDA)") -#if defined(TODO) - POWERPC_DEF("604ev", CPU_POWERPC_604EV, 604E, - "PowerPC 604ev") -#endif /* PowerPC 7xx family */ POWERPC_DEF("740_v1.0", CPU_POWERPC_7x0_v10, 740, "PowerPC 740 v1.0 (G3)") @@ -996,12 +632,6 @@ "PowerPC 745 v2.8") POWERPC_DEF("755_v2.8", CPU_POWERPC_7x5_v28, 755, "PowerPC 755 v2.8") -#if defined(TODO) - POWERPC_DEF("745p", CPU_POWERPC_7x5P, 745, - "PowerPC 745P (G3)") - POWERPC_DEF("755p", CPU_POWERPC_7x5P, 755, - "PowerPC 755P (G3)") -#endif /* PowerPC 74xx family */ POWERPC_DEF("7400_v1.0", CPU_POWERPC_7400_v10, 7400, "PowerPC 7400 v1.0 (G4)") @@ -1103,34 +733,8 @@ "PowerPC 7457A v1.2 (G4)") /* 64 bits PowerPC */ #if defined (TARGET_PPC64) -#if defined(TODO) - POWERPC_DEF("620", CPU_POWERPC_620, 620, - "PowerPC 620") - POWERPC_DEF("630", CPU_POWERPC_630, 630, - "PowerPC 630 (POWER3)") -#endif -#if defined(TODO) - POWERPC_DEF("631", CPU_POWERPC_631, 631, - "PowerPC 631 (Power 3+)") -#endif -#if defined(TODO) - POWERPC_DEF("power4", CPU_POWERPC_POWER4, POWER4, - "POWER4") -#endif -#if defined(TODO) - POWERPC_DEF("power4+", CPU_POWERPC_POWER4P, POWER4P, - "POWER4p") -#endif -#if defined(TODO) - POWERPC_DEF("power5", CPU_POWERPC_POWER5, POWER5, - "POWER5") -#endif POWERPC_DEF("power5+_v2.1", CPU_POWERPC_POWER5P_v21, POWER5P, "POWER5+ v2.1") -#if defined(TODO) - POWERPC_DEF("power6", CPU_POWERPC_POWER6, POWER6, - "POWER6") -#endif POWERPC_DEF("power7_v2.3", CPU_POWERPC_POWER7_v23, POWER7, "POWER7 v2.3") POWERPC_DEF("power7+_v2.1", CPU_POWERPC_POWER7P_v21, POWER7, @@ -1161,66 +765,7 @@ "PowerPC 970MP v1.0") POWERPC_DEF("970mp_v1.1", CPU_POWERPC_970MP_v11, 970, "PowerPC 970MP v1.1") -#if defined(TODO) - POWERPC_DEF("cell", CPU_POWERPC_CELL, 970, - "PowerPC Cell") -#endif -#if defined(TODO) - POWERPC_DEF("cell_v1.0", CPU_POWERPC_CELL_v10, 970, - "PowerPC Cell v1.0") -#endif -#if defined(TODO) - POWERPC_DEF("cell_v2.0", CPU_POWERPC_CELL_v20, 970, - "PowerPC Cell v2.0") -#endif -#if defined(TODO) - POWERPC_DEF("cell_v3.0", CPU_POWERPC_CELL_v30, 970, - "PowerPC Cell v3.0") -#endif -#if defined(TODO) - POWERPC_DEF("cell_v3.1", CPU_POWERPC_CELL_v31, 970, - "PowerPC Cell v3.1") -#endif -#if defined(TODO) - POWERPC_DEF("cell_v3.2", CPU_POWERPC_CELL_v32, 970, - "PowerPC Cell v3.2") -#endif -#if defined(TODO) - /* This one seems to support the whole POWER2 instruction set - * and the PowerPC 64 one. - */ - /* What about A10 & A30 ? */ - POWERPC_DEF("rs64", CPU_POWERPC_RS64, RS64, - "RS64 (Apache/A35)") -#endif -#if defined(TODO) - POWERPC_DEF("rs64-ii", CPU_POWERPC_RS64II, RS64, - "RS64-II (NorthStar/A50)") -#endif -#if defined(TODO) - POWERPC_DEF("rs64-iii", CPU_POWERPC_RS64III, RS64, - "RS64-III (Pulsar)") -#endif -#if defined(TODO) - POWERPC_DEF("rs64-iv", CPU_POWERPC_RS64IV, RS64, - "RS64-IV (IceStar/IStar/SStar)") -#endif #endif /* defined (TARGET_PPC64) */ - /* POWER */ -#if defined(TODO) - POWERPC_DEF("power", CPU_POWERPC_POWER, POWER, - "Original POWER") -#endif -#if defined(TODO) - POWERPC_DEF("power2", CPU_POWERPC_POWER2, POWER, - "POWER2") -#endif - /* PA semi cores */ -#if defined(TODO) - POWERPC_DEF("pa6t", CPU_POWERPC_PA6T, PA6T, - "PA PA6T") -#endif - /***************************************************************************/ /* PowerPC CPU aliases */ @@ -1384,10 +929,6 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "7457a", "7457a_v1.2" }, { "apollo7pm", "7457a_v1.0" }, #if defined(TARGET_PPC64) -#if defined(TODO) - { "power3", "630" }, - { "power3+", "631" }, -#endif { "power5+", "power5+_v2.1" }, { "power5gs", "power5+_v2.1" }, { "power7", "power7_v2.3" },