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GET /api/patches/807471/?format=api
{ "id": 807471, "url": "http://patchwork.ozlabs.org/api/patches/807471/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170830082702.3011-6-Sergio.G.DelReal@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170830082702.3011-6-Sergio.G.DelReal@gmail.com>", "list_archive_url": null, "date": "2017-08-30T08:26:54", "name": "[v2,05/13] hvf: add fields to CPUState and CPUX86State; add definitions", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "62f435249b6b762398d824af380033209250d760", "submitter": { "id": 70675, "url": "http://patchwork.ozlabs.org/api/people/70675/?format=api", "name": "Sergio Andres Gomez Del Real", "email": "sergio.g.delreal@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170830082702.3011-6-Sergio.G.DelReal@gmail.com/mbox/", "series": [ { "id": 548, "url": "http://patchwork.ozlabs.org/api/series/548/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=548", "date": "2017-08-30T08:26:49", "name": "add support for Hypervisor.framework in QEMU", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/548/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807471/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807471/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"BweAw+o7\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhzH732jhz9t0M\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 18:30:59 +1000 (AEST)", "from localhost ([::1]:48994 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dmyOn-0004iX-41\n\tfor incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 04:30:57 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:60517)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <sergio.g.delreal@gmail.com>) id 1dmyLi-0002U9-IC\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 04:27:47 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <sergio.g.delreal@gmail.com>) id 1dmyLd-0000MA-LM\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 04:27:46 -0400", "from mail-ua0-x241.google.com ([2607:f8b0:400c:c08::241]:33570)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <sergio.g.delreal@gmail.com>)\n\tid 1dmyLd-0000M0-GU\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 04:27:41 -0400", "by mail-ua0-x241.google.com with SMTP id m24so2359737uai.0\n\tfor <qemu-devel@nongnu.org>; Wed, 30 Aug 2017 01:27:41 -0700 (PDT)", "from localhost.localdomain ([191.109.6.85])\n\tby smtp.gmail.com with ESMTPSA id\n\th74sm1079197vka.8.2017.08.30.01.27.39\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tWed, 30 Aug 2017 01:27:40 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=jzEcn9QaLxWhhgD1UNz6wDNI4BEyG/k48wc+rPl342g=;\n\tb=BweAw+o7JY9vgt4cUmeBiPYToBa0pEvfSYy3GpW4efDdjLKDsIinrpkgY2f/TB+bhK\n\tbJ7CUldH9j4eIoFDSOSTe5RC4BxMvnY2CbdD/Vimd26oujyyiVEewqwY6+wYY6iTzEsz\n\tk//xoz0XhTzM9DGRubEArhd/kCPy4jCBtqXFP3TJYtWgYLo+n5XdVPFa+VLWM2bEeBqj\n\tJL46TaWSG9KMj6nFUypvcvliK8eHC7A9XZhjnODbnt6vHKSuZ6khIEPA1nxtQ3eu1gTo\n\tEsVvAOFh1TY6COxXQcz2m7GOJirPEmAC2tIYHzi2pGJidqTDvrl0WrrVkHsE06f6IgpD\n\tgWZw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=jzEcn9QaLxWhhgD1UNz6wDNI4BEyG/k48wc+rPl342g=;\n\tb=dk+3JWnxW2emQsxQiSCXiY6561FFvxO5zthnJdyvRb7A7n1RKY6b7DRsqjJEhMu8tr\n\tnxJrHD1ou/H5Plhf+sP06EIFS9Pk8Ft/epnMh/ScGkZLak3F2xKdcF7EZAJFfrYkYz9k\n\tR4ONlfZYes9iVGsnL0Vgc8FyStdCqE24yvWdWPExSivbnvdLEpfm4L6BGWjCzyKWE5c2\n\t/GHe/WTSKqDSe+e0hC+D8yakleU9PxgJ59YP8Zuj7w8Y7iGnwknbxV5yMUX24YhtM13u\n\tEq73rY812AUTN2OxeVZ/DwC98zn7nYCxYw1H6LdPpUNMG2CeWj9R/Vw+p+GNTdVsiJha\n\t61mQ==", "X-Gm-Message-State": "AHPjjUg7E8qVs52xFwnhVuHKpHzfcns665LJtj3Uz8pWLUcZ9Hw4gYlt\n\t3JEwS2FzeQ7qHcVl", "X-Received": "by 10.159.49.78 with SMTP id n14mr453343uab.200.1504081660772;\n\tWed, 30 Aug 2017 01:27:40 -0700 (PDT)", "From": "Sergio Andres Gomez Del Real <sergio.g.delreal@gmail.com>", "X-Google-Original-From": "Sergio Andres Gomez Del Real\n\t<Sergio.G.DelReal@gmail.com>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 30 Aug 2017 03:26:54 -0500", "Message-Id": "<20170830082702.3011-6-Sergio.G.DelReal@gmail.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170830082702.3011-1-Sergio.G.DelReal@gmail.com>", "References": "<20170830082702.3011-1-Sergio.G.DelReal@gmail.com>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400c:c08::241", "Subject": "[Qemu-devel] [PATCH v2 05/13] hvf: add fields to CPUState and\n\tCPUX86State; add definitions", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "This commit adds some fields specific to hvf in CPUState and\nCPUX86State. It also adds some handy #defines.\n\nSigned-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com>\n---\n include/qom/cpu.h | 2 ++\n target/i386/cpu.h | 23 +++++++++++++++++++++++\n 2 files changed, 25 insertions(+)", "diff": "diff --git a/include/qom/cpu.h b/include/qom/cpu.h\nindex 25eefea7ab..fb0e54e6d9 100644\n--- a/include/qom/cpu.h\n+++ b/include/qom/cpu.h\n@@ -407,6 +407,8 @@ struct CPUState {\n * unnecessary flushes.\n */\n uint16_t pending_tlb_flush;\n+\n+ uint64_t hvf_fd;\n };\n \n QTAILQ_HEAD(CPUTailQ, CPUState);\ndiff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 051867399b..7d90f08b98 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -82,15 +82,19 @@\n #define R_GS 5\n \n /* segment descriptor fields */\n+#define DESC_G_SHIFT 23\n #define DESC_G_MASK (1 << 23)\n #define DESC_B_SHIFT 22\n #define DESC_B_MASK (1 << DESC_B_SHIFT)\n #define DESC_L_SHIFT 21 /* x86_64 only : 64 bit code segment */\n #define DESC_L_MASK (1 << DESC_L_SHIFT)\n+#define DESC_AVL_SHIFT 20\n #define DESC_AVL_MASK (1 << 20)\n+#define DESC_P_SHIFT 15\n #define DESC_P_MASK (1 << 15)\n #define DESC_DPL_SHIFT 13\n #define DESC_DPL_MASK (3 << DESC_DPL_SHIFT)\n+#define DESC_S_SHIFT 12\n #define DESC_S_MASK (1 << 12)\n #define DESC_TYPE_SHIFT 8\n #define DESC_TYPE_MASK (15 << DESC_TYPE_SHIFT)\n@@ -631,6 +635,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];\n #define CPUID_7_0_EBX_AVX512BW (1U << 30) /* AVX-512 Byte and Word Instructions */\n #define CPUID_7_0_EBX_AVX512VL (1U << 31) /* AVX-512 Vector Length Extensions */\n \n+#define CPUID_7_0_ECX_AVX512BMI (1U << 1)\n #define CPUID_7_0_ECX_VBMI (1U << 1) /* AVX-512 Vector Byte Manipulation Instrs */\n #define CPUID_7_0_ECX_UMIP (1U << 2)\n #define CPUID_7_0_ECX_PKU (1U << 3)\n@@ -806,6 +811,20 @@ typedef struct SegmentCache {\n float64 _d_##n[(bits)/64]; \\\n }\n \n+typedef union {\n+ uint8_t _b[16];\n+ uint16_t _w[8];\n+ uint32_t _l[4];\n+ uint64_t _q[2];\n+} XMMReg;\n+\n+typedef union {\n+ uint8_t _b[32];\n+ uint16_t _w[16];\n+ uint32_t _l[8];\n+ uint64_t _q[4];\n+} YMMReg;\n+\n typedef MMREG_UNION(ZMMReg, 512) ZMMReg;\n typedef MMREG_UNION(MMXReg, 64) MMXReg;\n \n@@ -1041,7 +1060,11 @@ typedef struct CPUX86State {\n ZMMReg xmm_t0;\n MMXReg mmx_t0;\n \n+ XMMReg ymmh_regs[CPU_NB_REGS];\n+\n uint64_t opmask_regs[NB_OPMASK_REGS];\n+ YMMReg zmmh_regs[CPU_NB_REGS];\n+ ZMMReg hi16_zmm_regs[CPU_NB_REGS];\n \n /* sysenter registers */\n uint32_t sysenter_cs;\n", "prefixes": [ "v2", "05/13" ] }