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GET /api/patches/806988/?format=api
{ "id": 806988, "url": "http://patchwork.ozlabs.org/api/patches/806988/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503990107-28658-1-git-send-email-sumit.garg@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503990107-28658-1-git-send-email-sumit.garg@nxp.com>", "list_archive_url": null, "date": "2017-08-29T07:01:45", "name": "[U-Boot,1/3] armv8: fsl-layerscape: SPL size reduction", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "251c3211a6cdfd8ba1743405a158a62c8d6ca01f", "submitter": { "id": 68653, "url": "http://patchwork.ozlabs.org/api/people/68653/?format=api", "name": "Sumit Garg", "email": "sumit.garg@nxp.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503990107-28658-1-git-send-email-sumit.garg@nxp.com/mbox/", "series": [ { "id": 318, "url": "http://patchwork.ozlabs.org/api/series/318/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=318", "date": "2017-08-29T07:01:46", "name": "[U-Boot,1/3] armv8: fsl-layerscape: SPL size reduction", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/318/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806988/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806988/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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Tue, 29 Aug 2017 00:01:48 -0700" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=BAD_ENC_HEADER,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL,\n\tSPF_HELO_PASS\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Sumit Garg <sumit.garg@nxp.com>", "To": "<u-boot@lists.denx.de>", "Date": "Tue, 29 Aug 2017 12:31:45 +0530", "Message-ID": "<1503990107-28658-1-git-send-email-sumit.garg@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131484637118818174;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(39380400002)(39860400002)(2980300002)(1109001)(1110001)(339900001)(189002)(199003)(5003940100001)(54906002)(305945005)(86362001)(77096006)(6666003)(356003)(189998001)(6916009)(626005)(33646002)(47776003)(68736007)(105606002)(2351001)(498600001)(4326008)(106466001)(85426001)(5660300001)(110136004)(48376002)(50986999)(8936002)(50466002)(97736004)(8656003)(2906002)(50226002)(53936002)(104016004)(81166006)(8676002)(81156014)(36756003);\n\tDIR:OUT; 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BLUPR03MB549; ", "X-Forefront-PRVS": "0414DF926F", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "29 Aug 2017 07:01:51.6790\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BLUPR03MB549", "Cc": "ruchika.gupta@nxp.com", "Subject": "[U-Boot] [PATCH 1/3] armv8: fsl-layerscape: SPL size reduction", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Using changes in this patch we were able to reduce approx 4k\nsize of u-boot-spl.bin image. Following is breif description of\nchanges to reduce SPL size:\n1. Compile-off mp.c and libfdt.c in case of SPL build.\n2. Keep MMU and DCACHE specific variable and functions under\n CONFIG_SYS_DCACHE_OFF macro.\n3. Compile-off IFC specific funtion call \"init_early_memctl_regs\"\n in case of SPL build.\n\nSigned-off-by: Sumit Garg <sumit.garg@nxp.com>\n---\n\nDependent on ls1088 base SD boot target. Also dependent on ls1088\nQPSI secure boot target.\n\n arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 ++\n arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 6 ++++++\n arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 ++\n 3 files changed, 10 insertions(+)", "diff": "diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile\nindex 115c3fc..0cb6d4e 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile\n@@ -7,8 +7,10 @@\n obj-y += cpu.o\n obj-y += lowlevel.o\n obj-y += soc.o\n+ifndef CONFIG_SPL_BUILD\n obj-$(CONFIG_MP) += mp.o\n obj-$(CONFIG_OF_LIBFDT) += fdt.o\n+endif\n obj-$(CONFIG_SPL) += spl.o\n obj-$(CONFIG_$(SPL_)FSL_LS_PPA) += ppa.o\n \ndiff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c\nindex 3c9a5ed..3ce51af 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c\n@@ -32,7 +32,9 @@\n \n DECLARE_GLOBAL_DATA_PTR;\n \n+#ifndef CONFIG_SYS_DCACHE_OFF\n struct mm_region *mem_map = early_map;\n+#endif\n \n void cpu_name(char *name)\n {\n@@ -824,6 +826,7 @@ void efi_add_known_memory(void)\n }\n #endif\n \n+#ifndef CONFIG_SYS_DCACHE_OFF\n /*\n * Before DDR size is known, early MMU table have DDR mapped as device memory\n * to avoid speculative access. To relocate U-Boot to DDR, \"normal memory\"\n@@ -888,14 +891,17 @@ void update_early_mmu_table(void)\n \t\t}\n \t}\n }\n+#endif\n \n __weak int dram_init(void)\n {\n \tfsl_initdram();\n+#ifndef CONFIG_SYS_DCACHE_OFF\n #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)\n \t/* This will break-before-make MMU for DDR */\n \tupdate_early_mmu_table();\n #endif\n+#endif\n \n \treturn 0;\n }\ndiff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c\nindex 2075c96..7c26953 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c\n@@ -329,7 +329,9 @@ void bypass_smmu(void)\n void fsl_lsch3_early_init_f(void)\n {\n \terratum_rcw_src();\n+#ifndef CONFIG_SPL_BUILD\n \tinit_early_memctl_regs();\t/* tighten IFC timing */\n+#endif\n #ifdef CONFIG_SYS_FSL_ERRATUM_A009203\n \terratum_a009203();\n #endif\n", "prefixes": [ "U-Boot", "1/3" ] }