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GET /api/patches/806801/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 806801,
    "url": "http://patchwork.ozlabs.org/api/patches/806801/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170828221901.12827-1-portia.stephens@xilinx.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170828221901.12827-1-portia.stephens@xilinx.com>",
    "list_archive_url": null,
    "date": "2017-08-28T22:19:01",
    "name": "target/arm: Remove 5J architecture",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "70dec4fd604344476dadfad2df3f3fcb0be29ad4",
    "submitter": {
        "id": 72246,
        "url": "http://patchwork.ozlabs.org/api/people/72246/?format=api",
        "name": "Portia Stephens",
        "email": "portia.stephens@xilinx.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170828221901.12827-1-portia.stephens@xilinx.com/mbox/",
    "series": [
        {
            "id": 274,
            "url": "http://patchwork.ozlabs.org/api/series/274/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=274",
            "date": "2017-08-28T22:19:01",
            "name": "target/arm: Remove 5J architecture",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/274/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/806801/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/806801/checks/",
    "tags": {},
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        "From": "Portia Stephens <portia.stephens@xilinx.com>",
        "To": "<peter.maydell@linaro.org>, <qemu-arm@nongnu.org>",
        "Date": "Mon, 28 Aug 2017 15:19:01 -0700",
        "Message-ID": "<20170828221901.12827-1-portia.stephens@xilinx.com>",
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        "Subject": "[Qemu-devel] [PATCH] target/arm: Remove 5J architecture",
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        "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"
    },
    "content": "This fixes the issue that any BXJ instruction will result in an illegal_op.\nThis is because the 5J archiecture is always unsupported.\n5J architecture doesn't have a feature set and ENABLE_ARCH_5J is hardcoded\nto 0, causing any ARCH(5J) to result in an illegal_op. The only use of\nARCH(5J) is in the BXJ instruction disassembly.\n\nThis patch replaces that ARCH(5J) with ARCH(6) and removes the 5J architecture,\nthis isn't technically correct since the v5J ISA does support the BXJ\ninstruction. This change means that running a BXJ instruction on any v5 will\ncause an illegal_op but it is better than the current state where any\narchitecture running a BXJ would cause an illegal_op. The correct solution\nwould be to create a feature set for v5J but that doesn't seem worth it as the\nv5J is so old.\n\nSigned-off-by: Portia Stephens <portia.stephens@xilinx.com>\nReviewed-by: Alistair Francis <alistair.francis@xilinx.com>\n---\n target/arm/translate.c | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/target/arm/translate.c b/target/arm/translate.c\nindex d1a5f56998..4a30c0d7e0 100644\n--- a/target/arm/translate.c\n+++ b/target/arm/translate.c\n@@ -41,7 +41,6 @@\n #define ENABLE_ARCH_5     arm_dc_feature(s, ARM_FEATURE_V5)\n /* currently all emulated v5 cores are also v5TE, so don't bother */\n #define ENABLE_ARCH_5TE   arm_dc_feature(s, ARM_FEATURE_V5)\n-#define ENABLE_ARCH_5J    0\n #define ENABLE_ARCH_6     arm_dc_feature(s, ARM_FEATURE_V6)\n #define ENABLE_ARCH_6K    arm_dc_feature(s, ARM_FEATURE_V6K)\n #define ENABLE_ARCH_6T2   arm_dc_feature(s, ARM_FEATURE_THUMB2)\n@@ -8389,7 +8388,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)\n             break;\n         case 0x2:\n             if (op1 == 1) {\n-                ARCH(5J); /* bxj */\n+                /* This should actually be ARCH(5J) but there is currently no\n+                 * 5J architecture in QEMU.\n+                 */\n+                ARCH(6); /* bxj */\n                 /* Trivial implementation equivalent to bx.  */\n                 tmp = load_reg(s, rm);\n                 gen_bx(s, tmp);\n",
    "prefixes": []
}