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GET /api/patches/782071/?format=api
{ "id": 782071, "url": "http://patchwork.ozlabs.org/api/patches/782071/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170629071256.8159-2-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170629071256.8159-2-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170629071256.8159-2-oohall@gmail.com/", "date": "2017-06-29T07:12:53", "name": "[1/4] powerpc/smp: Use cpu_to_chip_id() to find core siblings", "commit_ref": "e3d8b67e2c60dcd35661d34df249f20d20463f0c", "pull_url": null, "state": "accepted", "archived": false, "hash": "e54b8b266e2d0ce0b839badfc6450b203a79a2d5", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170629071256.8159-2-oohall@gmail.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/782071/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/782071/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wyrZ209Llz9s75\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 29 Jun 2017 17:16:42 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3wyrZ163t7zDr4K\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 29 Jun 2017 17:16:41 +1000 (AEST)", "from mail-pg0-x241.google.com (mail-pg0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c05::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3wyrV33zZJzDr3x\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 29 Jun 2017 17:13:15 +1000 (AEST)", "by mail-pg0-x241.google.com with SMTP id u62so10887501pgb.0\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 29 Jun 2017 00:13:15 -0700 (PDT)", "from flat-canetoad.ozlabs.ibm.com ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\ta29sm9821658pfg.30.2017.06.29.00.13.11\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 29 Jun 2017 00:13:13 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"akfgMSan\"; dkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"akfgMSan\"; dkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"akfgMSan\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=zODbIweVpumcXOZmsJzeN+APh+16lMuF21OZfxm/Gq4=;\n\tb=akfgMSanluq9dU4TGLeH2kieJcrRouOcOM7Rto9dY/Gh8aQJUamEqW8bJlHtYXoXl6\n\tN7ERsfG+KJZh24dnYBJ+uCQLHI1WsTNP4tcm97EmN6O9npK5iuHfYykWiSEkbQhYgYtR\n\tB69tZ5b/DAJzI/sHE3XpOmc1i4wbc8ae7Mf8Qp+Ur4kDFL2iMXuIjo2M+coZNxLa6lHZ\n\tC6jxSfglhLrQ8qz9sCynjKIuUi0N8ckyiZkCAJ8FsD3fMiKy0EI6AGhe+QRfH0o9NBRh\n\t6QXXoOXd7W6LJDB28fci7IhvJZ37FqCuStEymbi2IWpySfuASTmCzef06ocoIA7p0sJU\n\t6pew==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=zODbIweVpumcXOZmsJzeN+APh+16lMuF21OZfxm/Gq4=;\n\tb=UPbsEpxCAGZ6+cwRUD0UZKkUdovW57pVfp3pI9CDBQLCVnVr1XlCOgSqP2ue7E9Ewc\n\tpfz88d4H2uBB844JXM62Z8bfZ9tHhhBOF2VfaD0x25CMZ2wuYFRBWhzuaM5ZpRGIafc6\n\t5JTvc6T9DWnauE6Ngj+Iz+d86IGTs4I5I5SChXfEIsOXiOBwhsPqAyzRgCppZuuJ+Zcl\n\tRdlRM8os5F0zDCUGa+i4jMyYMTSVbh5y7c1K4ugYgcAq7uGYTlW2fwekOvTfeHaqSRah\n\twkiYc0zJ9LQfbMxjhbr9DQQYC4L726uJGDA1qn1CgvH4qGiNkKAL/WdADEfntBzcNKPj\n\tFX8g==", "X-Gm-Message-State": "AKS2vOwkJixAIOfY59AgH2+zYSL5yZ0dMR3zrCtVpb53j5eAwEBhNoKA\n\tIt72mUtHNFsUggi/", "X-Received": "by 10.99.97.146 with SMTP id v140mr14525328pgb.62.1498720393678; \n\tThu, 29 Jun 2017 00:13:13 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 1/4] powerpc/smp: Use cpu_to_chip_id() to find core siblings", "Date": "Thu, 29 Jun 2017 17:12:53 +1000", "Message-Id": "<20170629071256.8159-2-oohall@gmail.com>", "X-Mailer": "git-send-email 2.9.4", "In-Reply-To": "<20170629071256.8159-1-oohall@gmail.com>", "References": "<20170629071256.8159-1-oohall@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "mikey@neuling.org, Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "When building the CPU scheduler topology the kernel uses the ibm,chipid\nproperty from the devicetree to group logical CPUs. Currently the DT\nsearch for this property is open-coded in smp.c and this functionality\nis a duplication of what's in cpu_to_chip_id() already. This patch\nremoves the existing search in favor of that.\n\nIt's worth mentioning that the semantics of the search are different\nin cpu_to_chip_id(). When there is no ibm,chipid in the CPUs node it\nwill also search /cpus and / for the property, but this should not\neffect the output topology.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\n arch/powerpc/kernel/smp.c | 37 +++++++++++--------------------------\n 1 file changed, 11 insertions(+), 26 deletions(-)", "diff": "diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c\nindex dbcd22e09a2c..40f1f268be83 100644\n--- a/arch/powerpc/kernel/smp.c\n+++ b/arch/powerpc/kernel/smp.c\n@@ -829,19 +829,11 @@ EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);\n \n static void traverse_siblings_chip_id(int cpu, bool add, int chipid)\n {\n-\tconst struct cpumask *mask;\n-\tstruct device_node *np;\n-\tint i, plen;\n-\tconst __be32 *prop;\n+\tconst struct cpumask *mask = add ? cpu_online_mask : cpu_present_mask;\n+\tint i;\n \n-\tmask = add ? cpu_online_mask : cpu_present_mask;\n \tfor_each_cpu(i, mask) {\n-\t\tnp = of_get_cpu_node(i, NULL);\n-\t\tif (!np)\n-\t\t\tcontinue;\n-\t\tprop = of_get_property(np, \"ibm,chip-id\", &plen);\n-\t\tif (prop && plen == sizeof(int) &&\n-\t\t of_read_number(prop, 1) == chipid) {\n+\t\tif (cpu_to_chip_id(i) == chipid) {\n \t\t\tif (add) {\n \t\t\t\tcpumask_set_cpu(cpu, cpu_core_mask(i));\n \t\t\t\tcpumask_set_cpu(i, cpu_core_mask(cpu));\n@@ -850,7 +842,6 @@ static void traverse_siblings_chip_id(int cpu, bool add, int chipid)\n \t\t\t\tcpumask_clear_cpu(i, cpu_core_mask(cpu));\n \t\t\t}\n \t\t}\n-\t\tof_node_put(np);\n \t}\n }\n \n@@ -880,21 +871,15 @@ static void traverse_core_siblings(int cpu, bool add)\n {\n \tstruct device_node *l2_cache, *np;\n \tconst struct cpumask *mask;\n-\tint i, chip, plen;\n-\tconst __be32 *prop;\n+\tint chip_id;\n+\tint i;\n \n-\t/* First see if we have ibm,chip-id properties in cpu nodes */\n-\tnp = of_get_cpu_node(cpu, NULL);\n-\tif (np) {\n-\t\tchip = -1;\n-\t\tprop = of_get_property(np, \"ibm,chip-id\", &plen);\n-\t\tif (prop && plen == sizeof(int))\n-\t\t\tchip = of_read_number(prop, 1);\n-\t\tof_node_put(np);\n-\t\tif (chip >= 0) {\n-\t\t\ttraverse_siblings_chip_id(cpu, add, chip);\n-\t\t\treturn;\n-\t\t}\n+\t/* threads that share a chip-id are considered siblings */\n+\tchip_id = cpu_to_chip_id(cpu);\n+\n+\tif (chip_id >= 0) {\n+\t\ttraverse_siblings_chip_id(cpu, add, chip_id);\n+\t\treturn;\n \t}\n \n \tl2_cache = cpu_to_l2cache(cpu);\n", "prefixes": [ "1/4" ] }