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GET /api/patches/1821151/?format=api
{ "id": 1821151, "url": "http://patchwork.ozlabs.org/api/patches/1821151/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20230814215457.4075025-15-bhupesh.sharma@linaro.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20230814215457.4075025-15-bhupesh.sharma@linaro.org>", "list_archive_url": null, "date": "2023-08-14T21:54:54", "name": "[14/17] arm: dts: qcom: sdm845: Add UFS HC and PHY nodes", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "65e8e3e26809724a625d6681c16a1dfbc2669a4e", "submitter": { "id": 81316, "url": "http://patchwork.ozlabs.org/api/people/81316/?format=api", "name": "Bhupesh Sharma", "email": "bhupesh.sharma@linaro.org" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20230814215457.4075025-15-bhupesh.sharma@linaro.org/mbox/", "series": [ { "id": 368803, "url": "http://patchwork.ozlabs.org/api/series/368803/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=368803", "date": "2023-08-14T21:54:40", "name": "Enable UFS on DragonBoard845c", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/368803/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1821151/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1821151/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": 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nodes", "Date": "Tue, 15 Aug 2023 03:24:54 +0530", "Message-Id": "<20230814215457.4075025-15-bhupesh.sharma@linaro.org>", "X-Mailer": "git-send-email 2.38.1", "In-Reply-To": "<20230814215457.4075025-1-bhupesh.sharma@linaro.org>", "References": "<20230814215457.4075025-1-bhupesh.sharma@linaro.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add UFS HC and PHY nodes in Qualcomm SDM845 dtsi.\n\nSigned-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>\n---\n arch/arm/dts/sdm845.dtsi | 62 ++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 62 insertions(+)", "diff": "diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi\nindex 056a1674d5..9ef41e3c84 100644\n--- a/arch/arm/dts/sdm845.dtsi\n+++ b/arch/arm/dts/sdm845.dtsi\n@@ -30,6 +30,68 @@\n \t\t\tcompatible = \"qcom,gcc-reset-sdm845\";\n \t\t\treg = <0x00100000 0x1f0000>;\n \t\t\t#reset-cells = <1>;\n+\n+\t\tufs_mem_hc: ufshc@1d84000 {\n+\t\t\tcompatible = \"qcom,sdm845-ufshc\", \"qcom,ufshc\",\n+\t\t\t\t \"jedec,ufs-2.0\";\n+\t\t\treg = <0x01d84000 0x2500>;\n+\t\t\tphys = <&ufs_mem_phy_lanes>;\n+\t\t\tphy-names = \"ufsphy\";\n+\t\t\tlanes-per-direction = <2>;\n+\t\t\t#reset-cells = <1>;\n+\t\t\tresets = <&reset GCC_UFS_PHY_BCR>;\n+\t\t\treset-names = \"rst\";\n+\n+\t\t\tpower-domains = <&gcc UFS_PHY_GDSC>;\n+\n+\t\t\tclock-names =\n+\t\t\t\t\"core_clk\",\n+\t\t\t\t\"bus_aggr_clk\",\n+\t\t\t\t\"iface_clk\",\n+\t\t\t\t\"core_clk_unipro\",\n+\t\t\t\t\"tx_lane0_sync_clk\",\n+\t\t\t\t\"rx_lane0_sync_clk\",\n+\t\t\t\t\"rx_lane1_sync_clk\",\n+\t\t\t\t\"ice_core_clk\";\n+\t\t\tclocks =\n+\t\t\t\t<&gcc GCC_UFS_PHY_AXI_CLK>,\n+\t\t\t\t<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,\n+\t\t\t\t<&gcc GCC_UFS_PHY_AHB_CLK>,\n+\t\t\t\t<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,\n+\t\t\t\t<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,\n+\t\t\t\t<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,\n+\t\t\t\t<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,\n+\t\t\t\t<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;\n+\t\t\tfreq-table-hz =\n+\t\t\t\t<50000000 200000000>,\n+\t\t\t\t<0 0>,\n+\t\t\t\t<0 0>,\n+\t\t\t\t<37500000 150000000>,\n+\t\t\t\t<0 0>,\n+\t\t\t\t<0 0>,\n+\t\t\t\t<0 0>,\n+\t\t\t\t<0 300000000>;\n+\t\t};\n+\n+\t\tufs_mem_phy: phy@1d87000 {\n+\t\t\tcompatible = \"qcom,sdm845-qmp-ufs-phy\";\n+\t\t\treg = <0x01d87000 0x18c>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <1>;\n+\t\t\tranges;\n+\t\t\tclock-names = \"ref\",\n+\t\t\t\t \"ref_aux\";\n+\t\t\tclocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,\n+\t\t\t\t <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;\n+\n+\t\t\tufs_mem_phy_lanes: phy@1d87400 {\n+\t\t\t\treg = <0x01d87400 0x108>,\n+\t\t\t\t <0x01d87600 0x1e0>,\n+\t\t\t\t <0x01d87c00 0x1dc>,\n+\t\t\t\t <0x01d87800 0x108>,\n+\t\t\t\t <0x01d87a00 0x1e0>;\n+\t\t\t\t#phy-cells = <0>;\n+\t\t\t};\n \t\t};\n \n \t\tgpio_north: gpio_north@3900000 {\n", "prefixes": [ "14/17" ] }